1 // SPDX-License-Identifier: GPL-2.0
3 * SDM845 OnePlus 6(T) (enchilada / fajita) common device tree source
5 * Copyright (c) 2020, The Linux Foundation. All rights reserved.
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sdm845.dtsi"
14 #include "pm8998.dtsi"
15 #include "pmi8998.dtsi"
17 /delete-node/ &rmtfs_mem;
26 stdout-path = "serial0:115200n8";
30 compatible = "gpio-keys";
31 label = "Volume keys";
34 pinctrl-names = "default";
35 pinctrl-0 = <&volume_down_gpio &volume_up_gpio>;
38 label = "Volume down";
39 linux,code = <KEY_VOLUMEDOWN>;
40 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>;
41 debounce-interval = <15>;
46 linux,code = <KEY_VOLUMEUP>;
47 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
48 debounce-interval = <15>;
53 /* The rmtfs_mem needs to be guarded due to "XPU limitations"
54 * it is otherwise possible for an allocation adjacent to the
55 * rmtfs_mem region to trigger an XPU violation, causing a crash.
57 rmtfs_lower_guard: rmtfs-lower-guard@f5b00000 {
59 reg = <0 0xf5b00000 0 0x1000>;
62 * The rmtfs memory region in downstream is 'dynamically allocated'
63 * but given the same address every time. Hard code it as this address is
64 * where the modem firmware expects it to be.
66 rmtfs_mem: rmtfs-mem@f5b01000 {
67 compatible = "qcom,rmtfs-mem";
68 reg = <0 0xf5b01000 0 0x200000>;
74 rmtfs_upper_guard: rmtfs-upper-guard@f5d01000 {
76 reg = <0 0xf5d01000 0 0x1000>;
80 * It seems like reserving the old rmtfs_mem region is also needed to prevent
81 * random crashes which are most likely modem related, more testing needed.
83 removed_region: removed-region@88f00000 {
85 reg = <0 0x88f00000 0 0x1c00000>;
88 ramoops: ramoops@ac300000 {
89 compatible = "ramoops";
90 reg = <0 0xac300000 0 0x400000>;
91 record-size = <0x40000>;
92 console-size = <0x40000>;
93 ftrace-size = <0x40000>;
94 pmsg-size = <0x200000>;
99 vph_pwr: vph-pwr-regulator {
100 compatible = "regulator-fixed";
101 regulator-name = "vph_pwr";
102 regulator-min-microvolt = <3700000>;
103 regulator-max-microvolt = <3700000>;
107 * Apparently RPMh does not provide support for PM8998 S4 because it
108 * is always-on; model it as a fixed regulator.
110 vreg_s4a_1p8: pm8998-smps4 {
111 compatible = "regulator-fixed";
112 regulator-name = "vreg_s4a_1p8";
114 regulator-min-microvolt = <1800000>;
115 regulator-max-microvolt = <1800000>;
120 vin-supply = <&vph_pwr>;
124 * The touchscreen regulator seems to be controlled somehow by a gpio.
125 * Model it as a fixed regulator and keep it on. Without schematics we
126 * don't know how this is actually wired up...
128 ts_1p8_supply: ts-1p8-regulator {
129 compatible = "regulator-fixed";
130 regulator-name = "ts_1p8_supply";
132 regulator-min-microvolt = <1800000>;
133 regulator-max-microvolt = <1800000>;
143 firmware-name = "/*(DEBLOBBED)*/";
148 compatible = "qcom,pm8998-rpmh-regulators";
151 vdd-s1-supply = <&vph_pwr>;
152 vdd-s2-supply = <&vph_pwr>;
153 vdd-s3-supply = <&vph_pwr>;
154 vdd-s4-supply = <&vph_pwr>;
155 vdd-s5-supply = <&vph_pwr>;
156 vdd-s6-supply = <&vph_pwr>;
157 vdd-s7-supply = <&vph_pwr>;
158 vdd-s8-supply = <&vph_pwr>;
159 vdd-s9-supply = <&vph_pwr>;
160 vdd-s10-supply = <&vph_pwr>;
161 vdd-s11-supply = <&vph_pwr>;
162 vdd-s12-supply = <&vph_pwr>;
163 vdd-s13-supply = <&vph_pwr>;
164 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
165 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
166 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
167 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
168 vdd-l6-supply = <&vph_pwr>;
169 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
170 vdd-l9-supply = <&vreg_bob>;
171 vdd-l10-l23-l25-supply = <&vreg_bob>;
172 vdd-l13-l19-l21-supply = <&vreg_bob>;
173 vdd-l16-l28-supply = <&vreg_bob>;
174 vdd-l18-l22-supply = <&vreg_bob>;
175 vdd-l20-l24-supply = <&vreg_bob>;
176 vdd-l26-supply = <&vreg_s3a_1p35>;
177 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
179 vreg_s3a_1p35: smps3 {
180 regulator-min-microvolt = <1352000>;
181 regulator-max-microvolt = <1352000>;
184 vreg_s5a_2p04: smps5 {
185 regulator-min-microvolt = <1904000>;
186 regulator-max-microvolt = <2040000>;
189 vreg_s7a_1p025: smps7 {
190 regulator-min-microvolt = <900000>;
191 regulator-max-microvolt = <1028000>;
198 vreg_l1a_0p875: ldo1 {
199 regulator-min-microvolt = <880000>;
200 regulator-max-microvolt = <880000>;
201 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
205 regulator-min-microvolt = <1200000>;
206 regulator-max-microvolt = <1200000>;
207 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
212 regulator-min-microvolt = <800000>;
213 regulator-max-microvolt = <800000>;
214 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
218 regulator-min-microvolt = <1800000>;
219 regulator-max-microvolt = <1800000>;
220 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
224 vreg_l12a_1p8: ldo12 {
225 regulator-min-microvolt = <1800000>;
226 regulator-max-microvolt = <1800000>;
227 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
230 vreg_l14a_1p88: ldo14 {
231 regulator-min-microvolt = <1800000>;
232 regulator-max-microvolt = <1800000>;
233 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
237 vreg_l17a_1p3: ldo17 {
238 regulator-min-microvolt = <1304000>;
239 regulator-max-microvolt = <1304000>;
240 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
243 vreg_l20a_2p95: ldo20 {
244 regulator-min-microvolt = <2704000>;
245 regulator-max-microvolt = <2960000>;
246 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
249 vreg_l23a_3p3: ldo23 {
250 regulator-min-microvolt = <3300000>;
251 regulator-max-microvolt = <3312000>;
252 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
256 vreg_l24a_3p075: ldo24 {
257 regulator-min-microvolt = <3088000>;
258 regulator-max-microvolt = <3088000>;
259 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
262 vreg_l25a_3p3: ldo25 {
263 regulator-min-microvolt = <3300000>;
264 regulator-max-microvolt = <3312000>;
265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
270 vreg_l26a_1p2: ldo26 {
271 regulator-min-microvolt = <1200000>;
272 regulator-max-microvolt = <1200000>;
273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
276 vreg_l28a_3p0: ldo28 {
277 regulator-min-microvolt = <2856000>;
278 regulator-max-microvolt = <3008000>;
279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
284 compatible = "qcom,pmi8998-rpmh-regulators";
287 vdd-bob-supply = <&vph_pwr>;
290 regulator-min-microvolt = <3312000>;
291 regulator-max-microvolt = <3600000>;
292 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
293 regulator-allow-bypass;
298 compatible = "qcom,pm8005-rpmh-regulators";
301 vdd-s1-supply = <&vph_pwr>;
302 vdd-s2-supply = <&vph_pwr>;
303 vdd-s3-supply = <&vph_pwr>;
304 vdd-s4-supply = <&vph_pwr>;
306 vreg_s3c_0p6: smps3 {
307 regulator-min-microvolt = <600000>;
308 regulator-max-microvolt = <600000>;
315 firmware-name = "/*(DEBLOBBED)*/";
320 vdda-supply = <&vdda_mipi_dsi0_1p2>;
323 * Both devices use different panels but all other properties
324 * are common. Compatible line is declared in device dts.
326 display_panel: panel@0 {
329 #address-cells = <1>;
333 vddio-supply = <&vreg_l14a_1p88>;
335 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>;
337 pinctrl-names = "default";
338 pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>;
342 remote-endpoint = <&dsi0_out>;
349 remote-endpoint = <&panel_in>;
350 data-lanes = <0 1 2 3>;
355 vdds-supply = <&vdda_mipi_dsi0_pll>;
359 protected-clocks = <GCC_QSPI_CORE_CLK>,
360 <GCC_QSPI_CORE_CLK_SRC>,
361 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
362 <GCC_LPASS_Q6_AXI_CLK>,
363 <GCC_LPASS_SWAY_CLK>;
374 memory-region = <&gpu_mem>;
375 firmware-name = "/*(DEBLOBBED)*/";
381 clock-frequency = <100000>;
383 bq27441_fg: bq27441-battery@55 {
384 compatible = "ti,bq27411";
392 clock-frequency = <400000>;
394 synaptics-rmi4-i2c@20 {
395 compatible = "syna,rmi4-i2c";
397 #address-cells = <1>;
399 interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;
401 pinctrl-names = "default";
402 pinctrl-0 = <&ts_default_pins>;
404 vdd-supply = <&vreg_l28a_3p0>;
405 vio-supply = <&ts_1p8_supply>;
407 syna,reset-delay-ms = <200>;
408 syna,startup-delay-ms = <200>;
412 syna,nosleep-mode = <1>;
415 rmi4_f12: rmi4-f12@12 {
417 touchscreen-x-mm = <68>;
418 touchscreen-y-mm = <144>;
419 syna,sensor-type = <1>;
420 syna,rezero-wait-ms = <200>;
428 memory-region = <&ipa_fw_mem>;
429 firmware-name = "/*(DEBLOBBED)*/";
439 firmware-name = "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/";
443 volume_down_gpio: pm8998-gpio5-state {
449 qcom,drive-strength = <0>;
453 volume_up_gpio: pm8998-gpio6-state {
459 qcom,drive-strength = <0>;
474 pins = "gpio49", "gpio50";
476 drive-strength = <2>;
483 pins = "gpio55", "gpio56";
484 drive-strength = <2>;
492 drive-strength = <2>;
498 drive-strength = <2>;
504 * Prevent garbage data on bluetooth UART lines
508 pins = "gpio45", "gpio46", "gpio47", "gpio48";
518 pins = "gpio46", "gpio47";
519 drive-strength = <2>;
533 compatible = "qcom,wcn3990-bt";
536 * This path is relative to the qca/
537 * subdir under lib/firmware.
539 firmware-name = "/*(DEBLOBBED)*/";
541 vddio-supply = <&vreg_s4a_1p8>;
542 vddxo-supply = <&vreg_l7a_1p8>;
543 vddrf-supply = <&vreg_l17a_1p3>;
544 vddch0-supply = <&vreg_l25a_3p3>;
545 max-speed = <3200000>;
557 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
559 vcc-supply = <&vreg_l20a_2p95>;
560 vcc-max-microamp = <600000>;
566 vdda-phy-supply = <&vdda_ufs1_core>;
567 vdda-pll-supply = <&vdda_ufs1_1p2>;
574 * disable USB3 clock requirement as the device only supports
577 qcom,select-utmi-as-pipe-clk;
582 * We don't have the capability to switch modes yet.
584 dr_mode = "peripheral";
586 /* fastest mode for USB 2 */
587 maximum-speed = "high-speed";
589 /* Remove USB3 phy as it's unused on this device. */
590 phys = <&usb_1_hsphy>;
591 phy-names = "usb2-phy";
597 vdd-supply = <&vdda_usb1_ss_core>;
598 vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
599 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
601 qcom,imp-res-offset-value = <8>;
602 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
603 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
604 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
608 gpio-reserved-ranges = <0 4>, <81 4>;
610 tri_state_key_default: tri_state_key_default {
612 pins = "gpio40", "gpio42", "gpio26";
614 drive-strength = <2>;
619 ts_default_pins: ts-int {
621 pins = "gpio99", "gpio125";
623 drive-strength = <16>;
628 panel_reset_pins: panel-reset {
630 pins = "gpio6", "gpio25", "gpio26";
632 drive-strength = <8>;
637 panel_te_pin: panel-te {
640 function = "mdp_vsync";
641 drive-strength = <2>;
647 panel_esd_pin: panel-esd {
651 drive-strength = <2>;
660 firmware-name = "/*(DEBLOBBED)*/";
665 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
666 vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
667 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
668 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
669 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
671 qcom,snoc-host-cap-8bit-quirk;