arch/arm64/boot/dts/qcom/sdm845-db845c.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (c) 2019, Linaro Ltd.
   4  */
   5
   6 /dts-v1/;
   7
   8 #include <dt-bindings/leds/common.h>
   9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  11 #include <dt-bindings/sound/qcom,q6afe.h>
  12 #include <dt-bindings/sound/qcom,q6asm.h>
  13 #include "sdm845.dtsi"
  14 #include "pm8998.dtsi"
  15 #include "pmi8998.dtsi"
  16
  17 / {
  18         model = "Thundercomm Dragonboard 845c";
  19         compatible = "thundercomm,db845c", "qcom,sdm845";
  20         qcom,msm-id = <341 0x20001>;
  21         qcom,board-id = <8 0>;
  22
  23         aliases {
  24                 serial0 = &uart9;
  25                 hsuart0 = &uart6;
  26         };
  27
  28         chosen {
  29                 stdout-path = "serial0:115200n8";
  30         };
  31
  32         /* Fixed crystal oscillator dedicated to MCP2517FD */
  33         clk40M: can-clock {
  34                 compatible = "fixed-clock";
  35                 #clock-cells = <0>;
  36                 clock-frequency = <40000000>;
  37         };
  38
  39         dc12v: dc12v-regulator {
  40                 compatible = "regulator-fixed";
  41                 regulator-name = "DC12V";
  42                 regulator-min-microvolt = <12000000>;
  43                 regulator-max-microvolt = <12000000>;
  44                 regulator-always-on;
  45         };
  46
  47         gpio-keys {
  48                 compatible = "gpio-keys";
  49                 autorepeat;
  50
  51                 pinctrl-names = "default";
  52                 pinctrl-0 = <&vol_up_pin_a>;
  53
  54                 key-vol-up {
  55                         label = "Volume Up";
  56                         linux,code = <KEY_VOLUMEUP>;
  57                         gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
  58                 };
  59         };
  60
  61         leds {
  62                 compatible = "gpio-leds";
  63
  64                 led-0 {
  65                         label = "green:user4";
  66                         function = LED_FUNCTION_INDICATOR;
  67                         color = <LED_COLOR_ID_GREEN>;
  68                         gpios = <&pm8998_gpio 13 GPIO_ACTIVE_HIGH>;
  69                         default-state = "off";
  70                         panic-indicator;
  71                 };
  72
  73                 led-1 {
  74                         label = "yellow:wlan";
  75                         function = LED_FUNCTION_WLAN;
  76                         color = <LED_COLOR_ID_YELLOW>;
  77                         gpios = <&pm8998_gpio 9 GPIO_ACTIVE_HIGH>;
  78                         linux,default-trigger = "phy0tx";
  79                         default-state = "off";
  80                 };
  81
  82                 led-2 {
  83                         label = "blue:bt";
  84                         function = LED_FUNCTION_BLUETOOTH;
  85                         color = <LED_COLOR_ID_BLUE>;
  86                         gpios = <&pm8998_gpio 5 GPIO_ACTIVE_HIGH>;
  87                         linux,default-trigger = "bluetooth-power";
  88                         default-state = "off";
  89                 };
  90         };
  91
  92         hdmi-out {
  93                 compatible = "hdmi-connector";
  94                 type = "a";
  95
  96                 port {
  97                         hdmi_con: endpoint {
  98                                 remote-endpoint = <&lt9611_out>;
  99                         };
 100                 };
 101         };
 102
 103         reserved-memory {
 104                 /* Cont splash region set up by the bootloader */
 105                 cont_splash_mem: framebuffer@9d400000 {
 106                         reg = <0x0 0x9d400000 0x0 0x2400000>;
 107                         no-map;
 108                 };
 109         };
 110
 111         lt9611_1v8: lt9611-vdd18-regulator {
 112                 compatible = "regulator-fixed";
 113                 regulator-name = "LT9611_1V8";
 114
 115                 vin-supply = <&vdc_5v>;
 116                 regulator-min-microvolt = <1800000>;
 117                 regulator-max-microvolt = <1800000>;
 118
 119                 gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
 120                 enable-active-high;
 121         };
 122
 123         lt9611_3v3: lt9611-3v3 {
 124                 compatible = "regulator-fixed";
 125                 regulator-name = "LT9611_3V3";
 126
 127                 vin-supply = <&vdc_3v3>;
 128                 regulator-min-microvolt = <3300000>;
 129                 regulator-max-microvolt = <3300000>;
 130
 131                 // TODO: make it possible to drive same GPIO from two clients
 132                 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
 133                 // enable-active-high;
 134         };
 135
 136         pcie0_1p05v: pcie-0-1p05v-regulator {
 137                 compatible = "regulator-fixed";
 138                 regulator-name = "PCIE0_1.05V";
 139
 140                 vin-supply = <&vbat>;
 141                 regulator-min-microvolt = <1050000>;
 142                 regulator-max-microvolt = <1050000>;
 143
 144                 // TODO: make it possible to drive same GPIO from two clients
 145                 // gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
 146                 // enable-active-high;
 147         };
 148
 149         cam0_dvdd_1v2: reg_cam0_dvdd_1v2 {
 150                 compatible = "regulator-fixed";
 151                 regulator-name = "CAM0_DVDD_1V2";
 152                 regulator-min-microvolt = <1200000>;
 153                 regulator-max-microvolt = <1200000>;
 154                 enable-active-high;
 155                 gpio = <&pm8998_gpio 12 GPIO_ACTIVE_HIGH>;
 156                 pinctrl-names = "default";
 157                 pinctrl-0 = <&cam0_dvdd_1v2_en_default>;
 158                 vin-supply = <&vbat>;
 159         };
 160
 161         cam0_avdd_2v8: reg_cam0_avdd_2v8 {
 162                 compatible = "regulator-fixed";
 163                 regulator-name = "CAM0_AVDD_2V8";
 164                 regulator-min-microvolt = <2800000>;
 165                 regulator-max-microvolt = <2800000>;
 166                 enable-active-high;
 167                 gpio = <&pm8998_gpio 10 GPIO_ACTIVE_HIGH>;
 168                 pinctrl-names = "default";
 169                 pinctrl-0 = <&cam0_avdd_2v8_en_default>;
 170                 vin-supply = <&vbat>;
 171         };
 172
 173         /* This regulator is enabled when the VREG_LVS1A_1P8 trace is enabled */
 174         cam3_avdd_2v8: reg_cam3_avdd_2v8 {
 175                 compatible = "regulator-fixed";
 176                 regulator-name = "CAM3_AVDD_2V8";
 177                 regulator-min-microvolt = <2800000>;
 178                 regulator-max-microvolt = <2800000>;
 179                 regulator-always-on;
 180                 vin-supply = <&vbat>;
 181         };
 182
 183         pcie0_3p3v_dual: vldo-3v3-regulator {
 184                 compatible = "regulator-fixed";
 185                 regulator-name = "VLDO_3V3";
 186
 187                 vin-supply = <&vbat>;
 188                 regulator-min-microvolt = <3300000>;
 189                 regulator-max-microvolt = <3300000>;
 190
 191                 gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>;
 192                 enable-active-high;
 193
 194                 pinctrl-names = "default";
 195                 pinctrl-0 = <&pcie0_pwren_state>;
 196         };
 197
 198         v5p0_hdmiout: v5p0-hdmiout-regulator {
 199                 compatible = "regulator-fixed";
 200                 regulator-name = "V5P0_HDMIOUT";
 201
 202                 vin-supply = <&vdc_5v>;
 203                 regulator-min-microvolt = <500000>;
 204                 regulator-max-microvolt = <500000>;
 205
 206                 // TODO: make it possible to drive same GPIO from two clients
 207                 // gpio = <&tlmm 89 GPIO_ACTIVE_HIGH>;
 208                 // enable-active-high;
 209         };
 210
 211         vbat: vbat-regulator {
 212                 compatible = "regulator-fixed";
 213                 regulator-name = "VBAT";
 214
 215                 vin-supply = <&dc12v>;
 216                 regulator-min-microvolt = <4200000>;
 217                 regulator-max-microvolt = <4200000>;
 218                 regulator-always-on;
 219         };
 220
 221         vbat_som: vbat-som-regulator {
 222                 compatible = "regulator-fixed";
 223                 regulator-name = "VBAT_SOM";
 224
 225                 vin-supply = <&dc12v>;
 226                 regulator-min-microvolt = <4200000>;
 227                 regulator-max-microvolt = <4200000>;
 228                 regulator-always-on;
 229         };
 230
 231         vdc_3v3: vdc-3v3-regulator {
 232                 compatible = "regulator-fixed";
 233                 regulator-name = "VDC_3V3";
 234                 vin-supply = <&dc12v>;
 235                 regulator-min-microvolt = <3300000>;
 236                 regulator-max-microvolt = <3300000>;
 237                 regulator-always-on;
 238         };
 239
 240         vdc_5v: vdc-5v-regulator {
 241                 compatible = "regulator-fixed";
 242                 regulator-name = "VDC_5V";
 243
 244                 vin-supply = <&dc12v>;
 245                 regulator-min-microvolt = <500000>;
 246                 regulator-max-microvolt = <500000>;
 247                 regulator-always-on;
 248         };
 249
 250         vreg_s4a_1p8: vreg-s4a-1p8 {
 251                 compatible = "regulator-fixed";
 252                 regulator-name = "vreg_s4a_1p8";
 253
 254                 regulator-min-microvolt = <1800000>;
 255                 regulator-max-microvolt = <1800000>;
 256                 regulator-always-on;
 257         };
 258
 259         vph_pwr: vph-pwr-regulator {
 260                 compatible = "regulator-fixed";
 261                 regulator-name = "vph_pwr";
 262
 263                 vin-supply = <&vbat_som>;
 264         };
 265 };
 266
 267 &adsp_pas {
 268         status = "okay";
 269
 270         firmware-name = "/*(DEBLOBBED)*/";
 271 };
 272
 273 &apps_rsc {
 274         regulators-0 {
 275                 compatible = "qcom,pm8998-rpmh-regulators";
 276                 qcom,pmic-id = "a";
 277                 vdd-s1-supply = <&vph_pwr>;
 278                 vdd-s2-supply = <&vph_pwr>;
 279                 vdd-s3-supply = <&vph_pwr>;
 280                 vdd-s4-supply = <&vph_pwr>;
 281                 vdd-s5-supply = <&vph_pwr>;
 282                 vdd-s6-supply = <&vph_pwr>;
 283                 vdd-s7-supply = <&vph_pwr>;
 284                 vdd-s8-supply = <&vph_pwr>;
 285                 vdd-s9-supply = <&vph_pwr>;
 286                 vdd-s10-supply = <&vph_pwr>;
 287                 vdd-s11-supply = <&vph_pwr>;
 288                 vdd-s12-supply = <&vph_pwr>;
 289                 vdd-s13-supply = <&vph_pwr>;
 290                 vdd-l1-l27-supply = <&vreg_s7a_1p025>;
 291                 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
 292                 vdd-l3-l11-supply = <&vreg_s7a_1p025>;
 293                 vdd-l4-l5-supply = <&vreg_s7a_1p025>;
 294                 vdd-l6-supply = <&vph_pwr>;
 295                 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
 296                 vdd-l9-supply = <&vreg_bob>;
 297                 vdd-l10-l23-l25-supply = <&vreg_bob>;
 298                 vdd-l13-l19-l21-supply = <&vreg_bob>;
 299                 vdd-l16-l28-supply = <&vreg_bob>;
 300                 vdd-l18-l22-supply = <&vreg_bob>;
 301                 vdd-l20-l24-supply = <&vreg_bob>;
 302                 vdd-l26-supply = <&vreg_s3a_1p35>;
 303                 vin-lvs-1-2-supply = <&vreg_s4a_1p8>;
 304
 305                 vreg_s3a_1p35: smps3 {
 306                         regulator-min-microvolt = <1352000>;
 307                         regulator-max-microvolt = <1352000>;
 308                 };
 309
 310                 vreg_s5a_2p04: smps5 {
 311                         regulator-min-microvolt = <1904000>;
 312                         regulator-max-microvolt = <2040000>;
 313                 };
 314
 315                 vreg_s7a_1p025: smps7 {
 316                         regulator-min-microvolt = <900000>;
 317                         regulator-max-microvolt = <1028000>;
 318                 };
 319
 320                 vreg_l1a_0p875: ldo1 {
 321                         regulator-min-microvolt = <880000>;
 322                         regulator-max-microvolt = <880000>;
 323                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 324                 };
 325
 326                 vreg_l5a_0p8: ldo5 {
 327                         regulator-min-microvolt = <800000>;
 328                         regulator-max-microvolt = <800000>;
 329                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 330                 };
 331
 332                 vreg_l12a_1p8: ldo12 {
 333                         regulator-min-microvolt = <1800000>;
 334                         regulator-max-microvolt = <1800000>;
 335                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 336                 };
 337
 338                 vreg_l7a_1p8: ldo7 {
 339                         regulator-min-microvolt = <1800000>;
 340                         regulator-max-microvolt = <1800000>;
 341                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 342                 };
 343
 344                 vreg_l13a_2p95: ldo13 {
 345                         regulator-min-microvolt = <1800000>;
 346                         regulator-max-microvolt = <2960000>;
 347                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 348                 };
 349
 350                 vreg_l17a_1p3: ldo17 {
 351                         regulator-min-microvolt = <1304000>;
 352                         regulator-max-microvolt = <1304000>;
 353                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 354                 };
 355
 356                 vreg_l20a_2p95: ldo20 {
 357                         regulator-min-microvolt = <2960000>;
 358                         regulator-max-microvolt = <2968000>;
 359                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 360                 };
 361
 362                 vreg_l21a_2p95: ldo21 {
 363                         regulator-min-microvolt = <2960000>;
 364                         regulator-max-microvolt = <2968000>;
 365                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 366                 };
 367
 368                 vreg_l24a_3p075: ldo24 {
 369                         regulator-min-microvolt = <3088000>;
 370                         regulator-max-microvolt = <3088000>;
 371                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 372                 };
 373
 374                 vreg_l25a_3p3: ldo25 {
 375                         regulator-min-microvolt = <3300000>;
 376                         regulator-max-microvolt = <3312000>;
 377                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 378                 };
 379
 380                 vreg_l26a_1p2: ldo26 {
 381                         regulator-min-microvolt = <1200000>;
 382                         regulator-max-microvolt = <1200000>;
 383                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 384                 };
 385
 386                 vreg_lvs1a_1p8: lvs1 {
 387                         regulator-min-microvolt = <1800000>;
 388                         regulator-max-microvolt = <1800000>;
 389                         regulator-always-on;
 390                 };
 391
 392                 vreg_lvs2a_1p8: lvs2 {
 393                         regulator-min-microvolt = <1800000>;
 394                         regulator-max-microvolt = <1800000>;
 395                         regulator-always-on;
 396                 };
 397         };
 398
 399         regulators-1 {
 400                 compatible = "qcom,pmi8998-rpmh-regulators";
 401                 qcom,pmic-id = "b";
 402
 403                 vdd-bob-supply = <&vph_pwr>;
 404
 405                 vreg_bob: bob {
 406                         regulator-min-microvolt = <3312000>;
 407                         regulator-max-microvolt = <3600000>;
 408                         regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
 409                         regulator-allow-bypass;
 410                 };
 411         };
 412 };
 413
 414 &cdsp_pas {
 415         status = "okay";
 416         firmware-name = "/*(DEBLOBBED)*/";
 417 };
 418
 419 &dsi0 {
 420         status = "okay";
 421         vdda-supply = <&vreg_l26a_1p2>;
 422
 423         ports {
 424                 port@1 {
 425                         endpoint {
 426                                 remote-endpoint = <&lt9611_a>;
 427                                 data-lanes = <0 1 2 3>;
 428                         };
 429                 };
 430         };
 431 };
 432
 433 &dsi0_phy {
 434         status = "okay";
 435         vdds-supply = <&vreg_l1a_0p875>;
 436 };
 437
 438 &gcc {
 439         protected-clocks = <GCC_QSPI_CORE_CLK>,
 440                            <GCC_QSPI_CORE_CLK_SRC>,
 441                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
 442                            <GCC_LPASS_Q6_AXI_CLK>,
 443                            <GCC_LPASS_SWAY_CLK>;
 444 };
 445
 446 &gmu {
 447         status = "okay";
 448 };
 449
 450 &gpi_dma0 {
 451         status = "okay";
 452 };
 453
 454 &gpi_dma1 {
 455         status = "okay";
 456 };
 457
 458 &gpu {
 459         status = "okay";
 460         zap-shader {
 461                 memory-region = <&gpu_mem>;
 462                 firmware-name = "/*(DEBLOBBED)*/";
 463         };
 464 };
 465
 466 &i2c10 {
 467         status = "okay";
 468         clock-frequency = <400000>;
 469
 470         lt9611_codec: hdmi-bridge@3b {
 471                 compatible = "lontium,lt9611";
 472                 reg = <0x3b>;
 473                 #sound-dai-cells = <1>;
 474
 475                 interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>;
 476
 477                 reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>;
 478
 479                 vdd-supply = <&lt9611_1v8>;
 480                 vcc-supply = <&lt9611_3v3>;
 481
 482                 pinctrl-names = "default";
 483                 pinctrl-0 = <&lt9611_irq_pin>, <&dsi_sw_sel>;
 484
 485                 ports {
 486                         #address-cells = <1>;
 487                         #size-cells = <0>;
 488
 489                         port@0 {
 490                                 reg = <0>;
 491
 492                                 lt9611_a: endpoint {
 493                                         remote-endpoint = <&dsi0_out>;
 494                                 };
 495                         };
 496
 497                         port@2 {
 498                                 reg = <2>;
 499
 500                                 lt9611_out: endpoint {
 501                                         remote-endpoint = <&hdmi_con>;
 502                                 };
 503                         };
 504                 };
 505         };
 506 };
 507
 508 &i2c11 {
 509         /* On Low speed expansion */
 510         clock-frequency = <100000>;
 511         label = "LS-I2C1";
 512         status = "okay";
 513 };
 514
 515 &i2c14 {
 516         /* On Low speed expansion */
 517         clock-frequency = <100000>;
 518         label = "LS-I2C0";
 519         status = "okay";
 520 };
 521
 522 &mdss {
 523         memory-region = <&cont_splash_mem>;
 524         status = "okay";
 525 };
 526
 527 &mss_pil {
 528         status = "okay";
 529         firmware-name = "/*(DEBLOBBED)*/", "/*(DEBLOBBED)*/";
 530 };
 531
 532 &pcie0 {
 533         status = "okay";
 534         perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>;
 535         wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>;
 536
 537         vddpe-3v3-supply = <&pcie0_3p3v_dual>;
 538
 539         pinctrl-names = "default";
 540         pinctrl-0 = <&pcie0_default_state>;
 541 };
 542
 543 &pcie0_phy {
 544         status = "okay";
 545
 546         vdda-phy-supply = <&vreg_l1a_0p875>;
 547         vdda-pll-supply = <&vreg_l26a_1p2>;
 548 };
 549
 550 &pcie1 {
 551         status = "okay";
 552         perst-gpios = <&tlmm 102 GPIO_ACTIVE_LOW>;
 553
 554         pinctrl-names = "default";
 555         pinctrl-0 = <&pcie1_default_state>;
 556 };
 557
 558 &pcie1_phy {
 559         status = "okay";
 560
 561         vdda-phy-supply = <&vreg_l1a_0p875>;
 562         vdda-pll-supply = <&vreg_l26a_1p2>;
 563 };
 564
 565 &pm8998_gpio {
 566         gpio-line-names =
 567                 "NC",
 568                 "NC",
 569                 "WLAN_SW_CTRL",
 570                 "NC",
 571                 "PM_GPIO5_BLUE_BT_LED",
 572                 "VOL_UP_N",
 573                 "NC",
 574                 "ADC_IN1",
 575                 "PM_GPIO9_YEL_WIFI_LED",
 576                 "CAM0_AVDD_EN",
 577                 "NC",
 578                 "CAM0_DVDD_EN",
 579                 "PM_GPIO13_GREEN_U4_LED",
 580                 "DIV_CLK2",
 581                 "NC",
 582                 "NC",
 583                 "NC",
 584                 "SMB_STAT",
 585                 "NC",
 586                 "NC",
 587                 "ADC_IN2",
 588                 "OPTION1",
 589                 "WCSS_PWR_REQ",
 590                 "PM845_GPIO24",
 591                 "OPTION2",
 592                 "PM845_SLB";
 593
 594         cam0_dvdd_1v2_en_default: cam0-dvdd-1v2-en-state {
 595                 pins = "gpio12";
 596                 function = "normal";
 597
 598                 bias-pull-up;
 599                 drive-push-pull;
 600                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
 601         };
 602
 603         cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
 604                 pins = "gpio10";
 605                 function = "normal";
 606
 607                 bias-pull-up;
 608                 drive-push-pull;
 609                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_HIGH>;
 610         };
 611
 612         vol_up_pin_a: vol-up-active-state {
 613                 pins = "gpio6";
 614                 function = "normal";
 615                 input-enable;
 616                 bias-pull-up;
 617                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
 618         };
 619 };
 620
 621 &pm8998_pon {
 622         resin {
 623                 compatible = "qcom,pm8941-resin";
 624                 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
 625                 debounce = <15625>;
 626                 bias-pull-up;
 627                 linux,code = <KEY_VOLUMEDOWN>;
 628         };
 629 };
 630
 631 &pmi8998_lpg {
 632         status = "okay";
 633
 634         qcom,power-source = <1>;
 635
 636         led@3 {
 637                 reg = <3>;
 638                 color = <LED_COLOR_ID_GREEN>;
 639                 function = LED_FUNCTION_HEARTBEAT;
 640                 function-enumerator = <3>;
 641
 642                 linux,default-trigger = "heartbeat";
 643                 default-state = "on";
 644         };
 645
 646         led@4 {
 647                 reg = <4>;
 648                 color = <LED_COLOR_ID_GREEN>;
 649                 function = LED_FUNCTION_INDICATOR;
 650                 function-enumerator = <2>;
 651         };
 652
 653         led@5 {
 654                 reg = <5>;
 655                 color = <LED_COLOR_ID_GREEN>;
 656                 function = LED_FUNCTION_INDICATOR;
 657                 function-enumerator = <1>;
 658         };
 659 };
 660
 661 /* QUAT I2S Uses 4 I2S SD Lines for audio on LT9611 HDMI Bridge */
 662 &q6afedai {
 663         qi2s@22 {
 664                 reg = <QUATERNARY_MI2S_RX>;
 665                 qcom,sd-lines = <0 1 2 3>;
 666         };
 667 };
 668
 669 &q6asmdai {
 670         dai@0 {
 671                 reg = <0>;
 672         };
 673
 674         dai@1 {
 675                 reg = <1>;
 676         };
 677
 678         dai@2 {
 679                 reg = <2>;
 680         };
 681
 682         dai@3 {
 683                 reg = <3>;
 684                 direction = <2>;
 685                 is-compress-dai;
 686         };
 687 };
 688
 689 &qupv3_id_0 {
 690         status = "okay";
 691 };
 692
 693 &qupv3_id_1 {
 694         status = "okay";
 695 };
 696
 697 &sdhc_2 {
 698         status = "okay";
 699
 700         pinctrl-names = "default";
 701         pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
 702
 703         vmmc-supply = <&vreg_l21a_2p95>;
 704         vqmmc-supply = <&vreg_l13a_2p95>;
 705
 706         bus-width = <4>;
 707         cd-gpios = <&tlmm 126 GPIO_ACTIVE_LOW>;
 708 };
 709
 710 &sound {
 711         compatible = "qcom,db845c-sndcard";
 712         pinctrl-0 = <&quat_mi2s_active
 713                          &quat_mi2s_sd0_active
 714                          &quat_mi2s_sd1_active
 715                          &quat_mi2s_sd2_active
 716                          &quat_mi2s_sd3_active>;
 717         pinctrl-names = "default";
 718         model = "DB845c";
 719         audio-routing =
 720                 "RX_BIAS", "MCLK",
 721                 "AMIC1", "MIC BIAS1",
 722                 "AMIC2", "MIC BIAS2",
 723                 "DMIC0", "MIC BIAS1",
 724                 "DMIC1", "MIC BIAS1",
 725                 "DMIC2", "MIC BIAS3",
 726                 "DMIC3", "MIC BIAS3",
 727                 "SpkrLeft IN", "SPK1 OUT",
 728                 "SpkrRight IN", "SPK2 OUT",
 729                 "MM_DL1",  "MultiMedia1 Playback",
 730                 "MM_DL2",  "MultiMedia2 Playback",
 731                 "MM_DL4",  "MultiMedia4 Playback",
 732                 "MultiMedia3 Capture", "MM_UL3";
 733
 734         mm1-dai-link {
 735                 link-name = "MultiMedia1";
 736                 cpu {
 737                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
 738                 };
 739         };
 740
 741         mm2-dai-link {
 742                 link-name = "MultiMedia2";
 743                 cpu {
 744                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
 745                 };
 746         };
 747
 748         mm3-dai-link {
 749                 link-name = "MultiMedia3";
 750                 cpu {
 751                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
 752                 };
 753         };
 754
 755         mm4-dai-link {
 756                 link-name = "MultiMedia4";
 757                 cpu {
 758                         sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA4>;
 759                 };
 760         };
 761
 762         hdmi-dai-link {
 763                 link-name = "HDMI Playback";
 764                 cpu {
 765                         sound-dai = <&q6afedai QUATERNARY_MI2S_RX>;
 766                 };
 767
 768                 platform {
 769                         sound-dai = <&q6routing>;
 770                 };
 771
 772                 codec {
 773                         sound-dai = <&lt9611_codec 0>;
 774                 };
 775         };
 776
 777         slim-dai-link {
 778                 link-name = "SLIM Playback";
 779                 cpu {
 780                         sound-dai = <&q6afedai SLIMBUS_0_RX>;
 781                 };
 782
 783                 platform {
 784                         sound-dai = <&q6routing>;
 785                 };
 786
 787                 codec {
 788                         sound-dai = <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
 789                 };
 790         };
 791
 792         slimcap-dai-link {
 793                 link-name = "SLIM Capture";
 794                 cpu {
 795                         sound-dai = <&q6afedai SLIMBUS_0_TX>;
 796                 };
 797
 798                 platform {
 799                         sound-dai = <&q6routing>;
 800                 };
 801
 802                 codec {
 803                         sound-dai = <&wcd9340 1>;
 804                 };
 805         };
 806 };
 807
 808 &spi0 {
 809         status = "okay";
 810         pinctrl-names = "default";
 811         pinctrl-0 = <&qup_spi0_default>;
 812         cs-gpios = <&tlmm 3 GPIO_ACTIVE_LOW>;
 813
 814         can@0 {
 815                 compatible = "microchip,mcp2517fd";
 816                 reg = <0>;
 817                 clocks = <&clk40M>;
 818                 interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>;
 819                 spi-max-frequency = <10000000>;
 820                 vdd-supply = <&vdc_5v>;
 821                 xceiver-supply = <&vdc_5v>;
 822         };
 823 };
 824
 825 &spi2 {
 826         /* On Low speed expansion */
 827         label = "LS-SPI0";
 828         status = "okay";
 829 };
 830
 831 &tlmm {
 832         cam0_default: cam0_default {
 833                 rst {
 834                         pins = "gpio9";
 835                         function = "gpio";
 836
 837                         drive-strength = <16>;
 838                         bias-disable;
 839                 };
 840
 841                 mclk0 {
 842                         pins = "gpio13";
 843                         function = "cam_mclk";
 844
 845                         drive-strength = <16>;
 846                         bias-disable;
 847                 };
 848         };
 849
 850         cam3_default: cam3_default {
 851                 rst {
 852                         function = "gpio";
 853                         pins = "gpio21";
 854
 855                         drive-strength = <16>;
 856                         bias-disable;
 857                 };
 858
 859                 mclk3 {
 860                         function = "cam_mclk";
 861                         pins = "gpio16";
 862
 863                         drive-strength = <16>;
 864                         bias-disable;
 865                 };
 866         };
 867
 868         dsi_sw_sel: dsi-sw-sel {
 869                 pins = "gpio120";
 870                 function = "gpio";
 871
 872                 drive-strength = <2>;
 873                 bias-disable;
 874                 output-high;
 875         };
 876
 877         lt9611_irq_pin: lt9611-irq {
 878                 pins = "gpio84";
 879                 function = "gpio";
 880                 bias-disable;
 881         };
 882
 883         pcie0_default_state: pcie0-default {
 884                 clkreq {
 885                         pins = "gpio36";
 886                         function = "pci_e0";
 887                         bias-pull-up;
 888                 };
 889
 890                 reset-n {
 891                         pins = "gpio35";
 892                         function = "gpio";
 893
 894                         drive-strength = <2>;
 895                         output-low;
 896                         bias-pull-down;
 897                 };
 898
 899                 wake-n {
 900                         pins = "gpio37";
 901                         function = "gpio";
 902
 903                         drive-strength = <2>;
 904                         bias-pull-up;
 905                 };
 906         };
 907
 908         pcie0_pwren_state: pcie0-pwren {
 909                 pins = "gpio90";
 910                 function = "gpio";
 911
 912                 drive-strength = <2>;
 913                 bias-disable;
 914         };
 915
 916         pcie1_default_state: pcie1-default {
 917                 perst-n {
 918                         pins = "gpio102";
 919                         function = "gpio";
 920
 921                         drive-strength = <16>;
 922                         bias-disable;
 923                 };
 924
 925                 clkreq {
 926                         pins = "gpio103";
 927                         function = "pci_e1";
 928                         bias-pull-up;
 929                 };
 930
 931                 wake-n {
 932                         pins = "gpio11";
 933                         function = "gpio";
 934
 935                         drive-strength = <2>;
 936                         bias-pull-up;
 937                 };
 938
 939                 reset-n {
 940                         pins = "gpio75";
 941                         function = "gpio";
 942
 943                         drive-strength = <16>;
 944                         bias-pull-up;
 945                         output-high;
 946                 };
 947         };
 948
 949         sdc2_default_state: sdc2-default {
 950                 clk {
 951                         pins = "sdc2_clk";
 952                         bias-disable;
 953
 954                         /*
 955                          * It seems that mmc_test reports errors if drive
 956                          * strength is not 16 on clk, cmd, and data pins.
 957                          */
 958                         drive-strength = <16>;
 959                 };
 960
 961                 cmd {
 962                         pins = "sdc2_cmd";
 963                         bias-pull-up;
 964                         drive-strength = <10>;
 965                 };
 966
 967                 data {
 968                         pins = "sdc2_data";
 969                         bias-pull-up;
 970                         drive-strength = <10>;
 971                 };
 972         };
 973
 974         sdc2_card_det_n: sd-card-det-n {
 975                 pins = "gpio126";
 976                 function = "gpio";
 977                 bias-pull-up;
 978         };
 979
 980         wcd_intr_default: wcd_intr_default {
 981                 pins = "gpio54";
 982                 function = "gpio";
 983
 984                 input-enable;
 985                 bias-pull-down;
 986                 drive-strength = <2>;
 987         };
 988 };
 989
 990 &uart3 {
 991         label = "LS-UART0";
 992         status = "disabled";
 993 };
 994
 995 &uart6 {
 996         status = "okay";
 997
 998         bluetooth {
 999                 compatible = "qcom,wcn3990-bt";
1000
1001                 vddio-supply = <&vreg_s4a_1p8>;
1002                 vddxo-supply = <&vreg_l7a_1p8>;
1003                 vddrf-supply = <&vreg_l17a_1p3>;
1004                 vddch0-supply = <&vreg_l25a_3p3>;
1005                 max-speed = <3200000>;
1006         };
1007 };
1008
1009 &uart9 {
1010         label = "LS-UART1";
1011         status = "okay";
1012 };
1013
1014 &usb_1 {
1015         status = "okay";
1016 };
1017
1018 &usb_1_dwc3 {
1019         dr_mode = "peripheral";
1020 };
1021
1022 &usb_1_hsphy {
1023         status = "okay";
1024
1025         vdd-supply = <&vreg_l1a_0p875>;
1026         vdda-pll-supply = <&vreg_l12a_1p8>;
1027         vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1028
1029         qcom,imp-res-offset-value = <8>;
1030         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
1031         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
1032         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
1033 };
1034
1035 &usb_1_qmpphy {
1036         status = "okay";
1037
1038         vdda-phy-supply = <&vreg_l26a_1p2>;
1039         vdda-pll-supply = <&vreg_l1a_0p875>;
1040 };
1041
1042 &usb_2 {
1043         status = "okay";
1044 };
1045
1046 &usb_2_dwc3 {
1047         dr_mode = "host";
1048 };
1049
1050 &usb_2_hsphy {
1051         status = "okay";
1052
1053         vdd-supply = <&vreg_l1a_0p875>;
1054         vdda-pll-supply = <&vreg_l12a_1p8>;
1055         vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
1056
1057         qcom,imp-res-offset-value = <8>;
1058         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
1059 };
1060
1061 &usb_2_qmpphy {
1062         status = "okay";
1063
1064         vdda-phy-supply = <&vreg_l26a_1p2>;
1065         vdda-pll-supply = <&vreg_l1a_0p875>;
1066 };
1067
1068 &ufs_mem_hc {
1069         status = "okay";
1070
1071         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
1072
1073         vcc-supply = <&vreg_l20a_2p95>;
1074         vcc-max-microamp = <800000>;
1075 };
1076
1077 &ufs_mem_phy {
1078         status = "okay";
1079
1080         vdda-phy-supply = <&vreg_l1a_0p875>;
1081         vdda-pll-supply = <&vreg_l26a_1p2>;
1082 };
1083
1084 &venus {
1085         status = "okay";
1086 };
1087
1088 &wcd9340{
1089         pinctrl-0 = <&wcd_intr_default>;
1090         pinctrl-names = "default";
1091         clock-names = "extclk";
1092         clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
1093         reset-gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
1094         vdd-buck-supply = <&vreg_s4a_1p8>;
1095         vdd-buck-sido-supply = <&vreg_s4a_1p8>;
1096         vdd-tx-supply = <&vreg_s4a_1p8>;
1097         vdd-rx-supply = <&vreg_s4a_1p8>;
1098         vdd-io-supply = <&vreg_s4a_1p8>;
1099
1100         swm: swm@c85 {
1101                 left_spkr: wsa8810-left{
1102                         compatible = "sdw10217201000";
1103                         reg = <0 1>;
1104                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1105                         #thermal-sensor-cells = <0>;
1106                         sound-name-prefix = "SpkrLeft";
1107                         #sound-dai-cells = <0>;
1108                 };
1109
1110                 right_spkr: wsa8810-right{
1111                         compatible = "sdw10217201000";
1112                         powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
1113                         reg = <0 2>;
1114                         #thermal-sensor-cells = <0>;
1115                         sound-name-prefix = "SpkrRight";
1116                         #sound-dai-cells = <0>;
1117                 };
1118         };
1119 };
1120
1121 &wifi {
1122         status = "okay";
1123
1124         vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
1125         vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
1126         vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
1127         vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
1128
1129         qcom,snoc-host-cap-8bit-quirk;
1130         qcom,ath10k-calibration-variant = "Thundercomm_DB845C";
1131 };
1132
1133 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1134 &qup_spi2_default {
1135         pinconf {
1136                 pins = "gpio27", "gpio28", "gpio29", "gpio30";
1137                 drive-strength = <16>;
1138         };
1139 };
1140
1141 &qup_uart3_default{
1142         pinmux {
1143                 pins = "gpio41", "gpio42", "gpio43", "gpio44";
1144                 function = "qup3";
1145         };
1146 };
1147
1148 &qup_i2c10_default {
1149         pinconf {
1150                 pins = "gpio55", "gpio56";
1151                 drive-strength = <2>;
1152                 bias-disable;
1153         };
1154 };
1155
1156 &qup_uart6_default {
1157         pinmux {
1158                 pins = "gpio45", "gpio46", "gpio47", "gpio48";
1159                 function = "qup6";
1160         };
1161
1162         cts {
1163                 pins = "gpio45";
1164                 bias-disable;
1165         };
1166
1167         rts-tx {
1168                 pins = "gpio46", "gpio47";
1169                 drive-strength = <2>;
1170                 bias-disable;
1171         };
1172
1173         rx {
1174                 pins = "gpio48";
1175                 bias-pull-up;
1176         };
1177 };
1178
1179 &qup_uart9_default {
1180         pinconf-tx {
1181                 pins = "gpio4";
1182                 drive-strength = <2>;
1183                 bias-disable;
1184         };
1185
1186         pinconf-rx {
1187                 pins = "gpio5";
1188                 drive-strength = <2>;
1189                 bias-pull-up;
1190         };
1191 };
1192
1193 &pm8998_gpio {
1194
1195 };
1196
1197 &cci {
1198         status = "okay";
1199 };
1200
1201 &camss {
1202         vdda-phy-supply = <&vreg_l1a_0p875>;
1203         vdda-pll-supply = <&vreg_l26a_1p2>;
1204
1205         status = "ok";
1206
1207         ports {
1208                 #address-cells = <1>;
1209                 #size-cells = <0>;
1210                 port@0 {
1211                         reg = <0>;
1212                         csiphy0_ep: endpoint {
1213                                 data-lanes = <0 1 2 3>;
1214                                 remote-endpoint = <&ov8856_ep>;
1215                         };
1216                 };
1217         };
1218 };
1219
1220 &cci_i2c0 {
1221         camera@10 {
1222                 compatible = "ovti,ov8856";
1223                 reg = <0x10>;
1224
1225                 // CAM0_RST_N
1226                 reset-gpios = <&tlmm 9 GPIO_ACTIVE_LOW>;
1227                 pinctrl-names = "default";
1228                 pinctrl-0 = <&cam0_default>;
1229
1230                 clocks = <&clock_camcc CAM_CC_MCLK0_CLK>;
1231                 clock-names = "xvclk";
1232                 clock-frequency = <19200000>;
1233
1234                 /* The &vreg_s4a_1p8 trace is powered on as a,
1235                  * so it is represented by a fixed regulator.
1236                  *
1237                  * The 2.8V vdda-supply and 1.2V vddd-supply regulators
1238                  * both have to be enabled through the power management
1239                  * gpios.
1240                  */
1241                 dovdd-supply = <&vreg_lvs1a_1p8>;
1242                 avdd-supply = <&cam0_avdd_2v8>;
1243                 dvdd-supply = <&cam0_dvdd_1v2>;
1244
1245                 status = "ok";
1246
1247                 port {
1248                         ov8856_ep: endpoint {
1249                                 link-frequencies = /bits/ 64
1250                                         <360000000 180000000>;
1251                                 data-lanes = <1 2 3 4>;
1252                                 remote-endpoint = <&csiphy0_ep>;
1253                         };
1254                 };
1255         };
1256 };
1257
1258 &cci_i2c1 {
1259         camera@60 {
1260                 compatible = "ovti,ov7251";
1261
1262                 // I2C address as per ov7251.txt linux documentation
1263                 reg = <0x60>;
1264
1265                 // CAM3_RST_N
1266                 enable-gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
1267                 pinctrl-names = "default";
1268                 pinctrl-0 = <&cam3_default>;
1269
1270                 clocks = <&clock_camcc CAM_CC_MCLK3_CLK>;
1271                 clock-names = "xclk";
1272                 clock-frequency = <24000000>;
1273
1274                 /* The &vreg_s4a_1p8 trace always powered on.
1275                  *
1276                  * The 2.8V vdda-supply regulator is enabled when the
1277                  * vreg_s4a_1p8 trace is pulled high.
1278                  * It too is represented by a fixed regulator.
1279                  *
1280                  * No 1.2V vddd-supply regulator is used.
1281                  */
1282                 vdddo-supply = <&vreg_lvs1a_1p8>;
1283                 vdda-supply = <&cam3_avdd_2v8>;
1284
1285                 status = "disable";
1286
1287                 port {
1288                         ov7251_ep: endpoint {
1289                                 data-lanes = <0 1>;
1290 //                              remote-endpoint = <&csiphy3_ep>;
1291                         };
1292                 };
1293         };
1294 };
1295
1296 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1297 &qup_spi0_default {
1298         config {
1299                 drive-strength = <6>;
1300                 bias-disable;
1301         };
1302 };