arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Cheza device tree source (common between revisions)
   4  *
   5  * Copyright 2018 Google LLC.
   6  */
   7
   8 #include <dt-bindings/input/input.h>
   9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  10 #include "sdm845.dtsi"
  11
  12 /* PMICs depend on spmi_bus label and so must come after SoC */
  13 #include "pm8005.dtsi"
  14 #include "pm8998.dtsi"
  15
  16 / {
  17         aliases {
  18                 bluetooth0 = &bluetooth;
  19                 hsuart0 = &uart6;
  20                 serial0 = &uart9;
  21                 wifi0 = &wifi;
  22         };
  23
  24         chosen {
  25                 stdout-path = "serial0:115200n8";
  26         };
  27
  28         backlight: backlight {
  29                 compatible = "pwm-backlight";
  30                 pwms = <&cros_ec_pwm 0>;
  31                 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
  32                 power-supply = <&ppvar_sys>;
  33                 pinctrl-names = "default";
  34                 pinctrl-0 = <&ap_edp_bklten>;
  35         };
  36
  37         /* FIXED REGULATORS - parents above children */
  38
  39         /* This is the top level supply and variable voltage */
  40         ppvar_sys: ppvar-sys-regulator {
  41                 compatible = "regulator-fixed";
  42                 regulator-name = "ppvar_sys";
  43                 regulator-always-on;
  44                 regulator-boot-on;
  45         };
  46
  47         /* This divides ppvar_sys by 2, so voltage is variable */
  48         src_vph_pwr: src-vph-pwr-regulator {
  49                 compatible = "regulator-fixed";
  50                 regulator-name = "src_vph_pwr";
  51
  52                 /* EC turns on with switchcap_on_l; always on for AP */
  53                 regulator-always-on;
  54                 regulator-boot-on;
  55
  56                 vin-supply = <&ppvar_sys>;
  57         };
  58
  59         pp5000_a: pp5000-a-regulator {
  60                 compatible = "regulator-fixed";
  61                 regulator-name = "pp5000_a";
  62
  63                 /* EC turns on with en_pp5000_a; always on for AP */
  64                 regulator-always-on;
  65                 regulator-boot-on;
  66                 regulator-min-microvolt = <5000000>;
  67                 regulator-max-microvolt = <5000000>;
  68
  69                 vin-supply = <&ppvar_sys>;
  70         };
  71
  72         src_vreg_bob: src-vreg-bob-regulator {
  73                 compatible = "regulator-fixed";
  74                 regulator-name = "src_vreg_bob";
  75
  76                 /* EC turns on with vbob_en; always on for AP */
  77                 regulator-always-on;
  78                 regulator-boot-on;
  79                 regulator-min-microvolt = <3600000>;
  80                 regulator-max-microvolt = <3600000>;
  81
  82                 vin-supply = <&ppvar_sys>;
  83         };
  84
  85         pp3300_dx_edp: pp3300-dx-edp-regulator {
  86                 compatible = "regulator-fixed";
  87                 regulator-name = "pp3300_dx_edp";
  88
  89                 regulator-min-microvolt = <3300000>;
  90                 regulator-max-microvolt = <3300000>;
  91
  92                 gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
  93                 enable-active-high;
  94                 pinctrl-names = "default";
  95                 pinctrl-0 = <&en_pp3300_dx_edp>;
  96         };
  97
  98         /*
  99          * Apparently RPMh does not provide support for PM8998 S4 because it
 100          * is always-on; model it as a fixed regulator.
 101          */
 102         src_pp1800_s4a: pm8998-smps4 {
 103                 compatible = "regulator-fixed";
 104                 regulator-name = "src_pp1800_s4a";
 105
 106                 regulator-min-microvolt = <1800000>;
 107                 regulator-max-microvolt = <1800000>;
 108
 109                 regulator-always-on;
 110                 regulator-boot-on;
 111
 112                 vin-supply = <&src_vph_pwr>;
 113         };
 114
 115         /* BOARD-SPECIFIC TOP LEVEL NODES */
 116
 117         gpio-keys {
 118                 compatible = "gpio-keys";
 119                 pinctrl-names = "default";
 120                 pinctrl-0 = <&pen_eject_odl>;
 121
 122                 switch-pen-insert {
 123                         label = "Pen Insert";
 124                         /* Insert = low, eject = high */
 125                         gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
 126                         linux,code = <SW_PEN_INSERTED>;
 127                         linux,input-type = <EV_SW>;
 128                         wakeup-source;
 129                 };
 130         };
 131
 132         panel: panel {
 133                 compatible = "innolux,p120zdg-bf1";
 134                 power-supply = <&pp3300_dx_edp>;
 135                 backlight = <&backlight>;
 136                 no-hpd;
 137
 138                 ports {
 139                         panel_in: port {
 140                                 panel_in_edp: endpoint {
 141                                         remote-endpoint = <&sn65dsi86_out>;
 142                                 };
 143                         };
 144                 };
 145         };
 146 };
 147
 148 &cpufreq_hw {
 149         /delete-property/ interrupts-extended; /* reference to lmh_cluster[01] */
 150 };
 151
 152 &psci {
 153         /delete-node/ power-domain-cpu0;
 154         /delete-node/ power-domain-cpu1;
 155         /delete-node/ power-domain-cpu2;
 156         /delete-node/ power-domain-cpu3;
 157         /delete-node/ power-domain-cpu4;
 158         /delete-node/ power-domain-cpu5;
 159         /delete-node/ power-domain-cpu6;
 160         /delete-node/ power-domain-cpu7;
 161         /delete-node/ power-domain-cluster;
 162 };
 163
 164 &cpus {
 165         /delete-node/ domain-idle-states;
 166 };
 167
 168 &cpu_idle_states {
 169         LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
 170                 compatible = "arm,idle-state";
 171                 idle-state-name = "little-power-down";
 172                 arm,psci-suspend-param = <0x40000003>;
 173                 entry-latency-us = <350>;
 174                 exit-latency-us = <461>;
 175                 min-residency-us = <1890>;
 176                 local-timer-stop;
 177         };
 178
 179         LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
 180                 compatible = "arm,idle-state";
 181                 idle-state-name = "little-rail-power-down";
 182                 arm,psci-suspend-param = <0x40000004>;
 183                 entry-latency-us = <360>;
 184                 exit-latency-us = <531>;
 185                 min-residency-us = <3934>;
 186                 local-timer-stop;
 187         };
 188
 189         BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
 190                 compatible = "arm,idle-state";
 191                 idle-state-name = "big-power-down";
 192                 arm,psci-suspend-param = <0x40000003>;
 193                 entry-latency-us = <264>;
 194                 exit-latency-us = <621>;
 195                 min-residency-us = <952>;
 196                 local-timer-stop;
 197         };
 198
 199         BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
 200                 compatible = "arm,idle-state";
 201                 idle-state-name = "big-rail-power-down";
 202                 arm,psci-suspend-param = <0x40000004>;
 203                 entry-latency-us = <702>;
 204                 exit-latency-us = <1061>;
 205                 min-residency-us = <4488>;
 206                 local-timer-stop;
 207         };
 208
 209         CLUSTER_SLEEP_0: cluster-sleep-0 {
 210                 compatible = "arm,idle-state";
 211                 idle-state-name = "cluster-power-down";
 212                 arm,psci-suspend-param = <0x400000F4>;
 213                 entry-latency-us = <3263>;
 214                 exit-latency-us = <6562>;
 215                 min-residency-us = <9987>;
 216                 local-timer-stop;
 217         };
 218 };
 219
 220 &CPU0 {
 221         /delete-property/ power-domains;
 222         /delete-property/ power-domain-names;
 223         cpu-idle-states = <&LITTLE_CPU_SLEEP_0
 224                            &LITTLE_CPU_SLEEP_1
 225                            &CLUSTER_SLEEP_0>;
 226 };
 227
 228 &CPU1 {
 229         /delete-property/ power-domains;
 230         /delete-property/ power-domain-names;
 231         cpu-idle-states = <&LITTLE_CPU_SLEEP_0
 232                            &LITTLE_CPU_SLEEP_1
 233                            &CLUSTER_SLEEP_0>;
 234 };
 235
 236 &CPU2 {
 237         /delete-property/ power-domains;
 238         /delete-property/ power-domain-names;
 239         cpu-idle-states = <&LITTLE_CPU_SLEEP_0
 240                            &LITTLE_CPU_SLEEP_1
 241                            &CLUSTER_SLEEP_0>;
 242 };
 243
 244 &CPU3 {
 245         /delete-property/ power-domains;
 246         /delete-property/ power-domain-names;
 247         cpu-idle-states = <&LITTLE_CPU_SLEEP_0
 248                            &LITTLE_CPU_SLEEP_1
 249                            &CLUSTER_SLEEP_0>;
 250 };
 251
 252 &CPU4 {
 253         /delete-property/ power-domains;
 254         /delete-property/ power-domain-names;
 255         cpu-idle-states = <&BIG_CPU_SLEEP_0
 256                            &BIG_CPU_SLEEP_1
 257                            &CLUSTER_SLEEP_0>;
 258 };
 259
 260 &CPU5 {
 261         /delete-property/ power-domains;
 262         /delete-property/ power-domain-names;
 263         cpu-idle-states = <&BIG_CPU_SLEEP_0
 264                            &BIG_CPU_SLEEP_1
 265                            &CLUSTER_SLEEP_0>;
 266 };
 267
 268 &CPU6 {
 269         /delete-property/ power-domains;
 270         /delete-property/ power-domain-names;
 271         cpu-idle-states = <&BIG_CPU_SLEEP_0
 272                            &BIG_CPU_SLEEP_1
 273                            &CLUSTER_SLEEP_0>;
 274 };
 275
 276 &CPU7 {
 277         /delete-property/ power-domains;
 278         /delete-property/ power-domain-names;
 279         cpu-idle-states = <&BIG_CPU_SLEEP_0
 280                            &BIG_CPU_SLEEP_1
 281                            &CLUSTER_SLEEP_0>;
 282 };
 283
 284 &lmh_cluster0 {
 285         status = "disabled";
 286 };
 287
 288 &lmh_cluster1 {
 289         status = "disabled";
 290 };
 291
 292 /*
 293  * Reserved memory changes
 294  *
 295  * Putting this all together (out of order with the rest of the file) to keep
 296  * all modifications to the memory map (from sdm845.dtsi) in one place.
 297  */
 298
 299 /*
 300  * Our mpss_region is 8MB bigger than the default one and that conflicts
 301  * with venus_mem and cdsp_mem.
 302  *
 303  * For venus_mem we'll delete and re-create at a different address.
 304  *
 305  * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
 306  * that also means we need to delete cdsp_pas.
 307  */
 308 /delete-node/ &venus_mem;
 309 /delete-node/ &cdsp_mem;
 310 /delete-node/ &cdsp_pas;
 311 /delete-node/ &gpu_mem;
 312
 313 /* Increase the size from 120 MB to 128 MB */
 314 &mpss_region {
 315         reg = <0 0x8e000000 0 0x8000000>;
 316 };
 317
 318 /* Increase the size from 2MB to 8MB */
 319 &rmtfs_mem {
 320         reg = <0 0x88f00000 0 0x800000>;
 321 };
 322
 323 / {
 324         reserved-memory {
 325                 venus_mem: memory@96000000 {
 326                         reg = <0 0x96000000 0 0x500000>;
 327                         no-map;
 328                 };
 329         };
 330 };
 331
 332 &qspi {
 333         status = "okay";
 334         pinctrl-names = "default";
 335         pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
 336
 337         flash@0 {
 338                 compatible = "jedec,spi-nor";
 339                 reg = <0>;
 340
 341                 /*
 342                  * In theory chip supports up to 104 MHz and controller up
 343                  * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
 344                  * that for now.  b:117440651
 345                  */
 346                 spi-max-frequency = <25000000>;
 347                 spi-tx-bus-width = <2>;
 348                 spi-rx-bus-width = <2>;
 349         };
 350 };
 351
 352
 353 &apps_rsc {
 354         /delete-property/ power-domains;
 355
 356         regulators-0 {
 357                 compatible = "qcom,pm8998-rpmh-regulators";
 358                 qcom,pmic-id = "a";
 359
 360                 vdd-s1-supply = <&src_vph_pwr>;
 361                 vdd-s2-supply = <&src_vph_pwr>;
 362                 vdd-s3-supply = <&src_vph_pwr>;
 363                 vdd-s4-supply = <&src_vph_pwr>;
 364                 vdd-s5-supply = <&src_vph_pwr>;
 365                 vdd-s6-supply = <&src_vph_pwr>;
 366                 vdd-s7-supply = <&src_vph_pwr>;
 367                 vdd-s8-supply = <&src_vph_pwr>;
 368                 vdd-s9-supply = <&src_vph_pwr>;
 369                 vdd-s10-supply = <&src_vph_pwr>;
 370                 vdd-s11-supply = <&src_vph_pwr>;
 371                 vdd-s12-supply = <&src_vph_pwr>;
 372                 vdd-s13-supply = <&src_vph_pwr>;
 373                 vdd-l1-l27-supply = <&src_pp1025_s7a>;
 374                 vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
 375                 vdd-l3-l11-supply = <&src_pp1025_s7a>;
 376                 vdd-l4-l5-supply = <&src_pp1025_s7a>;
 377                 vdd-l6-supply = <&src_vph_pwr>;
 378                 vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
 379                 vdd-l9-supply = <&src_pp2040_s5a>;
 380                 vdd-l10-l23-l25-supply = <&src_vreg_bob>;
 381                 vdd-l13-l19-l21-supply = <&src_vreg_bob>;
 382                 vdd-l16-l28-supply = <&src_vreg_bob>;
 383                 vdd-l18-l22-supply = <&src_vreg_bob>;
 384                 vdd-l20-l24-supply = <&src_vreg_bob>;
 385                 vdd-l26-supply = <&src_pp1350_s3a>;
 386                 vin-lvs-1-2-supply = <&src_pp1800_s4a>;
 387
 388                 src_pp1125_s2a: smps2 {
 389                         regulator-min-microvolt = <1100000>;
 390                         regulator-max-microvolt = <1100000>;
 391                 };
 392
 393                 src_pp1350_s3a: smps3 {
 394                         regulator-min-microvolt = <1352000>;
 395                         regulator-max-microvolt = <1352000>;
 396                 };
 397
 398                 src_pp2040_s5a: smps5 {
 399                         regulator-min-microvolt = <1904000>;
 400                         regulator-max-microvolt = <2040000>;
 401                 };
 402
 403                 src_pp1025_s7a: smps7 {
 404                         regulator-min-microvolt = <900000>;
 405                         regulator-max-microvolt = <1028000>;
 406                 };
 407
 408                 vdd_qusb_hs0:
 409                 vdda_hp_pcie_core:
 410                 vdda_mipi_csi0_0p9:
 411                 vdda_mipi_csi1_0p9:
 412                 vdda_mipi_csi2_0p9:
 413                 vdda_mipi_dsi0_pll:
 414                 vdda_mipi_dsi1_pll:
 415                 vdda_qlink_lv:
 416                 vdda_qlink_lv_ck:
 417                 vdda_qrefs_0p875:
 418                 vdda_pcie_core:
 419                 vdda_pll_cc_ebi01:
 420                 vdda_pll_cc_ebi23:
 421                 vdda_sp_sensor:
 422                 vdda_ufs1_core:
 423                 vdda_ufs2_core:
 424                 vdda_usb1_ss_core:
 425                 vdda_usb2_ss_core:
 426                 src_pp875_l1a: ldo1 {
 427                         regulator-min-microvolt = <880000>;
 428                         regulator-max-microvolt = <880000>;
 429                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 430                 };
 431
 432                 vddpx_10:
 433                 src_pp1200_l2a: ldo2 {
 434                         regulator-min-microvolt = <1200000>;
 435                         regulator-max-microvolt = <1200000>;
 436                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 437
 438                         /* TODO: why??? */
 439                         regulator-always-on;
 440                 };
 441
 442                 pp1000_l3a_sdr845: ldo3 {
 443                         regulator-min-microvolt = <1000000>;
 444                         regulator-max-microvolt = <1000000>;
 445                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 446                 };
 447
 448                 vdd_wcss_cx:
 449                 vdd_wcss_mx:
 450                 vdda_wcss_pll:
 451                 src_pp800_l5a: ldo5 {
 452                         regulator-min-microvolt = <800000>;
 453                         regulator-max-microvolt = <800000>;
 454                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 455                 };
 456
 457                 vddpx_13:
 458                 src_pp1800_l6a: ldo6 {
 459                         regulator-min-microvolt = <1856000>;
 460                         regulator-max-microvolt = <1856000>;
 461                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 462                 };
 463
 464                 pp1800_l7a_wcn3990: ldo7 {
 465                         regulator-min-microvolt = <1800000>;
 466                         regulator-max-microvolt = <1800000>;
 467                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 468                 };
 469
 470                 src_pp1200_l8a: ldo8 {
 471                         regulator-min-microvolt = <1200000>;
 472                         regulator-max-microvolt = <1248000>;
 473                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 474                 };
 475
 476                 pp1800_dx_pen:
 477                 src_pp1800_l9a: ldo9 {
 478                         regulator-min-microvolt = <1800000>;
 479                         regulator-max-microvolt = <1800000>;
 480                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 481                 };
 482
 483                 src_pp1800_l10a: ldo10 {
 484                         regulator-min-microvolt = <1800000>;
 485                         regulator-max-microvolt = <1800000>;
 486                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 487                 };
 488
 489                 pp1000_l11a_sdr845: ldo11 {
 490                         regulator-min-microvolt = <1000000>;
 491                         regulator-max-microvolt = <1048000>;
 492                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 493                 };
 494
 495                 vdd_qfprom:
 496                 vdd_qfprom_sp:
 497                 vdda_apc1_cs_1p8:
 498                 vdda_gfx_cs_1p8:
 499                 vdda_qrefs_1p8:
 500                 vdda_qusb_hs0_1p8:
 501                 vddpx_11:
 502                 src_pp1800_l12a: ldo12 {
 503                         regulator-min-microvolt = <1800000>;
 504                         regulator-max-microvolt = <1800000>;
 505                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 506                 };
 507
 508                 vddpx_2:
 509                 src_pp2950_l13a: ldo13 {
 510                         regulator-min-microvolt = <1800000>;
 511                         regulator-max-microvolt = <2960000>;
 512                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 513                 };
 514
 515                 src_pp1800_l14a: ldo14 {
 516                         regulator-min-microvolt = <1800000>;
 517                         regulator-max-microvolt = <1800000>;
 518                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 519                 };
 520
 521                 src_pp1800_l15a: ldo15 {
 522                         regulator-min-microvolt = <1800000>;
 523                         regulator-max-microvolt = <1800000>;
 524                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 525                 };
 526
 527                 pp2700_l16a: ldo16 {
 528                         regulator-min-microvolt = <2704000>;
 529                         regulator-max-microvolt = <2704000>;
 530                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 531                 };
 532
 533                 src_pp1300_l17a: ldo17 {
 534                         regulator-min-microvolt = <1304000>;
 535                         regulator-max-microvolt = <1304000>;
 536                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 537                 };
 538
 539                 pp2700_l18a: ldo18 {
 540                         regulator-min-microvolt = <2704000>;
 541                         regulator-max-microvolt = <2960000>;
 542                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 543                 };
 544
 545                 /*
 546                  * NOTE: this rail should have been called
 547                  * src_pp3300_l19a in the schematic
 548                  */
 549                 src_pp3000_l19a: ldo19 {
 550                         regulator-min-microvolt = <3304000>;
 551                         regulator-max-microvolt = <3304000>;
 552
 553                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 554                 };
 555
 556                 src_pp2950_l20a: ldo20 {
 557                         regulator-min-microvolt = <2704000>;
 558                         regulator-max-microvolt = <2960000>;
 559                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 560                 };
 561
 562                 src_pp2950_l21a: ldo21 {
 563                         regulator-min-microvolt = <2704000>;
 564                         regulator-max-microvolt = <2960000>;
 565                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 566                 };
 567
 568                 pp3300_hub:
 569                 src_pp3300_l22a: ldo22 {
 570                         regulator-min-microvolt = <3304000>;
 571                         regulator-max-microvolt = <3304000>;
 572                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 573                         /*
 574                          * HACK: Should add a usb hub node and driver
 575                          * to turn this on and off at suspend/resume time
 576                          */
 577                         regulator-boot-on;
 578                         regulator-always-on;
 579                 };
 580
 581                 pp3300_l23a_ch1_wcn3990: ldo23 {
 582                         regulator-min-microvolt = <3000000>;
 583                         regulator-max-microvolt = <3312000>;
 584                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 585                 };
 586
 587                 vdda_qusb_hs0_3p1:
 588                 src_pp3075_l24a: ldo24 {
 589                         regulator-min-microvolt = <3088000>;
 590                         regulator-max-microvolt = <3088000>;
 591                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 592                 };
 593
 594                 pp3300_l25a_ch0_wcn3990: ldo25 {
 595                         regulator-min-microvolt = <3304000>;
 596                         regulator-max-microvolt = <3304000>;
 597                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 598                 };
 599
 600                 pp1200_hub:
 601                 vdda_hp_pcie_1p2:
 602                 vdda_hv_ebi0:
 603                 vdda_hv_ebi1:
 604                 vdda_hv_ebi2:
 605                 vdda_hv_ebi3:
 606                 vdda_mipi_csi_1p25:
 607                 vdda_mipi_dsi0_1p2:
 608                 vdda_mipi_dsi1_1p2:
 609                 vdda_pcie_1p2:
 610                 vdda_ufs1_1p2:
 611                 vdda_ufs2_1p2:
 612                 vdda_usb1_ss_1p2:
 613                 vdda_usb2_ss_1p2:
 614                 src_pp1200_l26a: ldo26 {
 615                         regulator-min-microvolt = <1200000>;
 616                         regulator-max-microvolt = <1200000>;
 617                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 618                 };
 619
 620                 pp3300_dx_pen:
 621                 src_pp3300_l28a: ldo28 {
 622                         regulator-min-microvolt = <3304000>;
 623                         regulator-max-microvolt = <3304000>;
 624                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 625                 };
 626
 627                 src_pp1800_lvs1: lvs1 {
 628                         regulator-min-microvolt = <1800000>;
 629                         regulator-max-microvolt = <1800000>;
 630                 };
 631
 632                 src_pp1800_lvs2: lvs2 {
 633                         regulator-min-microvolt = <1800000>;
 634                         regulator-max-microvolt = <1800000>;
 635                 };
 636         };
 637
 638         regulators-1 {
 639                 compatible = "qcom,pm8005-rpmh-regulators";
 640                 qcom,pmic-id = "c";
 641
 642                 vdd-s1-supply = <&src_vph_pwr>;
 643                 vdd-s2-supply = <&src_vph_pwr>;
 644                 vdd-s3-supply = <&src_vph_pwr>;
 645                 vdd-s4-supply = <&src_vph_pwr>;
 646
 647                 src_pp600_s3c: smps3 {
 648                         regulator-min-microvolt = <600000>;
 649                         regulator-max-microvolt = <600000>;
 650                 };
 651         };
 652 };
 653
 654 &dsi0 {
 655         status = "okay";
 656         vdda-supply = <&vdda_mipi_dsi0_1p2>;
 657
 658         ports {
 659                 port@1 {
 660                         endpoint {
 661                                 remote-endpoint = <&sn65dsi86_in>;
 662                                 data-lanes = <0 1 2 3>;
 663                         };
 664                 };
 665         };
 666 };
 667
 668 &dsi0_phy {
 669         status = "okay";
 670         vdds-supply = <&vdda_mipi_dsi0_pll>;
 671 };
 672
 673 edp_brij_i2c: &i2c3 {
 674         status = "okay";
 675         clock-frequency = <400000>;
 676
 677         sn65dsi86_bridge: bridge@2d {
 678                 compatible = "ti,sn65dsi86";
 679                 reg = <0x2d>;
 680                 pinctrl-names = "default";
 681                 pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
 682
 683                 interrupt-parent = <&tlmm>;
 684                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
 685
 686                 enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
 687
 688                 vpll-supply = <&src_pp1800_s4a>;
 689                 vccio-supply = <&src_pp1800_s4a>;
 690                 vcca-supply = <&src_pp1200_l2a>;
 691                 vcc-supply = <&src_pp1200_l2a>;
 692
 693                 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
 694                 clock-names = "refclk";
 695
 696                 no-hpd;
 697
 698                 ports {
 699                         #address-cells = <1>;
 700                         #size-cells = <0>;
 701
 702                         port@0 {
 703                                 reg = <0>;
 704                                 sn65dsi86_in: endpoint {
 705                                         remote-endpoint = <&dsi0_out>;
 706                                 };
 707                         };
 708
 709                         port@1 {
 710                                 reg = <1>;
 711                                 sn65dsi86_out: endpoint {
 712                                         remote-endpoint = <&panel_in_edp>;
 713                                 };
 714                         };
 715                 };
 716         };
 717 };
 718
 719 ap_pen_1v8: &i2c11 {
 720         status = "okay";
 721         clock-frequency = <400000>;
 722
 723         digitizer@9 {
 724                 compatible = "wacom,w9013", "hid-over-i2c";
 725                 reg = <0x9>;
 726                 pinctrl-names = "default";
 727                 pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
 728
 729                 vdd-supply = <&pp3300_dx_pen>;
 730                 vddl-supply = <&pp1800_dx_pen>;
 731                 post-power-on-delay-ms = <100>;
 732
 733                 interrupt-parent = <&tlmm>;
 734                 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 735
 736                 hid-descr-addr = <0x1>;
 737         };
 738 };
 739
 740 amp_i2c: &i2c12 {
 741         status = "okay";
 742         clock-frequency = <400000>;
 743 };
 744
 745 ap_ts_i2c: &i2c14 {
 746         status = "okay";
 747         clock-frequency = <400000>;
 748
 749         touchscreen@10 {
 750                 compatible = "elan,ekth3500";
 751                 reg = <0x10>;
 752                 pinctrl-names = "default";
 753                 pinctrl-0 = <&ts_int_l &ts_reset_l>;
 754
 755                 interrupt-parent = <&tlmm>;
 756                 interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
 757
 758                 vcc33-supply = <&src_pp3300_l28a>;
 759
 760                 reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
 761         };
 762 };
 763
 764 &gmu {
 765         status = "okay";
 766 };
 767
 768 &gpu {
 769         status = "okay";
 770 };
 771
 772 &ipa {
 773         status = "okay";
 774         modem-init;
 775 };
 776
 777 &lpasscc {
 778         status = "okay";
 779 };
 780
 781 &mdss {
 782         status = "okay";
 783 };
 784
 785 /*
 786  * Cheza fw does not properly program the GPU aperture to allow the
 787  * GPU to update the SMMU pagetables for context switches.  Work
 788  * around this by dropping the "qcom,adreno-smmu" compat string.
 789  */
 790 &adreno_smmu {
 791         compatible = "qcom,sdm845-smmu-v2", "qcom,smmu-v2";
 792 };
 793
 794 &mss_pil {
 795         status = "okay";
 796
 797         iommus = <&apps_smmu 0x781 0x0>,
 798                  <&apps_smmu 0x724 0x3>;
 799 };
 800
 801 &pm8998_pwrkey {
 802         status = "disabled";
 803 };
 804
 805 &qupv3_id_0 {
 806         status = "okay";
 807         iommus = <&apps_smmu 0x0 0x3>;
 808 };
 809
 810 &qupv3_id_1 {
 811         status = "okay";
 812         iommus = <&apps_smmu 0x6c0 0x3>;
 813 };
 814
 815 &sdhc_2 {
 816         status = "okay";
 817
 818         pinctrl-names = "default";
 819         pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
 820
 821         vmmc-supply = <&src_pp2950_l21a>;
 822         vqmmc-supply = <&vddpx_2>;
 823
 824         cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 825 };
 826
 827 &spi0 {
 828         status = "okay";
 829 };
 830
 831 &spi5 {
 832         status = "okay";
 833
 834         tpm@0 {
 835                 compatible = "google,cr50";
 836                 reg = <0>;
 837                 pinctrl-names = "default";
 838                 pinctrl-0 = <&h1_ap_int_odl>;
 839                 spi-max-frequency = <800000>;
 840                 interrupt-parent = <&tlmm>;
 841                 interrupts = <129 IRQ_TYPE_EDGE_RISING>;
 842         };
 843 };
 844
 845 &spi10 {
 846         status = "okay";
 847
 848         cros_ec: ec@0 {
 849                 compatible = "google,cros-ec-spi";
 850                 reg = <0>;
 851                 interrupt-parent = <&tlmm>;
 852                 interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
 853                 pinctrl-names = "default";
 854                 pinctrl-0 = <&ec_ap_int_l>;
 855                 spi-max-frequency = <3000000>;
 856
 857                 cros_ec_pwm: pwm {
 858                         compatible = "google,cros-ec-pwm";
 859                         #pwm-cells = <1>;
 860                 };
 861
 862                 i2c_tunnel: i2c-tunnel {
 863                         compatible = "google,cros-ec-i2c-tunnel";
 864                         google,remote-bus = <0>;
 865                         #address-cells = <1>;
 866                         #size-cells = <0>;
 867                 };
 868         };
 869 };
 870
 871 #include <arm/cros-ec-keyboard.dtsi>
 872 #include <arm/cros-ec-sbs.dtsi>
 873
 874 &uart6 {
 875         status = "okay";
 876
 877         bluetooth: wcn3990-bt {
 878                 compatible = "qcom,wcn3990-bt";
 879                 vddio-supply = <&src_pp1800_s4a>;
 880                 vddxo-supply = <&pp1800_l7a_wcn3990>;
 881                 vddrf-supply = <&src_pp1300_l17a>;
 882                 vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
 883                 max-speed = <3200000>;
 884         };
 885 };
 886
 887 &uart9 {
 888         status = "okay";
 889 };
 890
 891 &ufs_mem_hc {
 892         status = "okay";
 893
 894         reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
 895
 896         vcc-supply = <&src_pp2950_l20a>;
 897         vcc-max-microamp = <600000>;
 898 };
 899
 900 &ufs_mem_phy {
 901         status = "okay";
 902
 903         vdda-phy-supply = <&vdda_ufs1_core>;
 904         vdda-pll-supply = <&vdda_ufs1_1p2>;
 905 };
 906
 907 &usb_1 {
 908         status = "okay";
 909
 910         /* We'll use this as USB 2.0 only */
 911         qcom,select-utmi-as-pipe-clk;
 912 };
 913
 914 &usb_1_dwc3 {
 915         /*
 916          * The hardware design intends this port to be hooked up in peripheral
 917          * mode, so we'll hardcode it here.  Some details:
 918          * - SDM845 expects only a single Type C connector so it has only one
 919          *   native Type C port but cheza has two Type C connectors.
 920          * - The only source of DP is the single native Type C port.
 921          * - On cheza we want to be able to hook DP up to _either_ of the
 922          *   two Type C connectors and want to be able to achieve 4 lanes of DP.
 923          * - When you configure a Type C port for 4 lanes of DP you lose USB3.
 924          * - In order to make everything work, the native Type C port is always
 925          *   configured as 4-lanes DP so it's always available.
 926          * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
 927          *   sent to the two Type C connectors.
 928          * - The extra USB2 lines from the native Type C port are always
 929          *   setup as "peripheral" so that we can mux them over to one connector
 930          *   or the other if someone needs the connector configured as a gadget
 931          *   (but they only get USB2 speeds).
 932          *
 933          * All the hardware muxes would allow us to hook things up in different
 934          * ways to some potential benefit for static configurations (you could
 935          * achieve extra USB2 bandwidth by using two different ports for the
 936          * two connectors or possibly even get USB3 peripheral mode), but in
 937          * each case you end up forcing to disconnect/reconnect an in-use
 938          * USB session in some cases depending on what you hotplug into the
 939          * other connector.  Thus hardcoding this as peripheral makes sense.
 940          */
 941         dr_mode = "peripheral";
 942
 943         /*
 944          * We always need the high speed pins as 4-lanes DP in case someone
 945          * hotplugs a DP peripheral.  Thus limit this port to a max of high
 946          * speed.
 947          */
 948         maximum-speed = "high-speed";
 949
 950         /*
 951          * We don't need the usb3-phy since we run in highspeed mode always, so
 952          * re-define these properties removing the superspeed USB PHY reference.
 953          */
 954         phys = <&usb_1_hsphy>;
 955         phy-names = "usb2-phy";
 956 };
 957
 958 &usb_1_hsphy {
 959         status = "okay";
 960
 961         vdd-supply = <&vdda_usb1_ss_core>;
 962         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 963         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 964
 965         qcom,imp-res-offset-value = <8>;
 966         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
 967         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
 968         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
 969 };
 970
 971 &usb_2 {
 972         status = "okay";
 973 };
 974
 975 &usb_2_dwc3 {
 976         /* We have this hooked up to a hub and we always use in host mode */
 977         dr_mode = "host";
 978 };
 979
 980 &usb_2_hsphy {
 981         status = "okay";
 982
 983         vdd-supply = <&vdda_usb2_ss_core>;
 984         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 985         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 986
 987         qcom,imp-res-offset-value = <8>;
 988         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
 989 };
 990
 991 &usb_2_qmpphy {
 992         status = "okay";
 993
 994         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
 995         vdda-pll-supply = <&vdda_usb2_ss_core>;
 996 };
 997
 998 &wifi {
 999         status = "okay";
1000
1001         vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
1002         vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
1003         vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
1004         vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
1005 };
1006
1007 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
1008
1009 &qspi_cs0 {
1010         pinconf {
1011                 pins = "gpio90";
1012                 bias-disable;
1013         };
1014 };
1015
1016 &qspi_clk {
1017         pinconf {
1018                 pins = "gpio95";
1019                 bias-disable;
1020         };
1021 };
1022
1023 &qspi_data01 {
1024         pinconf {
1025                 pins = "gpio91", "gpio92";
1026
1027                 /* High-Z when no transfers; nice to park the lines */
1028                 bias-pull-up;
1029         };
1030 };
1031
1032 &qup_i2c3_default {
1033         pinconf {
1034                 pins = "gpio41", "gpio42";
1035                 drive-strength = <2>;
1036
1037                 /* Has external pullup */
1038                 bias-disable;
1039         };
1040 };
1041
1042 &qup_i2c11_default {
1043         pinconf {
1044                 pins = "gpio31", "gpio32";
1045                 drive-strength = <2>;
1046
1047                 /* Has external pullup */
1048                 bias-disable;
1049         };
1050 };
1051
1052 &qup_i2c12_default {
1053         pinconf {
1054                 pins = "gpio49", "gpio50";
1055                 drive-strength = <2>;
1056
1057                 /* Has external pullup */
1058                 bias-disable;
1059         };
1060 };
1061
1062 &qup_i2c14_default {
1063         pinconf {
1064                 pins = "gpio33", "gpio34";
1065                 drive-strength = <2>;
1066
1067                 /* Has external pullup */
1068                 bias-disable;
1069         };
1070 };
1071
1072 &qup_spi0_default {
1073         pinconf {
1074                 pins = "gpio0", "gpio1", "gpio2", "gpio3";
1075                 drive-strength = <2>;
1076                 bias-disable;
1077         };
1078 };
1079
1080 &qup_spi5_default {
1081         pinconf {
1082                 pins = "gpio85", "gpio86", "gpio87", "gpio88";
1083                 drive-strength = <2>;
1084                 bias-disable;
1085         };
1086 };
1087
1088 &qup_spi10_default {
1089         pinconf {
1090                 pins = "gpio53", "gpio54", "gpio55", "gpio56";
1091                 drive-strength = <2>;
1092                 bias-disable;
1093         };
1094 };
1095
1096 &qup_uart6_default {
1097         /* Change pinmux to all 4 pins since CTS and RTS are connected */
1098         pinmux {
1099                 pins = "gpio45", "gpio46",
1100                        "gpio47", "gpio48";
1101         };
1102
1103         pinconf-cts {
1104                 /*
1105                  * Configure a pull-down on 45 (CTS) to match the pull of
1106                  * the Bluetooth module.
1107                  */
1108                 pins = "gpio45";
1109                 bias-pull-down;
1110         };
1111
1112         pinconf-rts-tx {
1113                 /* We'll drive 46 (RTS) and 47 (TX), so no pull */
1114                 pins = "gpio46", "gpio47";
1115                 drive-strength = <2>;
1116                 bias-disable;
1117         };
1118
1119         pinconf-rx {
1120                 /*
1121                  * Configure a pull-up on 48 (RX). This is needed to avoid
1122                  * garbage data when the TX pin of the Bluetooth module is
1123                  * in tri-state (module powered off or not driving the
1124                  * signal yet).
1125                  */
1126                 pins = "gpio48";
1127                 bias-pull-up;
1128         };
1129 };
1130
1131 &qup_uart9_default {
1132         pinconf-tx {
1133                 pins = "gpio4";
1134                 drive-strength = <2>;
1135                 bias-disable;
1136         };
1137
1138         pinconf-rx {
1139                 pins = "gpio5";
1140                 drive-strength = <2>;
1141                 bias-pull-up;
1142         };
1143 };
1144
1145 /* PINCTRL - board-specific pinctrl */
1146 &pm8005_gpio {
1147         gpio-line-names = "",
1148                           "",
1149                           "SLB",
1150                           "";
1151 };
1152
1153 &pm8998_adc {
1154         adc-chan@4d {
1155                 reg = <ADC5_AMUX_THM1_100K_PU>;
1156                 label = "sdm_temp";
1157         };
1158
1159         adc-chan@4e {
1160                 reg = <ADC5_AMUX_THM2_100K_PU>;
1161                 label = "quiet_temp";
1162         };
1163
1164         adc-chan@4f {
1165                 reg = <ADC5_AMUX_THM3_100K_PU>;
1166                 label = "lte_temp_1";
1167         };
1168
1169         adc-chan@50 {
1170                 reg = <ADC5_AMUX_THM4_100K_PU>;
1171                 label = "lte_temp_2";
1172         };
1173
1174         adc-chan@51 {
1175                 reg = <ADC5_AMUX_THM5_100K_PU>;
1176                 label = "charger_temp";
1177         };
1178 };
1179
1180 &pm8998_gpio {
1181         gpio-line-names = "",
1182                           "",
1183                           "SW_CTRL",
1184                           "",
1185                           "",
1186                           "",
1187                           "",
1188                           "",
1189                           "",
1190                           "",
1191                           "",
1192                           "",
1193                           "",
1194                           "",
1195                           "",
1196                           "",
1197                           "",
1198                           "",
1199                           "",
1200                           "",
1201                           "",
1202                           "CFG_OPT1",
1203                           "WCSS_PWR_REQ",
1204                           "",
1205                           "CFG_OPT2",
1206                           "SLB";
1207 };
1208
1209 &tlmm {
1210         /*
1211          * pinctrl settings for pins that have no real owners.
1212          */
1213         pinctrl-names = "default", "sleep";
1214         pinctrl-0 = <&bios_flash_wp_r_l>,
1215                     <&ap_suspend_l_deassert>;
1216
1217         pinctrl-1 = <&bios_flash_wp_r_l>,
1218                     <&ap_suspend_l_assert>;
1219
1220         /*
1221          * Hogs prevent usermode from changing the value. A GPIO can be both
1222          * here and in the pinctrl section.
1223          */
1224         ap-suspend-l-hog {
1225                 gpio-hog;
1226                 gpios = <126 GPIO_ACTIVE_LOW>;
1227                 output-low;
1228         };
1229
1230         ap_edp_bklten: ap-edp-bklten {
1231                 pinmux {
1232                         pins = "gpio37";
1233                         function = "gpio";
1234                 };
1235
1236                 pinconf {
1237                         pins = "gpio37";
1238                         drive-strength = <2>;
1239                         bias-disable;
1240                 };
1241         };
1242
1243         bios_flash_wp_r_l: bios-flash-wp-r-l {
1244                 pinmux {
1245                         pins = "gpio128";
1246                         function = "gpio";
1247                         input-enable;
1248                 };
1249
1250                 pinconf {
1251                         pins = "gpio128";
1252                         bias-disable;
1253                 };
1254         };
1255
1256         ec_ap_int_l: ec-ap-int-l {
1257                 pinmux {
1258                        pins = "gpio122";
1259                        function = "gpio";
1260                        input-enable;
1261                 };
1262
1263                 pinconf {
1264                        pins = "gpio122";
1265                        bias-pull-up;
1266                 };
1267         };
1268
1269         edp_brij_en: edp-brij-en {
1270                 pinmux {
1271                         pins = "gpio102";
1272                         function = "gpio";
1273                 };
1274
1275                 pinconf {
1276                         pins = "gpio102";
1277                         drive-strength = <2>;
1278                         bias-disable;
1279                 };
1280         };
1281
1282         edp_brij_irq: edp-brij-irq {
1283                 pinmux {
1284                         pins = "gpio10";
1285                         function = "gpio";
1286                 };
1287
1288                 pinconf {
1289                         pins = "gpio10";
1290                         drive-strength = <2>;
1291                         bias-pull-down;
1292                 };
1293         };
1294
1295         en_pp3300_dx_edp: en-pp3300-dx-edp {
1296                 pinmux {
1297                         pins = "gpio43";
1298                         function = "gpio";
1299                 };
1300
1301                 pinconf {
1302                         pins = "gpio43";
1303                         drive-strength = <2>;
1304                         bias-disable;
1305                 };
1306         };
1307
1308         h1_ap_int_odl: h1-ap-int-odl {
1309                 pinmux {
1310                         pins = "gpio129";
1311                         function = "gpio";
1312                         input-enable;
1313                 };
1314
1315                 pinconf {
1316                         pins = "gpio129";
1317                         bias-pull-up;
1318                 };
1319         };
1320
1321         pen_eject_odl: pen-eject-odl {
1322                 pinmux {
1323                         pins = "gpio119";
1324                         function = "gpio";
1325                         bias-pull-up;
1326                 };
1327         };
1328
1329         pen_irq_l: pen-irq-l {
1330                 pinmux {
1331                         pins = "gpio24";
1332                         function = "gpio";
1333                 };
1334
1335                 pinconf {
1336                         pins = "gpio24";
1337
1338                         /* Has external pullup */
1339                         bias-disable;
1340                 };
1341         };
1342
1343         pen_pdct_l: pen-pdct-l {
1344                 pinmux {
1345                         pins = "gpio63";
1346                         function = "gpio";
1347                 };
1348
1349                 pinconf {
1350                         pins = "gpio63";
1351
1352                         /* Has external pullup */
1353                         bias-disable;
1354                 };
1355         };
1356
1357         pen_rst_l: pen-rst-l {
1358                 pinmux  {
1359                         pins = "gpio23";
1360                         function = "gpio";
1361                 };
1362
1363                 pinconf {
1364                         pins = "gpio23";
1365                         bias-disable;
1366                         drive-strength = <2>;
1367
1368                         /*
1369                          * The pen driver doesn't currently support
1370                          * driving this reset line.  By specifying
1371                          * output-high here we're relying on the fact
1372                          * that this pin has a default pulldown at boot
1373                          * (which makes sure the pen was in reset if it
1374                          * was powered) and then we set it high here to
1375                          * take it out of reset.  Better would be if the
1376                          * pen driver could control this and we could
1377                          * remove "output-high" here.
1378                          */
1379                         output-high;
1380                 };
1381         };
1382
1383         sdc2_clk: sdc2-clk {
1384                 pinconf {
1385                         pins = "sdc2_clk";
1386                         bias-disable;
1387
1388                         /*
1389                          * It seems that mmc_test reports errors if drive
1390                          * strength is not 16.
1391                          */
1392                         drive-strength = <16>;
1393                 };
1394         };
1395
1396         sdc2_cmd: sdc2-cmd {
1397                 pinconf {
1398                         pins = "sdc2_cmd";
1399                         bias-pull-up;
1400                         drive-strength = <16>;
1401                 };
1402         };
1403
1404         sdc2_data: sdc2-data {
1405                 pinconf {
1406                         pins = "sdc2_data";
1407                         bias-pull-up;
1408                         drive-strength = <16>;
1409                 };
1410         };
1411
1412         sd_cd_odl: sd-cd-odl {
1413                 pinmux {
1414                         pins = "gpio44";
1415                         function = "gpio";
1416                 };
1417
1418                 pinconf {
1419                         pins = "gpio44";
1420                         bias-pull-up;
1421                 };
1422         };
1423
1424         ts_int_l: ts-int-l {
1425                 pinmux  {
1426                         pins = "gpio125";
1427                         function = "gpio";
1428                 };
1429
1430                 pinconf {
1431                         pins = "gpio125";
1432                         bias-pull-up;
1433                 };
1434         };
1435
1436         ts_reset_l: ts-reset-l {
1437                 pinmux  {
1438                         pins = "gpio118";
1439                         function = "gpio";
1440                 };
1441
1442                 pinconf {
1443                         pins = "gpio118";
1444                         bias-disable;
1445                         drive-strength = <2>;
1446                 };
1447         };
1448
1449         ap_suspend_l_assert: ap_suspend_l_assert {
1450                 config {
1451                         pins = "gpio126";
1452                         function = "gpio";
1453                         bias-disable;
1454                         drive-strength = <2>;
1455                         output-low;
1456                 };
1457         };
1458
1459         ap_suspend_l_deassert: ap_suspend_l_deassert {
1460                 config {
1461                         pins = "gpio126";
1462                         function = "gpio";
1463                         bias-disable;
1464                         drive-strength = <2>;
1465                         output-high;
1466                 };
1467         };
1468 };
1469
1470 &venus {
1471         status = "okay";
1472
1473         video-firmware {
1474                 iommus = <&apps_smmu 0x10b2 0x0>;
1475         };
1476 };