arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Cheza device tree source (common between revisions)
   4  *
   5  * Copyright 2018 Google LLC.
   6  */
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
  11 #include "sdm845.dtsi"
  12
  13 /* PMICs depend on spmi_bus label and so must come after SoC */
  14 #include "pm8005.dtsi"
  15 #include "pm8998.dtsi"
  16
  17 / {
  18         aliases {
  19                 bluetooth0 = &bluetooth;
  20                 hsuart0 = &uart6;
  21                 serial0 = &uart9;
  22                 wifi0 = &wifi;
  23         };
  24
  25         chosen {
  26                 stdout-path = "serial0:115200n8";
  27         };
  28
  29         backlight: backlight {
  30                 compatible = "pwm-backlight";
  31                 pwms = <&cros_ec_pwm 0>;
  32                 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
  33                 power-supply = <&ppvar_sys>;
  34                 pinctrl-names = "default";
  35                 pinctrl-0 = <&ap_edp_bklten>;
  36         };
  37
  38         /* FIXED REGULATORS - parents above children */
  39
  40         /* This is the top level supply and variable voltage */
  41         ppvar_sys: ppvar-sys-regulator {
  42                 compatible = "regulator-fixed";
  43                 regulator-name = "ppvar_sys";
  44                 regulator-always-on;
  45                 regulator-boot-on;
  46         };
  47
  48         /* This divides ppvar_sys by 2, so voltage is variable */
  49         src_vph_pwr: src-vph-pwr-regulator {
  50                 compatible = "regulator-fixed";
  51                 regulator-name = "src_vph_pwr";
  52
  53                 /* EC turns on with switchcap_on_l; always on for AP */
  54                 regulator-always-on;
  55                 regulator-boot-on;
  56
  57                 vin-supply = <&ppvar_sys>;
  58         };
  59
  60         pp5000_a: pp5000-a-regulator {
  61                 compatible = "regulator-fixed";
  62                 regulator-name = "pp5000_a";
  63
  64                 /* EC turns on with en_pp5000_a; always on for AP */
  65                 regulator-always-on;
  66                 regulator-boot-on;
  67                 regulator-min-microvolt = <5000000>;
  68                 regulator-max-microvolt = <5000000>;
  69
  70                 vin-supply = <&ppvar_sys>;
  71         };
  72
  73         src_vreg_bob: src-vreg-bob-regulator {
  74                 compatible = "regulator-fixed";
  75                 regulator-name = "src_vreg_bob";
  76
  77                 /* EC turns on with vbob_en; always on for AP */
  78                 regulator-always-on;
  79                 regulator-boot-on;
  80                 regulator-min-microvolt = <3600000>;
  81                 regulator-max-microvolt = <3600000>;
  82
  83                 vin-supply = <&ppvar_sys>;
  84         };
  85
  86         pp3300_dx_edp: pp3300-dx-edp-regulator {
  87                 compatible = "regulator-fixed";
  88                 regulator-name = "pp3300_dx_edp";
  89
  90                 regulator-min-microvolt = <3300000>;
  91                 regulator-max-microvolt = <3300000>;
  92
  93                 gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
  94                 enable-active-high;
  95                 pinctrl-names = "default";
  96                 pinctrl-0 = <&en_pp3300_dx_edp>;
  97         };
  98
  99         /*
 100          * Apparently RPMh does not provide support for PM8998 S4 because it
 101          * is always-on; model it as a fixed regulator.
 102          */
 103         src_pp1800_s4a: pm8998-smps4 {
 104                 compatible = "regulator-fixed";
 105                 regulator-name = "src_pp1800_s4a";
 106
 107                 regulator-min-microvolt = <1800000>;
 108                 regulator-max-microvolt = <1800000>;
 109
 110                 regulator-always-on;
 111                 regulator-boot-on;
 112
 113                 vin-supply = <&src_vph_pwr>;
 114         };
 115
 116         /* BOARD-SPECIFIC TOP LEVEL NODES */
 117
 118         gpio-keys {
 119                 compatible = "gpio-keys";
 120                 pinctrl-names = "default";
 121                 pinctrl-0 = <&pen_eject_odl>;
 122
 123                 pen-insert {
 124                         label = "Pen Insert";
 125                         /* Insert = low, eject = high */
 126                         gpios = <&tlmm 119 GPIO_ACTIVE_LOW>;
 127                         linux,code = <SW_PEN_INSERTED>;
 128                         linux,input-type = <EV_SW>;
 129                         wakeup-source;
 130                 };
 131         };
 132
 133         panel: panel {
 134                 compatible ="innolux,p120zdg-bf1";
 135                 power-supply = <&pp3300_dx_edp>;
 136                 backlight = <&backlight>;
 137                 no-hpd;
 138
 139                 ports {
 140                         panel_in: port {
 141                                 panel_in_edp: endpoint {
 142                                         remote-endpoint = <&sn65dsi86_out>;
 143                                 };
 144                         };
 145                 };
 146         };
 147 };
 148
 149 /*
 150  * Reserved memory changes
 151  *
 152  * Putting this all together (out of order with the rest of the file) to keep
 153  * all modifications to the memory map (from sdm845.dtsi) in one place.
 154  */
 155
 156 /*
 157  * Our mpss_region is 8MB bigger than the default one and that conflicts
 158  * with venus_mem and cdsp_mem.
 159  *
 160  * For venus_mem we'll delete and re-create at a different address.
 161  *
 162  * cdsp_mem isn't used on cheza right now so we won't bother re-creating it; but
 163  * that also means we need to delete cdsp_pas.
 164  */
 165 /delete-node/ &venus_mem;
 166 /delete-node/ &cdsp_mem;
 167 /delete-node/ &cdsp_pas;
 168 /delete-node/ &zap_shader;
 169 /delete-node/ &gpu_mem;
 170
 171 /* Increase the size from 120 MB to 128 MB */
 172 &mpss_region {
 173         reg = <0 0x8e000000 0 0x8000000>;
 174 };
 175
 176 /* Increase the size from 2MB to 8MB */
 177 &rmtfs_mem {
 178         reg = <0 0x88f00000 0 0x800000>;
 179 };
 180
 181 / {
 182         reserved-memory {
 183                 venus_mem: memory@96000000 {
 184                         reg = <0 0x96000000 0 0x500000>;
 185                         no-map;
 186                 };
 187         };
 188 };
 189
 190 &qspi {
 191         status = "okay";
 192         pinctrl-names = "default";
 193         pinctrl-0 = <&qspi_clk &qspi_cs0 &qspi_data01>;
 194
 195         flash@0 {
 196                 compatible = "jedec,spi-nor";
 197                 reg = <0>;
 198
 199                 /*
 200                  * In theory chip supports up to 104 MHz and controller up
 201                  * to 80 MHz, but above 25 MHz wasn't reliable so we'll use
 202                  * that for now.  b:117440651
 203                  */
 204                 spi-max-frequency = <25000000>;
 205                 spi-tx-bus-width = <2>;
 206                 spi-rx-bus-width = <2>;
 207         };
 208 };
 209
 210
 211 &apps_rsc {
 212         pm8998-rpmh-regulators {
 213                 compatible = "qcom,pm8998-rpmh-regulators";
 214                 qcom,pmic-id = "a";
 215
 216                 vdd-s1-supply = <&src_vph_pwr>;
 217                 vdd-s2-supply = <&src_vph_pwr>;
 218                 vdd-s3-supply = <&src_vph_pwr>;
 219                 vdd-s4-supply = <&src_vph_pwr>;
 220                 vdd-s5-supply = <&src_vph_pwr>;
 221                 vdd-s6-supply = <&src_vph_pwr>;
 222                 vdd-s7-supply = <&src_vph_pwr>;
 223                 vdd-s8-supply = <&src_vph_pwr>;
 224                 vdd-s9-supply = <&src_vph_pwr>;
 225                 vdd-s10-supply = <&src_vph_pwr>;
 226                 vdd-s11-supply = <&src_vph_pwr>;
 227                 vdd-s12-supply = <&src_vph_pwr>;
 228                 vdd-s13-supply = <&src_vph_pwr>;
 229                 vdd-l1-l27-supply = <&src_pp1025_s7a>;
 230                 vdd-l2-l8-l17-supply = <&src_pp1350_s3a>;
 231                 vdd-l3-l11-supply = <&src_pp1025_s7a>;
 232                 vdd-l4-l5-supply = <&src_pp1025_s7a>;
 233                 vdd-l6-supply = <&src_vph_pwr>;
 234                 vdd-l7-l12-l14-l15-supply = <&src_pp2040_s5a>;
 235                 vdd-l9-supply = <&src_pp2040_s5a>;
 236                 vdd-l10-l23-l25-supply = <&src_vreg_bob>;
 237                 vdd-l13-l19-l21-supply = <&src_vreg_bob>;
 238                 vdd-l16-l28-supply = <&src_vreg_bob>;
 239                 vdd-l18-l22-supply = <&src_vreg_bob>;
 240                 vdd-l20-l24-supply = <&src_vreg_bob>;
 241                 vdd-l26-supply = <&src_pp1350_s3a>;
 242                 vin-lvs-1-2-supply = <&src_pp1800_s4a>;
 243
 244                 src_pp1125_s2a: smps2 {
 245                         regulator-min-microvolt = <1100000>;
 246                         regulator-max-microvolt = <1100000>;
 247                 };
 248
 249                 src_pp1350_s3a: smps3 {
 250                         regulator-min-microvolt = <1352000>;
 251                         regulator-max-microvolt = <1352000>;
 252                 };
 253
 254                 src_pp2040_s5a: smps5 {
 255                         regulator-min-microvolt = <1904000>;
 256                         regulator-max-microvolt = <2040000>;
 257                 };
 258
 259                 src_pp1025_s7a: smps7 {
 260                         regulator-min-microvolt = <900000>;
 261                         regulator-max-microvolt = <1028000>;
 262                 };
 263
 264                 vdd_qusb_hs0:
 265                 vdda_hp_pcie_core:
 266                 vdda_mipi_csi0_0p9:
 267                 vdda_mipi_csi1_0p9:
 268                 vdda_mipi_csi2_0p9:
 269                 vdda_mipi_dsi0_pll:
 270                 vdda_mipi_dsi1_pll:
 271                 vdda_qlink_lv:
 272                 vdda_qlink_lv_ck:
 273                 vdda_qrefs_0p875:
 274                 vdda_pcie_core:
 275                 vdda_pll_cc_ebi01:
 276                 vdda_pll_cc_ebi23:
 277                 vdda_sp_sensor:
 278                 vdda_ufs1_core:
 279                 vdda_ufs2_core:
 280                 vdda_usb1_ss_core:
 281                 vdda_usb2_ss_core:
 282                 src_pp875_l1a: ldo1 {
 283                         regulator-min-microvolt = <880000>;
 284                         regulator-max-microvolt = <880000>;
 285                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 286                 };
 287
 288                 vddpx_10:
 289                 src_pp1200_l2a: ldo2 {
 290                         regulator-min-microvolt = <1200000>;
 291                         regulator-max-microvolt = <1200000>;
 292                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 293
 294                         /* TODO: why??? */
 295                         regulator-always-on;
 296                 };
 297
 298                 pp1000_l3a_sdr845: ldo3 {
 299                         regulator-min-microvolt = <1000000>;
 300                         regulator-max-microvolt = <1000000>;
 301                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 302                 };
 303
 304                 vdd_wcss_cx:
 305                 vdd_wcss_mx:
 306                 vdda_wcss_pll:
 307                 src_pp800_l5a: ldo5 {
 308                         regulator-min-microvolt = <800000>;
 309                         regulator-max-microvolt = <800000>;
 310                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 311                 };
 312
 313                 vddpx_13:
 314                 src_pp1800_l6a: ldo6 {
 315                         regulator-min-microvolt = <1856000>;
 316                         regulator-max-microvolt = <1856000>;
 317                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 318                 };
 319
 320                 pp1800_l7a_wcn3990: ldo7 {
 321                         regulator-min-microvolt = <1800000>;
 322                         regulator-max-microvolt = <1800000>;
 323                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 324                 };
 325
 326                 src_pp1200_l8a: ldo8 {
 327                         regulator-min-microvolt = <1200000>;
 328                         regulator-max-microvolt = <1248000>;
 329                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 330                 };
 331
 332                 pp1800_dx_pen:
 333                 src_pp1800_l9a: ldo9 {
 334                         regulator-min-microvolt = <1800000>;
 335                         regulator-max-microvolt = <1800000>;
 336                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 337                 };
 338
 339                 src_pp1800_l10a: ldo10 {
 340                         regulator-min-microvolt = <1800000>;
 341                         regulator-max-microvolt = <1800000>;
 342                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 343                 };
 344
 345                 pp1000_l11a_sdr845: ldo11 {
 346                         regulator-min-microvolt = <1000000>;
 347                         regulator-max-microvolt = <1048000>;
 348                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 349                 };
 350
 351                 vdd_qfprom:
 352                 vdd_qfprom_sp:
 353                 vdda_apc1_cs_1p8:
 354                 vdda_gfx_cs_1p8:
 355                 vdda_qrefs_1p8:
 356                 vdda_qusb_hs0_1p8:
 357                 vddpx_11:
 358                 src_pp1800_l12a: ldo12 {
 359                         regulator-min-microvolt = <1800000>;
 360                         regulator-max-microvolt = <1800000>;
 361                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 362                 };
 363
 364                 vddpx_2:
 365                 src_pp2950_l13a: ldo13 {
 366                         regulator-min-microvolt = <1800000>;
 367                         regulator-max-microvolt = <2960000>;
 368                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 369                 };
 370
 371                 src_pp1800_l14a: ldo14 {
 372                         regulator-min-microvolt = <1800000>;
 373                         regulator-max-microvolt = <1800000>;
 374                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 375                 };
 376
 377                 src_pp1800_l15a: ldo15 {
 378                         regulator-min-microvolt = <1800000>;
 379                         regulator-max-microvolt = <1800000>;
 380                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 381                 };
 382
 383                 pp2700_l16a: ldo16 {
 384                         regulator-min-microvolt = <2704000>;
 385                         regulator-max-microvolt = <2704000>;
 386                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 387                 };
 388
 389                 src_pp1300_l17a: ldo17 {
 390                         regulator-min-microvolt = <1304000>;
 391                         regulator-max-microvolt = <1304000>;
 392                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 393                 };
 394
 395                 pp2700_l18a: ldo18 {
 396                         regulator-min-microvolt = <2704000>;
 397                         regulator-max-microvolt = <2960000>;
 398                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 399                 };
 400
 401                 /*
 402                  * NOTE: this rail should have been called
 403                  * src_pp3300_l19a in the schematic
 404                  */
 405                 src_pp3000_l19a: ldo19 {
 406                         regulator-min-microvolt = <3304000>;
 407                         regulator-max-microvolt = <3304000>;
 408
 409                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 410                 };
 411
 412                 src_pp2950_l20a: ldo20 {
 413                         regulator-min-microvolt = <2704000>;
 414                         regulator-max-microvolt = <2960000>;
 415                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 416                 };
 417
 418                 src_pp2950_l21a: ldo21 {
 419                         regulator-min-microvolt = <2704000>;
 420                         regulator-max-microvolt = <2960000>;
 421                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 422                 };
 423
 424                 pp3300_hub:
 425                 src_pp3300_l22a: ldo22 {
 426                         regulator-min-microvolt = <3304000>;
 427                         regulator-max-microvolt = <3304000>;
 428                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 429                         /*
 430                          * HACK: Should add a usb hub node and driver
 431                          * to turn this on and off at suspend/resume time
 432                          */
 433                         regulator-boot-on;
 434                         regulator-always-on;
 435                 };
 436
 437                 pp3300_l23a_ch1_wcn3990: ldo23 {
 438                         regulator-min-microvolt = <3000000>;
 439                         regulator-max-microvolt = <3312000>;
 440                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 441                 };
 442
 443                 vdda_qusb_hs0_3p1:
 444                 src_pp3075_l24a: ldo24 {
 445                         regulator-min-microvolt = <3088000>;
 446                         regulator-max-microvolt = <3088000>;
 447                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 448                 };
 449
 450                 pp3300_l25a_ch0_wcn3990: ldo25 {
 451                         regulator-min-microvolt = <3304000>;
 452                         regulator-max-microvolt = <3304000>;
 453                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 454                 };
 455
 456                 pp1200_hub:
 457                 vdda_hp_pcie_1p2:
 458                 vdda_hv_ebi0:
 459                 vdda_hv_ebi1:
 460                 vdda_hv_ebi2:
 461                 vdda_hv_ebi3:
 462                 vdda_mipi_csi_1p25:
 463                 vdda_mipi_dsi0_1p2:
 464                 vdda_mipi_dsi1_1p2:
 465                 vdda_pcie_1p2:
 466                 vdda_ufs1_1p2:
 467                 vdda_ufs2_1p2:
 468                 vdda_usb1_ss_1p2:
 469                 vdda_usb2_ss_1p2:
 470                 src_pp1200_l26a: ldo26 {
 471                         regulator-min-microvolt = <1200000>;
 472                         regulator-max-microvolt = <1200000>;
 473                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 474                 };
 475
 476                 pp3300_dx_pen:
 477                 src_pp3300_l28a: ldo28 {
 478                         regulator-min-microvolt = <3304000>;
 479                         regulator-max-microvolt = <3304000>;
 480                         regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
 481                 };
 482
 483                 src_pp1800_lvs1: lvs1 {
 484                         regulator-min-microvolt = <1800000>;
 485                         regulator-max-microvolt = <1800000>;
 486                 };
 487
 488                 src_pp1800_lvs2: lvs2 {
 489                         regulator-min-microvolt = <1800000>;
 490                         regulator-max-microvolt = <1800000>;
 491                 };
 492         };
 493
 494         pm8005-rpmh-regulators {
 495                 compatible = "qcom,pm8005-rpmh-regulators";
 496                 qcom,pmic-id = "c";
 497
 498                 vdd-s1-supply = <&src_vph_pwr>;
 499                 vdd-s2-supply = <&src_vph_pwr>;
 500                 vdd-s3-supply = <&src_vph_pwr>;
 501                 vdd-s4-supply = <&src_vph_pwr>;
 502
 503                 src_pp600_s3c: smps3 {
 504                         regulator-min-microvolt = <600000>;
 505                         regulator-max-microvolt = <600000>;
 506                 };
 507         };
 508 };
 509
 510 &dsi0 {
 511         status = "okay";
 512         vdda-supply = <&vdda_mipi_dsi0_1p2>;
 513
 514         ports {
 515                 port@1 {
 516                         endpoint {
 517                                 remote-endpoint = <&sn65dsi86_in>;
 518                                 data-lanes = <0 1 2 3>;
 519                         };
 520                 };
 521         };
 522 };
 523
 524 &dsi0_phy {
 525         status = "okay";
 526         vdds-supply = <&vdda_mipi_dsi0_pll>;
 527 };
 528
 529 edp_brij_i2c: &i2c3 {
 530         status = "okay";
 531         clock-frequency = <400000>;
 532
 533         sn65dsi86_bridge: bridge@2d {
 534                 compatible = "ti,sn65dsi86";
 535                 reg = <0x2d>;
 536                 pinctrl-names = "default";
 537                 pinctrl-0 = <&edp_brij_en &edp_brij_irq>;
 538
 539                 interrupt-parent = <&tlmm>;
 540                 interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
 541
 542                 enable-gpios = <&tlmm 102 GPIO_ACTIVE_HIGH>;
 543
 544                 vpll-supply = <&src_pp1800_s4a>;
 545                 vccio-supply = <&src_pp1800_s4a>;
 546                 vcca-supply = <&src_pp1200_l2a>;
 547                 vcc-supply = <&src_pp1200_l2a>;
 548
 549                 clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
 550                 clock-names = "refclk";
 551
 552                 ports {
 553                         #address-cells = <1>;
 554                         #size-cells = <0>;
 555
 556                         port@0 {
 557                                 reg = <0>;
 558                                 sn65dsi86_in: endpoint {
 559                                         remote-endpoint = <&dsi0_out>;
 560                                 };
 561                         };
 562
 563                         port@1 {
 564                                 reg = <1>;
 565                                 sn65dsi86_out: endpoint {
 566                                         remote-endpoint = <&panel_in_edp>;
 567                                 };
 568                         };
 569                 };
 570         };
 571 };
 572
 573 ap_pen_1v8: &i2c11 {
 574         status = "okay";
 575         clock-frequency = <400000>;
 576
 577         digitizer@9 {
 578                 compatible = "wacom,w9013", "hid-over-i2c";
 579                 reg = <0x9>;
 580                 pinctrl-names = "default";
 581                 pinctrl-0 = <&pen_irq_l>, <&pen_pdct_l>, <&pen_rst_l>;
 582
 583                 vdd-supply = <&pp3300_dx_pen>;
 584                 vddl-supply = <&pp1800_dx_pen>;
 585                 post-power-on-delay-ms = <100>;
 586
 587                 interrupt-parent = <&tlmm>;
 588                 interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
 589
 590                 hid-descr-addr = <0x1>;
 591         };
 592 };
 593
 594 amp_i2c: &i2c12 {
 595         status = "okay";
 596         clock-frequency = <400000>;
 597 };
 598
 599 ap_ts_i2c: &i2c14 {
 600         status = "okay";
 601         clock-frequency = <400000>;
 602
 603         touchscreen@10 {
 604                 compatible = "elan,ekth3500";
 605                 reg = <0x10>;
 606                 pinctrl-names = "default";
 607                 pinctrl-0 = <&ts_int_l &ts_reset_l>;
 608
 609                 interrupt-parent = <&tlmm>;
 610                 interrupts = <125 IRQ_TYPE_LEVEL_LOW>;
 611
 612                 vcc33-supply = <&src_pp3300_l28a>;
 613
 614                 reset-gpios = <&tlmm 118 GPIO_ACTIVE_LOW>;
 615         };
 616 };
 617
 618 &lpasscc {
 619         status = "okay";
 620 };
 621
 622 &mdss {
 623         status = "okay";
 624 };
 625
 626 &mdss_mdp {
 627         status = "okay";
 628 };
 629
 630 &qupv3_id_0 {
 631         status = "okay";
 632 };
 633
 634 &qupv3_id_1 {
 635         status = "okay";
 636 };
 637
 638 &sdhc_2 {
 639         status = "okay";
 640
 641         pinctrl-names = "default";
 642         pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data &sd_cd_odl>;
 643
 644         vmmc-supply = <&src_pp2950_l21a>;
 645         vqmmc-supply = <&vddpx_2>;
 646
 647         cd-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
 648 };
 649
 650 &spi0 {
 651         status = "okay";
 652 };
 653
 654 &spi10 {
 655         status = "okay";
 656
 657         cros_ec: ec@0 {
 658                 compatible = "google,cros-ec-spi";
 659                 reg = <0>;
 660                 interrupt-parent = <&tlmm>;
 661                 interrupts = <122 IRQ_TYPE_LEVEL_LOW>;
 662                 pinctrl-names = "default";
 663                 pinctrl-0 = <&ec_ap_int_l>;
 664                 spi-max-frequency = <3000000>;
 665
 666                 cros_ec_pwm: ec-pwm {
 667                         compatible = "google,cros-ec-pwm";
 668                         #pwm-cells = <1>;
 669                 };
 670
 671                 i2c_tunnel: i2c-tunnel {
 672                         compatible = "google,cros-ec-i2c-tunnel";
 673                         google,remote-bus = <0>;
 674                         #address-cells = <1>;
 675                         #size-cells = <0>;
 676                 };
 677
 678                 pdupdate {
 679                         compatible = "google,cros-ec-pd-update";
 680                 };
 681         };
 682 };
 683
 684 #include <arm/cros-ec-keyboard.dtsi>
 685 #include <arm/cros-ec-sbs.dtsi>
 686
 687 &uart6 {
 688         status = "okay";
 689
 690         bluetooth: wcn3990-bt {
 691                 compatible = "qcom,wcn3990-bt";
 692                 vddio-supply = <&src_pp1800_s4a>;
 693                 vddxo-supply = <&pp1800_l7a_wcn3990>;
 694                 vddrf-supply = <&src_pp1300_l17a>;
 695                 vddch0-supply = <&pp3300_l25a_ch0_wcn3990>;
 696                 max-speed = <3200000>;
 697         };
 698 };
 699
 700 &uart9 {
 701         status = "okay";
 702 };
 703
 704 &ufs_mem_hc {
 705         status = "okay";
 706         pinctrl-names = "init", "default";
 707         pinctrl-0 = <&ufs_dev_reset_assert>;
 708         pinctrl-1 = <&ufs_dev_reset_deassert>;
 709
 710         vcc-supply = <&src_pp2950_l20a>;
 711         vcc-max-microamp = <600000>;
 712 };
 713
 714 &ufs_mem_phy {
 715         status = "okay";
 716
 717         vdda-phy-supply = <&vdda_ufs1_core>;
 718         vdda-pll-supply = <&vdda_ufs1_1p2>;
 719 };
 720
 721 &usb_1 {
 722         status = "okay";
 723
 724         /* We'll use this as USB 2.0 only */
 725         qcom,select-utmi-as-pipe-clk;
 726 };
 727
 728 &usb_1_dwc3 {
 729         /*
 730          * The hardware design intends this port to be hooked up in peripheral
 731          * mode, so we'll hardcode it here.  Some details:
 732          * - SDM845 expects only a single Type C connector so it has only one
 733          *   native Type C port but cheza has two Type C connectors.
 734          * - The only source of DP is the single native Type C port.
 735          * - On cheza we want to be able to hook DP up to _either_ of the
 736          *   two Type C connectors and want to be able to achieve 4 lanes of DP.
 737          * - When you configure a Type C port for 4 lanes of DP you lose USB3.
 738          * - In order to make everything work, the native Type C port is always
 739          *   configured as 4-lanes DP so it's always available.
 740          * - The extra USB3 port on SDM845 goes to a USB 3 hub which is then
 741          *   sent to the two Type C connectors.
 742          * - The extra USB2 lines from the native Type C port are always
 743          *   setup as "peripheral" so that we can mux them over to one connector
 744          *   or the other if someone needs the connector configured as a gadget
 745          *   (but they only get USB2 speeds).
 746          *
 747          * All the hardware muxes would allow us to hook things up in different
 748          * ways to some potential benefit for static configurations (you could
 749          * achieve extra USB2 bandwidth by using two different ports for the
 750          * two connectors or possibly even get USB3 peripheral mode), but in
 751          * each case you end up forcing to disconnect/reconnect an in-use
 752          * USB session in some cases depending on what you hotplug into the
 753          * other connector.  Thus hardcoding this as peripheral makes sense.
 754          */
 755         dr_mode = "peripheral";
 756
 757         /*
 758          * We always need the high speed pins as 4-lanes DP in case someone
 759          * hotplugs a DP peripheral.  Thus limit this port to a max of high
 760          * speed.
 761          */
 762         maximum-speed = "high-speed";
 763
 764         /*
 765          * We don't need the usb3-phy since we run in highspeed mode always, so
 766          * re-define these properties removing the superspeed USB PHY reference.
 767          */
 768         phys = <&usb_1_hsphy>;
 769         phy-names = "usb2-phy";
 770 };
 771
 772 &usb_1_hsphy {
 773         status = "okay";
 774
 775         vdd-supply = <&vdda_usb1_ss_core>;
 776         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 777         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 778
 779         qcom,imp-res-offset-value = <8>;
 780         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
 781         qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
 782         qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
 783 };
 784
 785 &usb_2 {
 786         status = "okay";
 787 };
 788
 789 &usb_2_dwc3 {
 790         /* We have this hooked up to a hub and we always use in host mode */
 791         dr_mode = "host";
 792 };
 793
 794 &usb_2_hsphy {
 795         status = "okay";
 796
 797         vdd-supply = <&vdda_usb2_ss_core>;
 798         vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
 799         vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
 800
 801         qcom,imp-res-offset-value = <8>;
 802         qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
 803 };
 804
 805 &usb_2_qmpphy {
 806         status = "okay";
 807
 808         vdda-phy-supply = <&vdda_usb2_ss_1p2>;
 809         vdda-pll-supply = <&vdda_usb2_ss_core>;
 810 };
 811
 812 &wifi {
 813         status = "okay";
 814
 815         vdd-0.8-cx-mx-supply = <&src_pp800_l5a >;
 816         vdd-1.8-xo-supply = <&pp1800_l7a_wcn3990>;
 817         vdd-1.3-rfa-supply = <&src_pp1300_l17a>;
 818         vdd-3.3-ch0-supply = <&pp3300_l25a_ch0_wcn3990>;
 819 };
 820
 821 /* PINCTRL - additions to nodes defined in sdm845.dtsi */
 822
 823 &qspi_cs0 {
 824         pinconf {
 825                 pins = "gpio90";
 826                 bias-disable;
 827         };
 828 };
 829
 830 &qspi_clk {
 831         pinconf {
 832                 pins = "gpio95";
 833                 bias-disable;
 834         };
 835 };
 836
 837 &qspi_data01 {
 838         pinconf {
 839                 pins = "gpio91", "gpio92";
 840
 841                 /* High-Z when no transfers; nice to park the lines */
 842                 bias-pull-up;
 843         };
 844 };
 845
 846 &qup_i2c3_default {
 847         pinconf {
 848                 pins = "gpio41", "gpio42";
 849                 drive-strength = <2>;
 850
 851                 /* Has external pullup */
 852                 bias-disable;
 853         };
 854 };
 855
 856 &qup_i2c11_default {
 857         pinconf {
 858                 pins = "gpio31", "gpio32";
 859                 drive-strength = <2>;
 860
 861                 /* Has external pullup */
 862                 bias-disable;
 863         };
 864 };
 865
 866 &qup_i2c12_default {
 867         pinconf {
 868                 pins = "gpio49", "gpio50";
 869                 drive-strength = <2>;
 870
 871                 /* Has external pullup */
 872                 bias-disable;
 873         };
 874 };
 875
 876 &qup_i2c14_default {
 877         pinconf {
 878                 pins = "gpio33", "gpio34";
 879                 drive-strength = <2>;
 880
 881                 /* Has external pullup */
 882                 bias-disable;
 883         };
 884 };
 885
 886 &qup_spi0_default {
 887         pinconf {
 888                 pins = "gpio0", "gpio1", "gpio2", "gpio3";
 889                 drive-strength = <2>;
 890                 bias-disable;
 891         };
 892 };
 893
 894 &qup_spi5_default {
 895         pinconf {
 896                 pins = "gpio85", "gpio86", "gpio87", "gpio88";
 897                 drive-strength = <2>;
 898                 bias-disable;
 899         };
 900 };
 901
 902 &qup_spi10_default {
 903         pinconf {
 904                 pins = "gpio53", "gpio54", "gpio55", "gpio56";
 905                 drive-strength = <2>;
 906                 bias-disable;
 907         };
 908 };
 909
 910 &qup_uart6_default {
 911         /* Change pinmux to all 4 pins since CTS and RTS are connected */
 912         pinmux {
 913                 pins = "gpio45", "gpio46",
 914                        "gpio47", "gpio48";
 915         };
 916
 917         pinconf-cts {
 918                 /*
 919                  * Configure a pull-down on 45 (CTS) to match the pull of
 920                  * the Bluetooth module.
 921                  */
 922                 pins = "gpio45";
 923                 bias-pull-down;
 924         };
 925
 926         pinconf-rts-tx {
 927                 /* We'll drive 46 (RTS) and 47 (TX), so no pull */
 928                 pins = "gpio46", "gpio47";
 929                 drive-strength = <2>;
 930                 bias-disable;
 931         };
 932
 933         pinconf-rx {
 934                 /*
 935                  * Configure a pull-up on 48 (RX). This is needed to avoid
 936                  * garbage data when the TX pin of the Bluetooth module is
 937                  * in tri-state (module powered off or not driving the
 938                  * signal yet).
 939                  */
 940                 pins = "gpio48";
 941                 bias-pull-up;
 942         };
 943 };
 944
 945 &qup_uart9_default {
 946         pinconf-tx {
 947                 pins = "gpio4";
 948                 drive-strength = <2>;
 949                 bias-disable;
 950         };
 951
 952         pinconf-rx {
 953                 pins = "gpio5";
 954                 drive-strength = <2>;
 955                 bias-pull-up;
 956         };
 957 };
 958
 959 /* PINCTRL - board-specific pinctrl */
 960 &pm8005_gpio {
 961         gpio-line-names = "",
 962                           "",
 963                           "SLB",
 964                           "";
 965 };
 966
 967 &pm8998_adc {
 968         adc-chan@4d {
 969                 reg = <ADC5_AMUX_THM1_100K_PU>;
 970                 label = "sdm_temp";
 971         };
 972
 973         adc-chan@4e {
 974                 reg = <ADC5_AMUX_THM2_100K_PU>;
 975                 label = "quiet_temp";
 976         };
 977
 978         adc-chan@4f {
 979                 reg = <ADC5_AMUX_THM3_100K_PU>;
 980                 label = "lte_temp_1";
 981         };
 982
 983         adc-chan@50 {
 984                 reg = <ADC5_AMUX_THM4_100K_PU>;
 985                 label = "lte_temp_2";
 986         };
 987
 988         adc-chan@51 {
 989                 reg = <ADC5_AMUX_THM5_100K_PU>;
 990                 label = "charger_temp";
 991         };
 992 };
 993
 994 &pm8998_gpio {
 995         gpio-line-names = "",
 996                           "",
 997                           "SW_CTRL",
 998                           "",
 999                           "",
1000                           "",
1001                           "",
1002                           "",
1003                           "",
1004                           "",
1005                           "",
1006                           "",
1007                           "",
1008                           "",
1009                           "",
1010                           "",
1011                           "",
1012                           "",
1013                           "",
1014                           "",
1015                           "",
1016                           "CFG_OPT1",
1017                           "WCSS_PWR_REQ",
1018                           "",
1019                           "CFG_OPT2",
1020                           "SLB";
1021 };
1022
1023 &tlmm {
1024         /*
1025          * pinctrl settings for pins that have no real owners.
1026          */
1027         pinctrl-names = "default", "sleep";
1028         pinctrl-0 = <&bios_flash_wp_r_l>,
1029                     <&ap_suspend_l_deassert>;
1030
1031         pinctrl-1 = <&bios_flash_wp_r_l>,
1032                     <&ap_suspend_l_assert>;
1033
1034         /*
1035          * Hogs prevent usermode from changing the value. A GPIO can be both
1036          * here and in the pinctrl section.
1037          */
1038         ap-suspend-l-hog {
1039                 gpio-hog;
1040                 gpios = <126 GPIO_ACTIVE_LOW>;
1041                 output-low;
1042         };
1043
1044         ap_edp_bklten: ap-edp-bklten {
1045                 pinmux {
1046                         pins = "gpio37";
1047                         function = "gpio";
1048                 };
1049
1050                 pinconf {
1051                         pins = "gpio37";
1052                         drive-strength = <2>;
1053                         bias-disable;
1054                 };
1055         };
1056
1057         bios_flash_wp_r_l: bios-flash-wp-r-l {
1058                 pinmux {
1059                         pins = "gpio128";
1060                         function = "gpio";
1061                         input-enable;
1062                 };
1063
1064                 pinconf {
1065                         pins = "gpio128";
1066                         bias-disable;
1067                 };
1068         };
1069
1070         ec_ap_int_l: ec-ap-int-l {
1071                 pinmux {
1072                        pins = "gpio122";
1073                        function = "gpio";
1074                        input-enable;
1075                 };
1076
1077                 pinconf {
1078                        pins = "gpio122";
1079                        bias-pull-up;
1080                 };
1081         };
1082
1083         edp_brij_en: edp-brij-en {
1084                 pinmux {
1085                         pins = "gpio102";
1086                         function = "gpio";
1087                 };
1088
1089                 pinconf {
1090                         pins = "gpio102";
1091                         drive-strength = <2>;
1092                         bias-disable;
1093                 };
1094         };
1095
1096         edp_brij_irq: edp-brij-irq {
1097                 pinmux {
1098                         pins = "gpio10";
1099                         function = "gpio";
1100                 };
1101
1102                 pinconf {
1103                         pins = "gpio10";
1104                         drive-strength = <2>;
1105                         bias-pull-down;
1106                 };
1107         };
1108
1109         en_pp3300_dx_edp: en-pp3300-dx-edp {
1110                 pinmux {
1111                         pins = "gpio43";
1112                         function = "gpio";
1113                 };
1114
1115                 pinconf {
1116                         pins = "gpio43";
1117                         drive-strength = <2>;
1118                         bias-disable;
1119                 };
1120         };
1121
1122         h1_ap_int_odl: h1-ap-int-odl {
1123                 pinmux {
1124                         pins = "gpio129";
1125                         function = "gpio";
1126                         input-enable;
1127                 };
1128
1129                 pinconf {
1130                         pins = "gpio129";
1131                         bias-pull-up;
1132                 };
1133         };
1134
1135         pen_eject_odl: pen-eject-odl {
1136                 pinmux {
1137                         pins = "gpio119";
1138                         function = "gpio";
1139                         bias-pull-up;
1140                 };
1141         };
1142
1143         pen_irq_l: pen-irq-l {
1144                 pinmux {
1145                         pins = "gpio24";
1146                         function = "gpio";
1147                 };
1148
1149                 pinconf {
1150                         pins = "gpio24";
1151
1152                         /* Has external pullup */
1153                         bias-disable;
1154                 };
1155         };
1156
1157         pen_pdct_l: pen-pdct-l {
1158                 pinmux {
1159                         pins = "gpio63";
1160                         function = "gpio";
1161                 };
1162
1163                 pinconf {
1164                         pins = "gpio63";
1165
1166                         /* Has external pullup */
1167                         bias-disable;
1168                 };
1169         };
1170
1171         pen_rst_l: pen-rst-l {
1172                 pinmux  {
1173                         pins = "gpio23";
1174                         function = "gpio";
1175                 };
1176
1177                 pinconf {
1178                         pins = "gpio23";
1179                         bias-disable;
1180                         drive-strength = <2>;
1181
1182                         /*
1183                          * The pen driver doesn't currently support
1184                          * driving this reset line.  By specifying
1185                          * output-high here we're relying on the fact
1186                          * that this pin has a default pulldown at boot
1187                          * (which makes sure the pen was in reset if it
1188                          * was powered) and then we set it high here to
1189                          * take it out of reset.  Better would be if the
1190                          * pen driver could control this and we could
1191                          * remove "output-high" here.
1192                          */
1193                         output-high;
1194                 };
1195         };
1196
1197         sdc2_clk: sdc2-clk {
1198                 pinconf {
1199                         pins = "sdc2_clk";
1200                         bias-disable;
1201
1202                         /*
1203                          * It seems that mmc_test reports errors if drive
1204                          * strength is not 16.
1205                          */
1206                         drive-strength = <16>;
1207                 };
1208         };
1209
1210         sdc2_cmd: sdc2-cmd {
1211                 pinconf {
1212                         pins = "sdc2_cmd";
1213                         bias-pull-up;
1214                         drive-strength = <16>;
1215                 };
1216         };
1217
1218         sdc2_data: sdc2-data {
1219                 pinconf {
1220                         pins = "sdc2_data";
1221                         bias-pull-up;
1222                         drive-strength = <16>;
1223                 };
1224         };
1225
1226         sd_cd_odl: sd-cd-odl {
1227                 pinmux {
1228                         pins = "gpio44";
1229                         function = "gpio";
1230                 };
1231
1232                 pinconf {
1233                         pins = "gpio44";
1234                         bias-pull-up;
1235                 };
1236         };
1237
1238         ts_int_l: ts-int-l {
1239                 pinmux  {
1240                         pins = "gpio125";
1241                         function = "gpio";
1242                 };
1243
1244                 pinconf {
1245                         pins = "gpio125";
1246                         bias-pull-up;
1247                 };
1248         };
1249
1250         ts_reset_l: ts-reset-l {
1251                 pinmux  {
1252                         pins = "gpio118";
1253                         function = "gpio";
1254                 };
1255
1256                 pinconf {
1257                         pins = "gpio118";
1258                         bias-disable;
1259                         drive-strength = <2>;
1260                 };
1261         };
1262
1263         ufs_dev_reset_assert: ufs_dev_reset_assert {
1264                 config {
1265                         pins = "ufs_reset";
1266                         bias-pull-down;         /* default: pull down */
1267                         /*
1268                          * UFS_RESET driver strengths are having
1269                          * different values/steps compared to typical
1270                          * GPIO drive strengths.
1271                          *
1272                          * Following table clarifies:
1273                          *
1274                          * HDRV value | UFS_RESET | Typical GPIO
1275                          *   (dec)    |   (mA)    |    (mA)
1276                          *     0      |   0.8     |    2
1277                          *     1      |   1.55    |    4
1278                          *     2      |   2.35    |    6
1279                          *     3      |   3.1     |    8
1280                          *     4      |   3.9     |    10
1281                          *     5      |   4.65    |    12
1282                          *     6      |   5.4     |    14
1283                          *     7      |   6.15    |    16
1284                          *
1285                          * POR value for UFS_RESET HDRV is 3 which means
1286                          * 3.1mA and we want to use that. Hence just
1287                          * specify 8mA to "drive-strength" binding and
1288                          * that should result into writing 3 to HDRV
1289                          * field.
1290                          */
1291                         drive-strength = <8>;   /* default: 3.1 mA */
1292                         output-low; /* active low reset */
1293                 };
1294         };
1295
1296         ufs_dev_reset_deassert: ufs_dev_reset_deassert {
1297                 config {
1298                         pins = "ufs_reset";
1299                         bias-pull-down;         /* default: pull down */
1300                         /*
1301                          * default: 3.1 mA
1302                          * check comments under ufs_dev_reset_assert
1303                          */
1304                         drive-strength = <8>;
1305                         output-high; /* active low reset */
1306                 };
1307         };
1308
1309         ap_suspend_l_assert: ap_suspend_l_assert {
1310                 config {
1311                         pins = "gpio126";
1312                         function = "gpio";
1313                         bias-disable;
1314                         drive-strength = <2>;
1315                         output-low;
1316                 };
1317         };
1318
1319         ap_suspend_l_deassert: ap_suspend_l_deassert {
1320                 config {
1321                         pins = "gpio126";
1322                         function = "gpio";
1323                         bias-disable;
1324                         drive-strength = <2>;
1325                         output-high;
1326                 };
1327         };
1328 };