arch/arm64/boot/dts/qcom/sdm670-google-sargo.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
   4  * xiaomi-lavender device tree, and oneplus-common device tree.
   5  *
   6  * Copyright (c) 2022, Richard Acayan. All rights reserved.
   7  */
   8
   9 /dts-v1/;
  10
  11 #include <dt-bindings/gpio/gpio.h>
  12 #include <dt-bindings/input/input.h>
  13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
  14 #include <dt-bindings/power/qcom-rpmpd.h>
  15 #include "sdm670.dtsi"
  16 #include "pm660.dtsi"
  17 #include "pm660l.dtsi"
  18
  19 /delete-node/ &mpss_region;
  20 /delete-node/ &venus_mem;
  21 /delete-node/ &wlan_msa_mem;
  22 /delete-node/ &cdsp_mem;
  23 /delete-node/ &mba_region;
  24 /delete-node/ &adsp_mem;
  25 /delete-node/ &ipa_fw_mem;
  26 /delete-node/ &ipa_gsi_mem;
  27 /delete-node/ &gpu_mem;
  28
  29 / {
  30         model = "Google Pixel 3a";
  31         compatible = "google,sargo", "qcom,sdm670";
  32
  33         aliases { };
  34
  35         chosen {
  36                 stdout-path = "serial0:115200n8";
  37
  38                 #address-cells = <2>;
  39                 #size-cells = <2>;
  40                 ranges;
  41
  42                 framebuffer@9c000000 {
  43                         compatible = "simple-framebuffer";
  44                         reg = <0 0x9c000000 0 (1080 * 2220 * 4)>;
  45                         width = <1080>;
  46                         height = <2220>;
  47                         stride = <(1080 * 4)>;
  48                         format = "a8r8g8b8";
  49                 };
  50         };
  51
  52         clocks {
  53                 sleep_clk: sleep-clk {
  54                         compatible = "fixed-clock";
  55                         #clock-cells = <0>;
  56                         clock-frequency = <32764>;
  57                 };
  58
  59                 xo_board: xo-board {
  60                         compatible = "fixed-clock";
  61                         #clock-cells = <0>;
  62                         clock-frequency = <38400000>;
  63                 };
  64         };
  65
  66         gpio-keys {
  67                 compatible = "gpio-keys";
  68                 autorepeat;
  69
  70                 pinctrl-names = "default";
  71                 pinctrl-0 = <&vol_up_pin>;
  72
  73                 key-vol-up {
  74                         label = "Volume Up";
  75                         linux,code = <KEY_VOLUMEUP>;
  76                         gpios = <&pm660l_gpios 7 GPIO_ACTIVE_LOW>;
  77                 };
  78         };
  79
  80         reserved-memory {
  81                 #address-cells = <2>;
  82                 #size-cells = <2>;
  83
  84                 mpss_region: mpss@8b000000 {
  85                         reg = <0 0x8b000000 0 0x9800000>;
  86                         no-map;
  87                 };
  88
  89                 venus_mem: venus@94800000 {
  90                         reg = <0 0x94800000 0 0x500000>;
  91                         no-map;
  92                 };
  93
  94                 wlan_msa_mem: wlan-msa@94d00000 {
  95                         reg = <0 0x94d00000 0 0x100000>;
  96                         no-map;
  97                 };
  98
  99                 cdsp_mem: cdsp@94e00000 {
 100                         reg = <0 0x94e00000 0 0x800000>;
 101                         no-map;
 102                 };
 103
 104                 mba_region: mba@95600000 {
 105                         reg = <0 0x95600000 0 0x200000>;
 106                         no-map;
 107                 };
 108
 109                 adsp_mem: adsp@95800000 {
 110                         reg = <0 0x95800000 0 0x2200000>;
 111                         no-map;
 112                 };
 113
 114                 ipa_fw_mem: ipa-fw@97a00000 {
 115                         reg = <0 0x97a00000 0 0x10000>;
 116                         no-map;
 117                 };
 118
 119                 ipa_gsi_mem: ipa-gsi@97a10000 {
 120                         reg = <0 0x97a10000 0 0x5000>;
 121                         no-map;
 122                 };
 123
 124                 gpu_mem: gpu@97a15000 {
 125                         reg = <0 0x97a15000 0 0x2000>;
 126                         no-map;
 127                 };
 128
 129                 framebuffer-region@9c000000 {
 130                         reg = <0 0x9c000000 0 0x2400000>;
 131                         no-map;
 132                 };
 133
 134                 /* Also includes ramoops regions */
 135                 debug_info_mem: debug-info@a1800000 {
 136                         reg = <0 0xa1800000 0 0x411000>;
 137                         no-map;
 138                 };
 139         };
 140
 141         /*
 142          * The touchscreen regulator seems to be controlled somehow by a gpio.
 143          * Model it as a fixed regulator and keep it on. Without schematics we
 144          * don't know how this is actually wired up...
 145          */
 146         ts_1p8_supply: ts-1p8-regulator {
 147                 compatible = "regulator-fixed";
 148                 regulator-name = "ts_1p8_supply";
 149
 150                 regulator-min-microvolt = <1800000>;
 151                 regulator-max-microvolt = <1800000>;
 152
 153                 gpio = <&pm660_gpios 12 GPIO_ACTIVE_HIGH>;
 154                 enable-active-high;
 155         };
 156
 157         vph_pwr: vph-pwr-regulator {
 158                 compatible = "regulator-fixed";
 159                 regulator-name = "vph_pwr";
 160                 regulator-min-microvolt = <3312000>;
 161                 regulator-max-microvolt = <3312000>;
 162
 163                 regulator-always-on;
 164                 regulator-boot-on;
 165         };
 166
 167         /*
 168          * Supply map from xiaomi-lavender specifies this as the supply for
 169          * ldob1, ldob9, ldob10, ldoa2, and ldoa3, while downstream specifies
 170          * this as a power domain. Set this as a fixed regulator with the same
 171          * voltage as lavender until display is needed to avoid unneccessarily
 172          * using a deprecated binding (regulator-fixed-domain).
 173          */
 174         vreg_s2b_1p05: vreg-s2b-regulator {
 175                 compatible = "regulator-fixed";
 176                 regulator-name = "vreg_s2b";
 177                 regulator-min-microvolt = <1050000>;
 178                 regulator-max-microvolt = <1050000>;
 179         };
 180 };
 181
 182 &apps_rsc {
 183         regulators-0 {
 184                 compatible = "qcom,pm660-rpmh-regulators";
 185                 qcom,pmic-id = "a";
 186
 187                 vdd-s1-supply = <&vph_pwr>;
 188                 vdd-s2-supply = <&vph_pwr>;
 189                 vdd-s3-supply = <&vph_pwr>;
 190                 vdd-s4-supply = <&vph_pwr>;
 191                 vdd-s5-supply = <&vph_pwr>;
 192                 vdd-s6-supply = <&vph_pwr>;
 193
 194                 vdd-l1-l6-l7-supply = <&vreg_s6a_0p87>;
 195                 vdd-l2-l3-supply = <&vreg_s2b_1p05>;
 196                 vdd-l5-supply = <&vreg_s2b_1p05>;
 197                 vdd-l8-l9-l10-l11-l12-l13-l14-supply = <&vreg_s4a_2p04>;
 198                 vdd-l15-l16-l17-l18-l19-supply = <&vreg_bob>;
 199
 200                 /*
 201                  * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed
 202                  * by the Core Power Reduction hardened (CPRh) and the
 203                  * Operating State Manager (OSM) HW automatically.
 204                  */
 205
 206                 vreg_s4a_2p04: smps4 {
 207                         regulator-min-microvolt = <1808000>;
 208                         regulator-max-microvolt = <2040000>;
 209                         regulator-enable-ramp-delay = <200>;
 210                 };
 211
 212                 vreg_s6a_0p87: smps6 {
 213                         regulator-min-microvolt = <1224000>;
 214                         regulator-max-microvolt = <1352000>;
 215                         regulator-enable-ramp-delay = <150>;
 216                 };
 217
 218                 /* LDOs */
 219                 vreg_l1a_1p225: ldo1 {
 220                         regulator-min-microvolt = <1200000>;
 221                         regulator-max-microvolt = <1250000>;
 222                         regulator-enable-ramp-delay = <250>;
 223                 };
 224
 225                 vreg_l2a_1p0: ldo2 {
 226                         regulator-min-microvolt = <1000000>;
 227                         regulator-max-microvolt = <1000000>;
 228                         regulator-enable-ramp-delay = <250>;
 229                 };
 230
 231                 vreg_l3a_1p0: ldo3 {
 232                         regulator-min-microvolt = <1000000>;
 233                         regulator-max-microvolt = <1000000>;
 234                         regulator-enable-ramp-delay = <250>;
 235                 };
 236
 237                 vreg_l5a_0p848: ldo5 {
 238                         regulator-min-microvolt = <800000>;
 239                         regulator-max-microvolt = <800000>;
 240                         regulator-enable-ramp-delay = <250>;
 241                 };
 242
 243                 vreg_l6a_1p3: ldo6 {
 244                         regulator-min-microvolt = <1248000>;
 245                         regulator-max-microvolt = <1304000>;
 246                         regulator-enable-ramp-delay = <250>;
 247                 };
 248
 249                 vreg_l7a_1p2: ldo7 {
 250                         regulator-min-microvolt = <1200000>;
 251                         regulator-max-microvolt = <1200000>;
 252                         regulator-enable-ramp-delay = <250>;
 253                 };
 254
 255                 vreg_l8a_1p8: ldo8 {
 256                         regulator-min-microvolt = <1800000>;
 257                         regulator-max-microvolt = <1800000>;
 258                         regulator-enable-ramp-delay = <250>;
 259                         regulator-always-on;
 260                 };
 261
 262                 vreg_l9a_1p8: ldo9 {
 263                         regulator-min-microvolt = <1800000>;
 264                         regulator-max-microvolt = <1800000>;
 265                         regulator-enable-ramp-delay = <250>;
 266                 };
 267
 268                 vreg_l10a_1p8: ldo10 {
 269                         regulator-min-microvolt = <1800000>;
 270                         regulator-max-microvolt = <1800000>;
 271                         regulator-enable-ramp-delay = <250>;
 272                 };
 273
 274                 vreg_l11a_1p8: ldo11 {
 275                         regulator-min-microvolt = <1800000>;
 276                         regulator-max-microvolt = <1800000>;
 277                         regulator-enable-ramp-delay = <250>;
 278                 };
 279
 280                 vreg_l12a_1p8: ldo12 {
 281                         regulator-min-microvolt = <1800000>;
 282                         regulator-max-microvolt = <1800000>;
 283                         regulator-enable-ramp-delay = <250>;
 284                 };
 285
 286                 vreg_l13a_1p8: ldo13 {
 287                         regulator-min-microvolt = <1800000>;
 288                         regulator-max-microvolt = <1800000>;
 289                         regulator-enable-ramp-delay = <250>;
 290                 };
 291
 292                 vreg_l14a_1p8: ldo14 {
 293                         regulator-min-microvolt = <1800000>;
 294                         regulator-max-microvolt = <1800000>;
 295                         regulator-enable-ramp-delay = <250>;
 296                 };
 297
 298                 vreg_l15a_1p8: ldo15 {
 299                         regulator-min-microvolt = <1800000>;
 300                         regulator-max-microvolt = <2950000>;
 301                         regulator-enable-ramp-delay = <250>;
 302                 };
 303
 304                 vreg_l16a_2p7: ldo16 {
 305                         regulator-min-microvolt = <2696000>;
 306                         regulator-max-microvolt = <2696000>;
 307                         regulator-enable-ramp-delay = <250>;
 308                 };
 309
 310                 vreg_l17a_1p8: ldo17 {
 311                         regulator-min-microvolt = <1800000>;
 312                         regulator-max-microvolt = <2950000>;
 313                         regulator-enable-ramp-delay = <250>;
 314                 };
 315
 316                 vreg_l19a_3p3: ldo19 {
 317                         regulator-min-microvolt = <3000000>;
 318                         regulator-max-microvolt = <3312000>;
 319                         regulator-enable-ramp-delay = <250>;
 320                 };
 321         };
 322
 323         regulators-1 {
 324                 compatible = "qcom,pm660l-rpmh-regulators";
 325                 qcom,pmic-id = "b";
 326
 327                 vdd-s1-supply = <&vph_pwr>;
 328                 vdd-s2-supply = <&vph_pwr>;
 329                 vdd-s3-s4-supply = <&vph_pwr>;
 330                 vdd-s5-supply = <&vph_pwr>;
 331
 332                 vdd-l1-l9-l10-supply = <&vreg_s2b_1p05>;
 333                 vdd-l2-supply = <&vreg_bob>;
 334                 vdd-l3-l5-l7-l8-supply = <&vreg_bob>;
 335                 vdd-l4-l6-supply = <&vreg_bob>;
 336                 vdd-bob-supply = <&vph_pwr>;
 337
 338                 /* LDOs */
 339                 vreg_l1b_0p925: ldo1 {
 340                         regulator-min-microvolt = <880000>;
 341                         regulator-max-microvolt = <900000>;
 342                         regulator-enable-ramp-delay = <250>;
 343                 };
 344
 345                 vreg_l2b_2p95: ldo2 {
 346                         regulator-min-microvolt = <1800000>;
 347                         regulator-max-microvolt = <2960000>;
 348                         regulator-enable-ramp-delay = <250>;
 349                 };
 350
 351                 vreg_l3b_3p0: ldo3 {
 352                         regulator-min-microvolt = <2850000>;
 353                         regulator-max-microvolt = <3008000>;
 354                         regulator-enable-ramp-delay = <250>;
 355                 };
 356
 357                 vreg_l4b_2p95: ldo4 {
 358                         regulator-min-microvolt = <2960000>;
 359                         regulator-max-microvolt = <2960000>;
 360                         regulator-enable-ramp-delay = <250>;
 361                 };
 362
 363                 vreg_l5b_2p95: ldo5 {
 364                         regulator-min-microvolt = <2960000>;
 365                         regulator-max-microvolt = <2960000>;
 366                         regulator-enable-ramp-delay = <250>;
 367                 };
 368
 369                 vreg_l6b_3p3: ldo6 {
 370                         regulator-min-microvolt = <3008000>;
 371                         regulator-max-microvolt = <3300000>;
 372                         regulator-enable-ramp-delay = <250>;
 373                 };
 374
 375                 vreg_l7b_3p125: ldo7 {
 376                         regulator-min-microvolt = <3088000>;
 377                         regulator-max-microvolt = <3100000>;
 378                         regulator-enable-ramp-delay = <250>;
 379                 };
 380
 381                 vreg_l8b_3p3: ldo8 {
 382                         regulator-min-microvolt = <3300000>;
 383                         regulator-max-microvolt = <3312000>;
 384                         regulator-enable-ramp-delay = <250>;
 385                 };
 386
 387                 /*
 388                  * Downstream specifies a fixed voltage of 3.312 V, but the
 389                  * PMIC4 BOB ranges don't support that. Widen the range a
 390                  * little to avoid adding a new BOB regulator type.
 391                  */
 392                 vreg_bob: bob {
 393                         regulator-min-microvolt = <3296000>;
 394                         regulator-max-microvolt = <3328000>;
 395                         regulator-enable-ramp-delay = <500>;
 396                 };
 397         };
 398 };
 399
 400 &gcc {
 401         protected-clocks = <GCC_QSPI_CORE_CLK>,
 402                            <GCC_QSPI_CORE_CLK_SRC>,
 403                            <GCC_QSPI_CNOC_PERIPH_AHB_CLK>;
 404 };
 405
 406 &gpi_dma1 {
 407         status = "okay";
 408 };
 409
 410 &i2c9 {
 411         clock-frequency = <100000>;
 412         status = "okay";
 413
 414         synaptics-rmi4-i2c@20 {
 415                 compatible = "syna,rmi4-i2c";
 416                 reg = <0x20>;
 417                 interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>;
 418
 419                 pinctrl-names = "default";
 420                 pinctrl-0 = <&touchscreen_default>;
 421
 422                 vio-supply = <&ts_1p8_supply>;
 423
 424                 syna,reset-delay-ms = <200>;
 425                 syna,startup-delay-ms = <200>;
 426
 427                 #address-cells = <1>;
 428                 #size-cells = <0>;
 429
 430                 rmi4-f01@1 {
 431                         reg = <0x01>;
 432                         syna,nosleep-mode = <1>;
 433                 };
 434
 435                 rmi4-f12@12 {
 436                         reg = <0x12>;
 437                         touchscreen-x-mm = <62>;
 438                         touchscreen-y-mm = <127>;
 439                         syna,sensor-type = <1>;
 440                 };
 441         };
 442 };
 443
 444 &pm660l_gpios {
 445         vol_up_pin: vol-up-state {
 446                 pins = "gpio7";
 447                 function = "normal";
 448                 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
 449                 input-enable;
 450                 bias-pull-up;
 451         };
 452 };
 453
 454 &pon_pwrkey {
 455         status = "okay";
 456 };
 457
 458 &pon_resin {
 459         linux,code = <KEY_VOLUMEDOWN>;
 460         status = "okay";
 461 };
 462
 463 &qupv3_id_1 {
 464         status = "okay";
 465 };
 466
 467 &sdhc_1 {
 468         supports-cqe;
 469         mmc-hs200-1_8v;
 470         mmc-hs400-1_8v;
 471         mmc-ddr-1_8v;
 472
 473         qcom,ddr-config = <0xc3040873>;
 474
 475         vmmc-supply = <&vreg_l4b_2p95>;
 476         vqmmc-supply = <&vreg_l8a_1p8>;
 477
 478         status = "okay";
 479 };
 480
 481 &tlmm {
 482         gpio-reserved-ranges = <0 4>, <81 4>;
 483
 484         touchscreen_default: ts-default-state {
 485                 ts-reset-pins {
 486                         pins = "gpio99";
 487                         function = "gpio";
 488                         drive-strength = <2>;
 489                         bias-pull-up;
 490                         output-high;
 491                 };
 492
 493                 ts-irq-pins {
 494                         pins = "gpio125";
 495                         function = "gpio";
 496                         drive-strength = <2>;
 497                         bias-disable;
 498                 };
 499
 500                 ts-switch-pins {
 501                         pins = "gpio135";
 502                         function = "gpio";
 503                         drive-strength = <2>;
 504                         bias-disable;
 505                         output-low;
 506                 };
 507         };
 508 };
 509
 510 &usb_1_hsphy {
 511         vdd-supply = <&vreg_l1b_0p925>;
 512         vdda-pll-supply = <&vreg_l10a_1p8>;
 513         vdda-phy-dpdm-supply = <&vreg_l7b_3p125>;
 514
 515         status = "okay";
 516 };
 517
 518 &usb_1 {
 519         qcom,select-utmi-as-pipe-clk;
 520         status = "okay";
 521 };
 522
 523 &usb_1_dwc3 {
 524         /* Only peripheral works for now */
 525         dr_mode = "peripheral";
 526
 527         /* Do not assume that sdm670.dtsi will never support USB 3.0 */
 528         phys = <&usb_1_hsphy>;
 529         phy-names = "usb2-phy";
 530         maximum-speed = "high-speed";
 531 };