1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 IDP board device tree source (common between SKU1 and SKU2)
5 * Copyright (c) 2021, The Linux Foundation. All rights reserved.
8 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include "sc7280.dtsi"
11 #include "pm7325.dtsi"
12 #include "pm8350c.dtsi"
13 #include "pmk8350.dtsi"
15 #include "sc7280-chrome-common.dtsi"
16 #include "sc7280-herobrine-lte-sku.dtsi"
20 bluetooth0 = &bluetooth;
24 max98360a: audio-codec-0 {
25 compatible = "maxim,max98360a";
26 pinctrl-names = "default";
27 pinctrl-0 = <&_en>;
28 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
29 #sound-dai-cells = <0>;
32 wcd9385: audio-codec-1 {
33 compatible = "qcom,wcd9385-codec";
34 pinctrl-names = "default", "sleep";
35 pinctrl-0 = <&wcd_reset_n>;
36 pinctrl-1 = <&wcd_reset_n_sleep>;
38 reset-gpios = <&tlmm 83 GPIO_ACTIVE_LOW>;
40 qcom,rx-device = <&wcd_rx>;
41 qcom,tx-device = <&wcd_tx>;
43 vdd-rxtx-supply = <&vreg_l18b_1p8>;
44 vdd-io-supply = <&vreg_l18b_1p8>;
45 vdd-buck-supply = <&vreg_l17b_1p8>;
46 vdd-mic-bias-supply = <&vreg_bob>;
48 qcom,micbias1-microvolt = <1800000>;
49 qcom,micbias2-microvolt = <1800000>;
50 qcom,micbias3-microvolt = <1800000>;
51 qcom,micbias4-microvolt = <1800000>;
53 qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000
54 500000 500000 500000>;
55 qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
56 qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
57 #sound-dai-cells = <1>;
61 compatible = "gpio-keys";
64 pinctrl-names = "default";
65 pinctrl-0 = <&key_vol_up_default>;
69 gpios = <&pm7325_gpios 6 GPIO_ACTIVE_LOW>;
70 linux,input-type = <1>;
71 linux,code = <KEY_VOLUMEUP>;
73 debounce-interval = <15>;
78 nvme_3v3_regulator: nvme-3v3-regulator {
79 compatible = "regulator-fixed";
80 regulator-name = "VLDO_3V3";
82 regulator-min-microvolt = <3300000>;
83 regulator-max-microvolt = <3300000>;
86 pinctrl-names = "default";
87 pinctrl-0 = <&nvme_pwren>;
91 compatible = "google,sc7280-herobrine";
92 model = "sc7280-wcd938x-max98360a-1mic";
95 "IN1_HPHL", "HPHL_OUT",
96 "IN2_HPHR", "HPHR_OUT",
99 "VA DMIC0", "MIC BIAS3",
100 "VA DMIC1", "MIC BIAS3",
101 "VA DMIC2", "MIC BIAS1",
102 "VA DMIC3", "MIC BIAS1",
103 "TX SWR_ADC0", "ADC1_OUTPUT",
104 "TX SWR_ADC1", "ADC2_OUTPUT",
105 "TX SWR_ADC2", "ADC3_OUTPUT",
106 "TX SWR_DMIC0", "DMIC1_OUTPUT",
107 "TX SWR_DMIC1", "DMIC2_OUTPUT",
108 "TX SWR_DMIC2", "DMIC3_OUTPUT",
109 "TX SWR_DMIC3", "DMIC4_OUTPUT",
110 "TX SWR_DMIC4", "DMIC5_OUTPUT",
111 "TX SWR_DMIC5", "DMIC6_OUTPUT",
112 "TX SWR_DMIC6", "DMIC7_OUTPUT",
113 "TX SWR_DMIC7", "DMIC8_OUTPUT";
115 qcom,msm-mbhc-hphl-swh = <1>;
116 qcom,msm-mbhc-gnd-swh = <1>;
118 #address-cells = <1>;
120 #sound-dai-cells = <0>;
123 link-name = "MAX98360A";
127 sound-dai = <&lpass_cpu MI2S_SECONDARY>;
131 sound-dai = <&max98360a>;
136 link-name = "DisplayPort";
140 sound-dai = <&lpass_cpu LPASS_DP_RX>;
144 sound-dai = <&mdss_dp>;
149 link-name = "WCD9385 Playback";
153 sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
157 sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
162 link-name = "WCD9385 Capture";
166 sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
170 sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
179 sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
183 sound-dai = <&lpass_va_macro 0>;
191 compatible = "qcom,pm7325-rpmh-regulators";
194 vreg_s1b_1p8: smps1 {
195 regulator-min-microvolt = <1856000>;
196 regulator-max-microvolt = <2040000>;
199 vreg_s7b_0p9: smps7 {
200 regulator-min-microvolt = <535000>;
201 regulator-max-microvolt = <1120000>;
204 vreg_s8b_1p2: smps8 {
205 regulator-min-microvolt = <1256000>;
206 regulator-max-microvolt = <1500000>;
210 regulator-min-microvolt = <825000>;
211 regulator-max-microvolt = <925000>;
215 regulator-min-microvolt = <2700000>;
216 regulator-max-microvolt = <3544000>;
220 regulator-min-microvolt = <1140000>;
221 regulator-max-microvolt = <1260000>;
225 regulator-min-microvolt = <2960000>;
226 regulator-max-microvolt = <2960000>;
230 regulator-min-microvolt = <870000>;
231 regulator-max-microvolt = <970000>;
235 regulator-min-microvolt = <1080000>;
236 regulator-max-microvolt = <1304000>;
239 vreg_l11b_1p7: ldo11 {
240 regulator-min-microvolt = <1504000>;
241 regulator-max-microvolt = <2000000>;
244 vreg_l12b_0p8: ldo12 {
245 regulator-min-microvolt = <751000>;
246 regulator-max-microvolt = <824000>;
249 vreg_l13b_0p8: ldo13 {
250 regulator-min-microvolt = <530000>;
251 regulator-max-microvolt = <824000>;
254 vreg_l14b_1p2: ldo14 {
255 regulator-min-microvolt = <1080000>;
256 regulator-max-microvolt = <1304000>;
259 vreg_l15b_0p8: ldo15 {
260 regulator-min-microvolt = <765000>;
261 regulator-max-microvolt = <1020000>;
264 vreg_l16b_1p2: ldo16 {
265 regulator-min-microvolt = <1100000>;
266 regulator-max-microvolt = <1300000>;
269 vreg_l17b_1p8: ldo17 {
270 regulator-min-microvolt = <1700000>;
271 regulator-max-microvolt = <1900000>;
274 vreg_l18b_1p8: ldo18 {
275 regulator-min-microvolt = <1800000>;
276 regulator-max-microvolt = <2000000>;
279 vreg_l19b_1p8: ldo19 {
280 regulator-min-microvolt = <1800000>;
281 regulator-max-microvolt = <1800000>;
286 compatible = "qcom,pm8350c-rpmh-regulators";
289 vreg_s1c_2p2: smps1 {
290 regulator-min-microvolt = <2190000>;
291 regulator-max-microvolt = <2210000>;
294 vreg_s9c_1p0: smps9 {
295 regulator-min-microvolt = <1010000>;
296 regulator-max-microvolt = <1170000>;
300 regulator-min-microvolt = <1800000>;
301 regulator-max-microvolt = <1980000>;
305 regulator-min-microvolt = <1620000>;
306 regulator-max-microvolt = <1980000>;
310 regulator-min-microvolt = <2800000>;
311 regulator-max-microvolt = <3540000>;
315 regulator-min-microvolt = <1620000>;
316 regulator-max-microvolt = <3300000>;
320 regulator-min-microvolt = <1620000>;
321 regulator-max-microvolt = <3300000>;
325 regulator-min-microvolt = <1800000>;
326 regulator-max-microvolt = <2950000>;
330 regulator-min-microvolt = <3000000>;
331 regulator-max-microvolt = <3544000>;
335 regulator-min-microvolt = <1620000>;
336 regulator-max-microvolt = <2000000>;
340 regulator-min-microvolt = <2960000>;
341 regulator-max-microvolt = <2960000>;
344 vreg_l10c_0p8: ldo10 {
345 regulator-min-microvolt = <720000>;
346 regulator-max-microvolt = <1050000>;
349 vreg_l11c_2p8: ldo11 {
350 regulator-min-microvolt = <2800000>;
351 regulator-max-microvolt = <3544000>;
354 vreg_l12c_1p8: ldo12 {
355 regulator-min-microvolt = <1650000>;
356 regulator-max-microvolt = <2000000>;
359 vreg_l13c_3p0: ldo13 {
360 regulator-min-microvolt = <2700000>;
361 regulator-max-microvolt = <3544000>;
365 regulator-min-microvolt = <3008000>;
366 regulator-max-microvolt = <3960000>;
387 pinctrl-names = "default";
388 pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
391 reg = <MI2S_SECONDARY>;
392 qcom,playback-sd-lines = <0>;
400 reg = <LPASS_CDC_DMA_RX0>;
404 reg = <LPASS_CDC_DMA_TX3>;
408 reg = <LPASS_CDC_DMA_VA_TX0>;
422 vdd-micb-supply = <&vreg_bob>;
427 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
429 vddpe-3v3-supply = <&nvme_3v3_regulator>;
431 pinctrl-names = "default";
432 pinctrl-0 = <&pcie1_reset_n>, <&pcie1_wake_n>;
438 vdda-phy-supply = <&vreg_l10c_0p8>;
439 vdda-pll-supply = <&vreg_l6b_1p2>;
444 reg = <PMK8350_ADC7_DIE_TEMP>;
445 label = "pmk8350_die_temp";
446 qcom,pre-scaling = <1 1>;
451 vcc-supply = <&vreg_l1c_1p8>;
469 vmmc-supply = <&vreg_l7b_2p9>;
470 vqmmc-supply = <&vreg_l19b_1p8>;
476 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd>;
477 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd>;
479 vmmc-supply = <&vreg_l9c_2p9>;
480 vqmmc-supply = <&vreg_l6c_2p9>;
482 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
489 compatible = "sdw20217010d00";
491 qcom,rx-port-mapping = <1 2 3 4 5>;
499 compatible = "sdw20217010d00";
501 qcom,tx-port-mapping = <1 2 3 4>;
506 compatible = "qcom,geni-debug-uart";
521 vdda-pll-supply = <&vreg_l10c_0p8>;
522 vdda33-supply = <&vreg_l2b_3p0>;
523 vdda18-supply = <&vreg_l1c_1p8>;
529 vdda-phy-supply = <&vreg_l6b_1p2>;
530 vdda-pll-supply = <&vreg_l1b_0p8>;
536 /delete-property/interrupts;
537 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
538 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
539 pinctrl-names = "default", "sleep";
540 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
542 bluetooth: bluetooth {
543 compatible = "qcom,wcn6750-bt";
544 pinctrl-names = "default";
545 pinctrl-0 = <&bt_en>, <&sw_ctrl>;
546 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
547 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
548 vddaon-supply = <&vreg_s7b_0p9>;
549 vddbtcxmx-supply = <&vreg_s7b_0p9>;
550 vddrfacmn-supply = <&vreg_s7b_0p9>;
551 vddrfa0p8-supply = <&vreg_s7b_0p9>;
552 vddrfa1p7-supply = <&vreg_s1b_1p8>;
553 vddrfa1p2-supply = <&vreg_s8b_1p2>;
554 vddrfa2p2-supply = <&vreg_s1c_2p2>;
555 vddasd-supply = <&vreg_l11c_2p8>;
556 max-speed = <3200000>;
560 /* PINCTRL - additions to nodes defined in sc7280.dtsi */
567 drive-strength = <8>;
571 &lpass_dmic01_clk_sleep {
572 drive-strength = <2>;
580 drive-strength = <8>;
584 &lpass_dmic23_clk_sleep {
585 drive-strength = <2>;
593 drive-strength = <2>;
598 &lpass_rx_swr_clk_sleep {
603 drive-strength = <2>;
608 &lpass_rx_swr_data_sleep {
613 drive-strength = <2>;
618 &lpass_tx_swr_clk_sleep {
623 drive-strength = <2>;
629 drive-strength = <6>;
634 drive-strength = <6>;
639 drive-strength = <6>;
643 key_vol_up_default: key-vol-up-state {
649 qcom,drive-strength = <3>;
655 drive-strength = <2>;
667 /* High-Z when no transfers; nice to park the lines */
672 drive-strength = <2>;
677 drive-strength = <2>;
683 * Configure a bias-bus-hold on CTS to lower power
684 * usage when Bluetooth is turned off. Bus hold will
685 * maintain a low power state regardless of whether
686 * the Bluetooth module drives the pin in either
687 * direction or leaves the pin fully unpowered.
693 /* We'll drive RTS, so no pull */
694 drive-strength = <2>;
699 /* We'll drive TX, so no pull */
700 drive-strength = <2>;
706 * Configure a pull-up on RX. This is needed to avoid
707 * garbage data when the TX pin of the Bluetooth module is
708 * in tri-state (module powered off or not driving the
716 drive-strength = <16>;
721 drive-strength = <10>;
726 drive-strength = <10>;
735 drive-strength = <16>;
740 drive-strength = <10>;
745 drive-strength = <10>;
752 drive-strength = <2>;
762 nvme_pwren: nvme-pwren-pins {
766 pcie1_reset_n: pcie1-reset-n-pins {
770 drive-strength = <16>;
775 pcie1_wake_n: pcie1-wake-n-pins {
779 drive-strength = <2>;
783 qup_uart7_sleep_cts: qup-uart7-sleep-cts-pins {
787 * Configure a bias-bus-hold on CTS to lower power
788 * usage when Bluetooth is turned off. Bus hold will
789 * maintain a low power state regardless of whether
790 * the Bluetooth module drives the pin in either
791 * direction or leaves the pin fully unpowered.
796 qup_uart7_sleep_rts: qup-uart7-sleep-rts-pins {
800 * Configure pull-down on RTS. As RTS is active low
801 * signal, pull it low to indicate the BT SoC that it
802 * can wakeup the system anytime from suspend state by
803 * pulling RX low (by sending wakeup bytes).
808 qup_uart7_sleep_tx: qup-uart7-sleep-tx-pins {
812 * Configure pull-up on TX when it isn't actively driven
813 * to prevent BT SoC from receiving garbage during sleep.
818 qup_uart7_sleep_rx: qup-uart7-sleep-rx-pins {
822 * Configure a pull-up on RX. This is needed to avoid
823 * garbage data when the TX pin of the Bluetooth module
824 * is floating which may cause spurious wakeups.
835 sw_ctrl: sw-ctrl-pins {
841 wcd_reset_n: wcd-reset-n {
844 drive-strength = <8>;
847 wcd_reset_n_sleep: wcd-reset-n-sleep {
850 drive-strength = <8>;