1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Herobrine baseboard device tree source
5 * The set of things in this file is a bit loosely defined. It's roughly
6 * defined as the set of things that the child boards happen to have in
7 * common. Since all of the child boards started from the same original
8 * design this is hopefully a large set of things but as more derivatives
9 * appear things may "bubble down" out of this file. For things that are
10 * part of the reference design but might not exist on child nodes we will
11 * follow the lead of the SoC dtsi files and leave their status as "disabled".
13 * Copyright 2022 Google LLC.
16 #include <dt-bindings/input/gpio-keys.h>
17 #include <dt-bindings/input/input.h>
18 #include <dt-bindings/leds/common.h>
20 #include "sc7280-qcard.dtsi"
21 #include "sc7280-chrome-common.dtsi"
25 stdout-path = "serial0:115200n8";
32 * 1. parents above children.
33 * 2. higher voltage above lower voltage.
34 * 3. alphabetically by node name.
37 /* This is the top level supply and variable voltage */
38 ppvar_sys: ppvar-sys-regulator {
39 compatible = "regulator-fixed";
40 regulator-name = "ppvar_sys";
45 /* This divides ppvar_sys by 2, so voltage is variable */
46 src_vph_pwr: src-vph-pwr-regulator {
47 compatible = "regulator-fixed";
48 regulator-name = "src_vph_pwr";
50 /* EC turns on with switchcap_on; always on for AP */
54 vin-supply = <&ppvar_sys>;
57 pp5000_s5: pp5000-s5-regulator {
58 compatible = "regulator-fixed";
59 regulator-name = "pp5000_s5";
61 /* EC turns on with en_pp5000_s5; always on for AP */
64 regulator-min-microvolt = <5000000>;
65 regulator-max-microvolt = <5000000>;
67 vin-supply = <&ppvar_sys>;
70 pp3300_z1: pp3300-z1-regulator {
71 compatible = "regulator-fixed";
72 regulator-name = "pp3300_z1";
74 /* EC turns on with en_pp3300_z1; always on for AP */
77 regulator-min-microvolt = <3300000>;
78 regulator-max-microvolt = <3300000>;
80 vin-supply = <&ppvar_sys>;
83 pp3300_codec: pp3300-codec-regulator {
84 compatible = "regulator-fixed";
85 regulator-name = "pp3300_codec";
87 regulator-min-microvolt = <3300000>;
88 regulator-max-microvolt = <3300000>;
90 gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>;
92 pinctrl-names = "default";
93 pinctrl-0 = <&en_pp3300_codec>;
95 vin-supply = <&pp3300_z1>;
99 pp3300_left_in_mlb: pp3300-left-in-mlb-regulator {
100 compatible = "regulator-fixed";
101 regulator-name = "pp3300_left_in_mlb";
103 regulator-min-microvolt = <3300000>;
104 regulator-max-microvolt = <3300000>;
106 gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>;
108 pinctrl-names = "default";
109 pinctrl-0 = <&en_pp3300_dx_edp>;
111 vin-supply = <&pp3300_z1>;
116 pp3300_fp_mcu: pp3300-fp-regulator {
117 compatible = "regulator-fixed";
118 regulator-name = "pp3300_fp";
120 regulator-min-microvolt = <3300000>;
121 regulator-max-microvolt = <3300000>;
127 * WARNING: it is intentional that GPIO 77 isn't listed here.
128 * The userspace script for updating the fingerprint firmware
129 * needs to control the FP regulators during a FW update,
130 * hence the signal can't be owned by the kernel regulator.
133 pinctrl-names = "default";
134 pinctrl-0 = <&en_fp_rails>;
136 vin-supply = <&pp3300_z1>;
140 pp3300_hub: pp3300-hub-regulator {
141 compatible = "regulator-fixed";
142 regulator-name = "pp3300_hub";
144 regulator-min-microvolt = <3300000>;
145 regulator-max-microvolt = <3300000>;
147 /* The BIOS leaves this regulator on */
150 gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&hub_en>;
155 vin-supply = <&pp3300_z1>;
158 pp3300_tp: pp3300-tp-regulator {
159 compatible = "regulator-fixed";
160 regulator-name = "pp3300_tp";
162 regulator-min-microvolt = <3300000>;
163 regulator-max-microvolt = <3300000>;
165 /* AP turns on with PP1800_L18B_S0; always on for AP */
169 vin-supply = <&pp3300_z1>;
172 pp3300_ssd: pp3300-ssd-regulator {
173 compatible = "regulator-fixed";
174 regulator-name = "pp3300_ssd";
176 regulator-min-microvolt = <3300000>;
177 regulator-max-microvolt = <3300000>;
179 gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
181 pinctrl-names = "default";
182 pinctrl-0 = <&ssd_en>;
185 * The bootloaer may have left PCIe configured. Powering this
186 * off while the PCIe clocks are still running isn't great,
187 * so it's better to default to this regulator being on.
191 vin-supply = <&pp3300_z1>;
194 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator {
195 compatible = "regulator-fixed";
196 regulator-name = "pp2850_vcm_wf_cam";
198 regulator-min-microvolt = <2850000>;
199 regulator-max-microvolt = <2850000>;
201 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
203 pinctrl-names = "default";
204 pinctrl-0 = <&wf_cam_en>;
206 vin-supply = <&pp3300_z1>;
210 pp2850_wf_cam: pp2850-wf-cam-regulator {
211 compatible = "regulator-fixed";
212 regulator-name = "pp2850_wf_cam";
214 regulator-min-microvolt = <2850000>;
215 regulator-max-microvolt = <2850000>;
217 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
220 * The pinconf can only be referenced once so we put it on the
221 * first regulator and comment it out here.
223 * pinctrl-names = "default";
224 * pinctrl-0 = <&wf_cam_en>;
227 vin-supply = <&pp3300_z1>;
231 pp1800_fp: pp1800-fp-regulator {
232 compatible = "regulator-fixed";
233 regulator-name = "pp1800_fp";
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <1800000>;
242 * WARNING: it is intentional that GPIO 77 isn't listed here.
243 * The userspace script for updating the fingerprint firmware
244 * needs to control the FP regulators during a FW update,
245 * hence the signal can't be owned by the kernel regulator.
248 pinctrl-names = "default";
249 pinctrl-0 = <&en_fp_rails>;
251 vin-supply = <&pp1800_l18b_s0>;
255 pp1800_wf_cam: pp1800-wf-cam-regulator {
256 compatible = "regulator-fixed";
257 regulator-name = "pp1800_wf_cam";
259 regulator-min-microvolt = <1800000>;
260 regulator-max-microvolt = <1800000>;
262 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
265 * The pinconf can only be referenced once so we put it on the
266 * first regulator and comment it out here.
268 * pinctrl-names = "default";
269 * pinctrl-0 = <&wf_cam_en>;
272 vin-supply = <&vreg_l19b_s0>;
276 pp1200_wf_cam: pp1200-wf-cam-regulator {
277 compatible = "regulator-fixed";
278 regulator-name = "pp1200_wf_cam";
280 regulator-min-microvolt = <1200000>;
281 regulator-max-microvolt = <1200000>;
283 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>;
286 * The pinconf can only be referenced once so we put it on the
287 * first regulator and comment it out here.
289 * pinctrl-names = "default";
290 * pinctrl-0 = <&wf_cam_en>;
293 vin-supply = <&pp3300_z1>;
297 /* BOARD-SPECIFIC TOP LEVEL NODES */
299 max98360a: audio-codec-0 {
300 compatible = "maxim,max98360a";
301 pinctrl-names = "default";
302 pinctrl-0 = <&_en>;
303 sdmode-gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
304 #sound-dai-cells = <0>;
308 compatible = "pwm-leds";
310 keyboard_backlight: keyboard-backlight {
311 label = "cros_ec::kbd_backlight";
312 function = LED_FUNCTION_KBD_BACKLIGHT;
313 pwms = <&cros_ec_pwm 0>;
314 max-brightness = <1023>;
320 * ADJUSTMENTS TO QCARD REGULATORS
322 * Mostly this is just board-local names for regulators that come from
323 * Qcard, but this also has some minor regulator overrides.
325 * Names are only listed here if regulators go somewhere other than a
329 /* From Qcard to our board; ordered by PMIC-ID / rail number */
331 pp1256_s8b: &vreg_s8b_1p256 {};
333 pp1800_l18b_s0: &vreg_l18b_1p8 {};
334 pp1800_l18b: &vreg_l18b_1p8 {};
336 vreg_l19b_s0: &vreg_l19b_1p8 {};
338 pp1800_alc5682: &vreg_l2c_1p8 {};
339 pp1800_l2c: &vreg_l2c_1p8 {};
341 vreg_l4c: &vreg_l4c_1p8_3p0 {};
343 ppvar_l6c: &vreg_l6c_2p96 {};
345 pp3000_l7c: &vreg_l7c_3p0 {};
347 pp1800_prox: &vreg_l8c_1p8 {};
348 pp1800_l8c: &vreg_l8c_1p8 {};
350 pp2950_l9c: &vreg_l9c_2p96 {};
352 pp1800_lcm: &vreg_l12c_1p8 {};
353 pp1800_mipi: &vreg_l12c_1p8 {};
354 pp1800_l12c: &vreg_l12c_1p8 {};
356 pp3300_lcm: &vreg_l13c_3p0 {};
357 pp3300_mipi: &vreg_l13c_3p0 {};
358 pp3300_l13c: &vreg_l13c_3p0 {};
360 /* From our board to Qcard; ordered same as node definition above */
362 vreg_edp_bl: &ppvar_sys {};
364 ts_avdd: &pp3300_left_in_mlb {};
365 vreg_edp_3p3: &pp3300_left_in_mlb {};
367 /* Regulator overrides from Qcard */
370 * Herobrine boards only use l2c to power an external audio codec (like
371 * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage.
374 regulator-min-microvolt = <1800000>;
377 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
380 /* Our board provides power to the qcard for the eDP panel. */
381 power-supply = <&vreg_edp_3p3>;
384 ap_sar_sensor_i2c: &i2c1 {
385 clock-frequency = <400000>;
388 ap_sar_sensor0: proximity@28 {
389 compatible = "semtech,sx9324";
391 #io-channel-cells = <1>;
392 pinctrl-names = "default";
393 pinctrl-0 = <&sar0_irq_odl>;
395 interrupt-parent = <&tlmm>;
396 interrupts = <141 IRQ_TYPE_LEVEL_LOW>;
398 vdd-supply = <&pp1800_prox>;
400 label = "proximity-wifi_cellular-0";
404 ap_sar_sensor1: proximity@2c {
405 compatible = "semtech,sx9324";
407 #io-channel-cells = <1>;
408 pinctrl-names = "default";
409 pinctrl-0 = <&sar1_irq_odl>;
411 interrupt-parent = <&tlmm>;
412 interrupts = <140 IRQ_TYPE_LEVEL_LOW>;
414 vdd-supply = <&pp1800_prox>;
416 label = "proximity-wifi_cellular-1";
423 clock-frequency = <400000>;
426 compatible = "google,cr50";
429 pinctrl-names = "default";
430 pinctrl-0 = <&gsc_ap_int_odl>;
432 interrupt-parent = <&tlmm>;
433 interrupts = <104 IRQ_TYPE_EDGE_RISING>;
443 pinctrl-names = "default";
444 pinctrl-0 = <&dp_hot_plug_det>;
452 /* NVMe drive, enabled on a per-board basis */
454 pinctrl-names = "default";
455 pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>;
457 perst-gpios = <&tlmm 2 GPIO_ACTIVE_LOW>;
458 vddpe-3v3-supply = <&pp3300_ssd>;
465 &pm8350c_pwm_backlight {
468 /* Our board provides power to the qcard for the backlight */
469 power-supply = <&vreg_edp_bl>;
484 /* SD Card, enabled on a per-board basis */
486 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>;
487 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>;
489 vmmc-supply = <&pp2950_l9c>;
490 vqmmc-supply = <&ppvar_l6c>;
492 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>;
496 spi-max-frequency = <50000000>;
499 /* Fingerprint, enabled on a per-board basis */
501 pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>;
503 cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;
506 compatible = "google,cros-ec-spi";
508 interrupt-parent = <&tlmm>;
509 interrupts = <61 IRQ_TYPE_LEVEL_LOW>;
510 pinctrl-names = "default";
511 pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>;
512 spi-max-frequency = <3000000>;
518 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>;
520 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
523 compatible = "google,cros-ec-spi";
525 interrupt-parent = <&tlmm>;
526 interrupts = <18 IRQ_TYPE_LEVEL_LOW>;
527 pinctrl-names = "default";
528 pinctrl-0 = <&ap_ec_int_l>;
529 spi-max-frequency = <3000000>;
532 compatible = "google,cros-ec-pwm";
536 i2c_tunnel: i2c-tunnel {
537 compatible = "google,cros-ec-i2c-tunnel";
538 google,remote-bus = <0>;
539 #address-cells = <1>;
544 compatible = "google,cros-ec-typec";
545 #address-cells = <1>;
548 usb_c0: connector@0 {
549 compatible = "usb-c-connector";
554 try-power-role = "source";
557 usb_c1: connector@1 {
558 compatible = "usb-c-connector";
563 try-power-role = "source";
569 #include <arm/cros-ec-keyboard.dtsi>
570 #include <arm/cros-ec-sbs.dtsi>
572 &keyboard_controller {
573 function-row-physmap = <
574 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
575 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
576 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
577 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
578 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
579 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
580 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
581 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
582 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
583 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
586 MATRIX_KEY(0x00, 0x02, KEY_BACK)
587 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
588 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
589 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
590 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
591 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
592 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
593 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
594 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
595 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
608 #address-cells = <1>;
611 /* 2.x hub on port 1 */
613 compatible = "usbbda,5411";
615 vdd-supply = <&pp3300_hub>;
616 peer-hub = <&usb_hub_3_x>;
619 /* 3.x hub on port 2 */
621 compatible = "usbbda,411";
623 vdd-supply = <&pp3300_hub>;
624 peer-hub = <&usb_hub_2_x>;
636 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
644 drive-strength = <2>;
649 drive-strength = <8>;
654 drive-strength = <8>;
658 /* High-Z when no transfers; nice to park the lines */
660 drive-strength = <8>;
665 /* Has external pull */
667 drive-strength = <2>;
671 &qup_i2c14_data_clk {
672 /* Has external pull */
674 drive-strength = <2>;
680 drive-strength = <2>;
686 drive-strength = <2>;
690 &qup_spi10_data_clk {
692 drive-strength = <2>;
698 drive-strength = <2>;
709 drive-strength = <2>;
714 drive-strength = <16>;
719 drive-strength = <10>;
724 drive-strength = <10>;
727 /* PINCTRL - board-specific pinctrl */
731 * On a quick glance it might look like KYPD_VOL_UP_N is used, but
732 * that only passes through to a debug connector and not to the actual
735 status = "disabled"; /* No GPIOs are connected */
739 status = "disabled"; /* No GPIOs are connected */
743 /* pinctrl settings for pins that have no real owners. */
744 pinctrl-names = "default";
745 pinctrl-0 = <&bios_flash_wp_od>;
747 amp_en: amp-en-pins {
751 drive-strength = <2>;
754 ap_ec_int_l: ap-ec-int-l-pins {
760 bios_flash_wp_od: bios-flash-wp-od-pins {
763 /* Has external pull */
767 en_fp_rails: en-fp-rails-pins {
771 drive-strength = <2>;
775 en_pp3300_codec: en-pp3300-codec-pins {
779 drive-strength = <2>;
782 en_pp3300_dx_edp: en-pp3300-dx-edp-pins {
786 drive-strength = <2>;
789 fp_rst_l: fp-rst-l-pins {
793 drive-strength = <2>;
796 fp_to_ap_irq_l: fp-to-ap-irq-l-pins {
799 /* Has external pullup */
803 fpmcu_boot0: fpmcu-boot0-pins {
809 gsc_ap_int_odl: gsc-ap-int-odl-pins {
815 hp_irq: hp-irq-pins {
821 hub_en: hub-en-pins {
825 drive-strength = <2>;
828 pe_wake_odl: pe-wake-odl-pins {
831 /* Has external pull */
833 drive-strength = <2>;
837 qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high-pins {
844 qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high-pins {
850 sar0_irq_odl: sar0-irq-odl-pins {
856 sar1_irq_odl: sar1-irq-odl-pins {
862 sd_cd_odl: sd-cd-odl-pins {
868 ssd_en: ssd-en-pins {
872 drive-strength = <2>;
875 ssd_rst_l: ssd-rst-l-pins {
879 drive-strength = <2>;
883 tp_int_odl: tp-int-odl-pins {
886 /* Has external pullup */
890 wf_cam_en: wf-cam-en-pins {
893 /* Has external pulldown */
895 drive-strength = <2>;