arch/arm64/boot/dts/qcom/sc7280-herobrine-villager.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Google Villager board device tree source
   4  *
   5  * Copyright 2022 Google LLC.
   6  */
   7
   8 #include "sc7280-herobrine.dtsi"
   9
  10 /*
  11  * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES
  12  *
  13  * Sort order matches the order in the parent files (parents before children).
  14  */
  15
  16 &pp3300_codec {
  17         status = "okay";
  18 };
  19
  20 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
  21
  22 ap_tp_i2c: &i2c0 {
  23         status = "okay";
  24         clock-frequency = <400000>;
  25
  26         trackpad: trackpad@2c {
  27                 compatible = "hid-over-i2c";
  28                 reg = <0x2c>;
  29                 pinctrl-names = "default";
  30                 pinctrl-0 = <&tp_int_odl>;
  31
  32                 interrupt-parent = <&tlmm>;
  33                 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
  34
  35                 hid-descr-addr = <0x20>;
  36                 vdd-supply = <&pp3300_z1>;
  37
  38                 wakeup-source;
  39         };
  40 };
  41
  42 ts_i2c: &i2c13 {
  43         status = "okay";
  44         clock-frequency = <400000>;
  45
  46         ap_ts: touchscreen@10 {
  47                 compatible = "elan,ekth6915";
  48                 reg = <0x10>;
  49                 pinctrl-names = "default";
  50                 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
  51
  52                 interrupt-parent = <&tlmm>;
  53                 interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
  54
  55                 reset-gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
  56
  57                 vcc33-supply = <&ts_avdd>;
  58         };
  59 };
  60
  61 &ap_sar_sensor_i2c {
  62         status = "okay";
  63 };
  64
  65 &ap_sar_sensor0 {
  66         status = "okay";
  67 };
  68
  69 &ap_sar_sensor1 {
  70         status = "okay";
  71 };
  72
  73 &mdss_edp {
  74         status = "okay";
  75 };
  76
  77 &mdss_edp_phy {
  78         status = "okay";
  79 };
  80
  81 /* For nvme */
  82 &pcie1 {
  83         status = "okay";
  84 };
  85
  86 /* For nvme */
  87 &pcie1_phy {
  88         status = "okay";
  89 };
  90
  91 &pwmleds {
  92         status = "okay";
  93 };
  94
  95 /* For eMMC */
  96 &sdhc_1 {
  97         status = "okay";
  98 };
  99
 100 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
 101
 102 &ts_rst_conn {
 103         bias-disable;
 104 };
 105
 106 /* PINCTRL - BOARD-SPECIFIC */
 107
 108 /*
 109  * Methodology for gpio-line-names:
 110  * - If a pin goes to herobrine board and is named it gets that name.
 111  * - If a pin goes to herobrine board and is not named, it gets no name.
 112  * - If a pin is totally internal to Qcard then it gets Qcard name.
 113  * - If a pin is not hooked up on Qcard, it gets no name.
 114  */
 115
 116 &pm8350c_gpios {
 117         gpio-line-names = "FLASH_STROBE_1",             /* 1 */
 118                           "AP_SUSPEND",
 119                           "PM8008_1_RST_N",
 120                           "",
 121                           "",
 122                           "",
 123                           "PMIC_EDP_BL_EN",
 124                           "PMIC_EDP_BL_PWM",
 125                           "";
 126 };
 127
 128 &tlmm {
 129         gpio-line-names = "AP_TP_I2C_SDA",              /* 0 */
 130                           "AP_TP_I2C_SCL",
 131                           "SSD_RST_L",
 132                           "PE_WAKE_ODL",
 133                           "AP_SAR_SDA",
 134                           "AP_SAR_SCL",
 135                           "PRB_SC_GPIO_6",
 136                           "TP_INT_ODL",
 137                           "HP_I2C_SDA",
 138                           "HP_I2C_SCL",
 139
 140                           "GNSS_L1_EN",                 /* 10 */
 141                           "GNSS_L5_EN",
 142                           "SPI_AP_MOSI",
 143                           "SPI_AP_MISO",
 144                           "SPI_AP_CLK",
 145                           "SPI_AP_CS0_L",
 146                           /*
 147                            * AP_FLASH_WP is crossystem ABI. Schematics
 148                            * call it BIOS_FLASH_WP_OD.
 149                            */
 150                           "AP_FLASH_WP",
 151                           "",
 152                           "AP_EC_INT_L",
 153                           "",
 154
 155                           "UF_CAM_RST_L",               /* 20 */
 156                           "WF_CAM_RST_L",
 157                           "UART_AP_TX_DBG_RX",
 158                           "UART_DBG_TX_AP_RX",
 159                           "",
 160                           "PM8008_IRQ_1",
 161                           "HOST2WLAN_SOL",
 162                           "WLAN2HOST_SOL",
 163                           "MOS_BT_UART_CTS",
 164                           "MOS_BT_UART_RFR",
 165
 166                           "MOS_BT_UART_TX",             /* 30 */
 167                           "MOS_BT_UART_RX",
 168                           "PRB_SC_GPIO_32",
 169                           "HUB_RST_L",
 170                           "",
 171                           "",
 172                           "AP_SPI_FP_MISO",
 173                           "AP_SPI_FP_MOSI",
 174                           "AP_SPI_FP_CLK",
 175                           "AP_SPI_FP_CS_L",
 176
 177                           "AP_EC_SPI_MISO",             /* 40 */
 178                           "AP_EC_SPI_MOSI",
 179                           "AP_EC_SPI_CLK",
 180                           "AP_EC_SPI_CS_L",
 181                           "LCM_RST_L",
 182                           "EARLY_EUD_N",
 183                           "",
 184                           "DP_HOT_PLUG_DET",
 185                           "IO_BRD_MLB_ID0",
 186                           "IO_BRD_MLB_ID1",
 187
 188                           "IO_BRD_MLB_ID2",             /* 50 */
 189                           "SSD_EN",
 190                           "TS_I2C_SDA_CONN",
 191                           "TS_I2C_CLK_CONN",
 192                           "TS_RST_CONN",
 193                           "TS_INT_CONN",
 194                           "AP_I2C_TPM_SDA",
 195                           "AP_I2C_TPM_SCL",
 196                           "PRB_SC_GPIO_58",
 197                           "PRB_SC_GPIO_59",
 198
 199                           "EDP_HOT_PLUG_DET_N",         /* 60 */
 200                           "FP_TO_AP_IRQ_L",
 201                           "",
 202                           "AMP_EN",
 203                           "CAM0_MCLK_GPIO_64",
 204                           "CAM1_MCLK_GPIO_65",
 205                           "WF_CAM_MCLK",
 206                           "PRB_SC_GPIO_67",
 207                           "FPMCU_BOOT0",
 208                           "UF_CAM_SDA",
 209
 210                           "UF_CAM_SCL",                 /* 70 */
 211                           "",
 212                           "",
 213                           "WF_CAM_SDA",
 214                           "WF_CAM_SCL",
 215                           "",
 216                           "",
 217                           "EN_FP_RAILS",
 218                           "FP_RST_L",
 219                           "PCIE1_CLKREQ_ODL",
 220
 221                           "EN_PP3300_DX_EDP",           /* 80 */
 222                           "SC_GPIO_81",
 223                           "FORCED_USB_BOOT",
 224                           "WCD_RESET_N",
 225                           "MOS_WLAN_EN",
 226                           "MOS_BT_EN",
 227                           "MOS_SW_CTRL",
 228                           "MOS_PCIE0_RST",
 229                           "MOS_PCIE0_CLKREQ_N",
 230                           "MOS_PCIE0_WAKE_N",
 231
 232                           "MOS_LAA_AS_EN",              /* 90 */
 233                           "SD_CD_ODL",
 234                           "",
 235                           "",
 236                           "MOS_BT_WLAN_SLIMBUS_CLK",
 237                           "MOS_BT_WLAN_SLIMBUS_DAT0",
 238                           "HP_MCLK",
 239                           "HP_BCLK",
 240                           "HP_DOUT",
 241                           "HP_DIN",
 242
 243                           "HP_LRCLK",                   /* 100 */
 244                           "HP_IRQ",
 245                           "",
 246                           "",
 247                           "GSC_AP_INT_ODL",
 248                           "EN_PP3300_CODEC",
 249                           "AMP_BCLK",
 250                           "AMP_DIN",
 251                           "AMP_LRCLK",
 252                           "UIM1_DATA_GPIO_109",
 253
 254                           "UIM1_CLK_GPIO_110",          /* 110 */
 255                           "UIM1_RESET_GPIO_111",
 256                           "PRB_SC_GPIO_112",
 257                           "UIM0_DATA",
 258                           "UIM0_CLK",
 259                           "UIM0_RST",
 260                           "UIM0_PRESENT_ODL",
 261                           "SDM_RFFE0_CLK",
 262                           "SDM_RFFE0_DATA",
 263                           "WF_CAM_EN",
 264
 265                           "FASTBOOT_SEL_0",             /* 120 */
 266                           "SC_GPIO_121",
 267                           "FASTBOOT_SEL_1",
 268                           "SC_GPIO_123",
 269                           "FASTBOOT_SEL_2",
 270                           "SM_RFFE4_CLK_GRFC_8",
 271                           "SM_RFFE4_DATA_GRFC_9",
 272                           "WLAN_COEX_UART1_RX",
 273                           "WLAN_COEX_UART1_TX",
 274                           "PRB_SC_GPIO_129",
 275
 276                           "LCM_ID0",                    /* 130 */
 277                           "LCM_ID1",
 278                           "",
 279                           "SDR_QLINK_REQ",
 280                           "SDR_QLINK_EN",
 281                           "QLINK0_WMSS_RESET_N",
 282                           "SMR526_QLINK1_REQ",
 283                           "SMR526_QLINK1_EN",
 284                           "SMR526_QLINK1_WMSS_RESET_N",
 285                           "PRB_SC_GPIO_139",
 286
 287                           "SAR1_IRQ_ODL",               /* 140 */
 288                           "SAR0_IRQ_ODL",
 289                           "PRB_SC_GPIO_142",
 290                           "",
 291                           "WCD_SWR_TX_CLK",
 292                           "WCD_SWR_TX_DATA0",
 293                           "WCD_SWR_TX_DATA1",
 294                           "WCD_SWR_RX_CLK",
 295                           "WCD_SWR_RX_DATA0",
 296                           "WCD_SWR_RX_DATA1",
 297
 298                           "DMIC01_CLK",                 /* 150 */
 299                           "DMIC01_DATA",
 300                           "DMIC23_CLK",
 301                           "DMIC23_DATA",
 302                           "",
 303                           "",
 304                           "EC_IN_RW_ODL",
 305                           "HUB_EN",
 306                           "WCD_SWR_TX_DATA2",
 307                           "",
 308
 309                           "",                           /* 160 */
 310                           "",
 311                           "",
 312                           "",
 313                           "",
 314                           "",
 315                           "",
 316                           "",
 317                           "",
 318                           "",
 319
 320                           "",                           /* 170 */
 321                           "MOS_BLE_UART_TX",
 322                           "MOS_BLE_UART_RX",
 323                           "",
 324                           "",
 325                           "";
 326 };