1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sc7280 CRD 3+ board device tree source
5 * Copyright 2022 Google LLC.
10 #include "sc7280-herobrine.dtsi"
11 #include "sc7280-herobrine-audio-wcd9385.dtsi"
12 #include "sc7280-herobrine-lte-sku.dtsi"
15 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev5+)";
16 compatible = "google,zoglin", "google,hoglin", "qcom,sc7280";
18 /* FIXED REGULATORS */
21 * On most herobrine boards PPVAR_SYS directly provides VREG_EDP_BL.
22 * However, on CRD there's an extra regulator in the way. Since this
23 * is expected to be uncommon, we'll leave the "vreg_edp_bl" label
24 * in the baseboard herobrine.dtsi point at "ppvar_sys" and then
25 * make a "_crd" specific version here.
27 vreg_edp_bl_crd: vreg-edp-bl-crd-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vreg_edp_bl_crd";
31 gpio = <&pm8350c_gpios 6 GPIO_ACTIVE_HIGH>;
33 pinctrl-names = "default";
34 pinctrl-0 = <&edp_bl_reg_en>;
36 vin-supply = <&ppvar_sys>;
40 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
44 compatible = "qcom,pmg1110-rpmh-regulators";
48 regulator-min-microvolt = <1010000>;
49 regulator-max-microvolt = <1170000>;
56 clock-frequency = <400000>;
58 trackpad: trackpad@15 {
59 compatible = "hid-over-i2c";
61 pinctrl-names = "default";
62 pinctrl-0 = <&tp_int_odl>;
64 interrupt-parent = <&tlmm>;
65 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
67 post-power-on-delay-ms = <20>;
68 hid-descr-addr = <0x0001>;
69 vdd-supply = <&pp3300_z1>;
87 ap_ts_pen_1v8: &i2c13 {
89 clock-frequency = <400000>;
91 ap_ts: touchscreen@5c {
92 compatible = "hid-over-i2c";
94 pinctrl-names = "default";
95 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>;
97 interrupt-parent = <&tlmm>;
98 interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
100 post-power-on-delay-ms = <500>;
101 hid-descr-addr = <0x0000>;
103 vdd-supply = <&pp3300_left_in_mlb>;
125 &pm8350c_pwm_backlight {
126 power-supply = <&vreg_edp_bl_crd>;
139 /* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */
142 * This pin goes to the display panel but then doesn't actually do anything
143 * on the panel itself (it doesn't connect to the touchscreen controller).
144 * We'll set a pullup here just to park the line.
150 /* PINCTRL - BOARD-SPECIFIC */
153 * Methodology for gpio-line-names:
154 * - If a pin goes to CRD board and is named it gets that name.
155 * - If a pin goes to CRD board and is not named, it gets no name.
156 * - If a pin is totally internal to Qcard then it gets Qcard name.
157 * - If a pin is not hooked up on Qcard, it gets no name.
161 gpio-line-names = "FLASH_STROBE_1", /* 1 */
171 edp_bl_reg_en: edp-bl-reg-en-state {
175 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
180 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */
191 "GNSS_L1_EN", /* 10 */
198 * AP_FLASH_WP is crossystem ABI. Schematics call it
199 * BIOS_FLASH_WP_L (the '_L' suffix is misleading, the
200 * signal is active high).
207 "CAM0_RST_N", /* 20 */
218 "MOS_BT_UART_TX", /* 30 */
229 "EC_SPI_MISO_GPIO40", /* 40 */
230 "EC_SPI_MOSI_GPIO41",
236 "DP_HOT_PLUG_DETECT",
240 "AP_BRD_ID_2", /* 50 */
251 "EDP_HOT_PLUG_DET_N", /* 60 */
262 "CCI_I2C_SCL0", /* 70 */
273 "EN_PP3300_DX_EDP", /* 80 */
281 "MOS_PCIE0_CLKREQ_N",
284 "MOS_LAA_AS_EN", /* 90 */
288 "MOS_BT_WLAN_SLIMBUS_CLK",
289 "MOS_BT_WLAN_SLIMBUS_DAT0",
304 "UIM1_DATA_GPIO_109",
306 "UIM1_CLK_GPIO_110", /* 110 */
307 "UIM1_RESET_GPIO_111",
317 "SDM_RFFE1_DATA", /* 120 */
322 "SM_RFFE4_CLK_GRFC_8",
323 "SM_RFFE4_DATA_GRFC_9",
324 "WLAN_COEX_UART1_RX",
325 "WLAN_COEX_UART1_TX",
333 "QLINK0_WMSS_RESET_N",
336 "SMR526_QLINK1_WMSS_RESET_N",
339 "SAR1_INT_N", /* 140 */
350 "DMIC01_CLK", /* 150 */