arch/arm64/boot/dts/qcom/sc7280-herobrine-audio-wcd9385.dtsi

   1 // SPDX-License-Identifier: BSD-3-Clause
   2 /*
   3  * sc7280 device tree source for boards using Max98360 and wcd9385 codec
   4  *
   5  * Copyright (c) 2022, The Linux Foundation. All rights reserved.
   6  */
   7
   8 / {
   9         /* BOARD-SPECIFIC TOP LEVEL NODES */
  10         sound: sound {
  11                 compatible = "google,sc7280-herobrine";
  12                 model = "sc7280-wcd938x-max98360a-1mic";
  13
  14                 audio-routing =
  15                         "IN1_HPHL", "HPHL_OUT",
  16                         "IN2_HPHR", "HPHR_OUT",
  17                         "AMIC1", "MIC BIAS1",
  18                         "AMIC2", "MIC BIAS2",
  19                         "VA DMIC0", "MIC BIAS1",
  20                         "VA DMIC1", "MIC BIAS1",
  21                         "VA DMIC2", "MIC BIAS3",
  22                         "VA DMIC3", "MIC BIAS3",
  23                         "TX SWR_ADC0", "ADC1_OUTPUT",
  24                         "TX SWR_ADC1", "ADC2_OUTPUT",
  25                         "TX SWR_ADC2", "ADC3_OUTPUT",
  26                         "TX SWR_DMIC0", "DMIC1_OUTPUT",
  27                         "TX SWR_DMIC1", "DMIC2_OUTPUT",
  28                         "TX SWR_DMIC2", "DMIC3_OUTPUT",
  29                         "TX SWR_DMIC3", "DMIC4_OUTPUT",
  30                         "TX SWR_DMIC4", "DMIC5_OUTPUT",
  31                         "TX SWR_DMIC5", "DMIC6_OUTPUT",
  32                         "TX SWR_DMIC6", "DMIC7_OUTPUT",
  33                         "TX SWR_DMIC7", "DMIC8_OUTPUT";
  34
  35                 qcom,msm-mbhc-hphl-swh = <1>;
  36                 qcom,msm-mbhc-gnd-swh = <1>;
  37
  38                 #address-cells = <1>;
  39                 #size-cells = <0>;
  40                 #sound-dai-cells = <0>;
  41
  42                 dai-link@0 {
  43                         link-name = "MAX98360A";
  44                         reg = <0>;
  45
  46                         cpu {
  47                                 sound-dai = <&lpass_cpu MI2S_SECONDARY>;
  48                         };
  49
  50                         codec {
  51                                 sound-dai = <&max98360a>;
  52                         };
  53                 };
  54
  55                 dai-link@1 {
  56                         link-name = "DisplayPort";
  57                         reg = <1>;
  58
  59                         cpu {
  60                                 sound-dai = <&lpass_cpu LPASS_DP_RX>;
  61                         };
  62
  63                         codec {
  64                                 sound-dai = <&mdss_dp>;
  65                         };
  66                 };
  67
  68                 dai-link@2 {
  69                         link-name = "WCD9385 Playback";
  70                         reg = <2>;
  71
  72                         cpu {
  73                                 sound-dai = <&lpass_cpu LPASS_CDC_DMA_RX0>;
  74                         };
  75
  76                         codec {
  77                                 sound-dai = <&wcd9385 0>, <&swr0 0>, <&lpass_rx_macro 0>;
  78                         };
  79                 };
  80
  81                 dai-link@3 {
  82                         link-name = "WCD9385 Capture";
  83                         reg = <3>;
  84
  85                         cpu {
  86                                 sound-dai = <&lpass_cpu LPASS_CDC_DMA_TX3>;
  87                         };
  88
  89                         codec {
  90                                 sound-dai = <&wcd9385 1>, <&swr1 0>, <&lpass_tx_macro 0>;
  91                         };
  92                 };
  93
  94                 dai-link@4 {
  95                         link-name = "DMIC";
  96                         reg = <4>;
  97
  98                         cpu {
  99                                 sound-dai = <&lpass_cpu LPASS_CDC_DMA_VA_TX0>;
 100                         };
 101
 102                         codec {
 103                                 sound-dai = <&lpass_va_macro 0>;
 104                         };
 105                 };
 106         };
 107 };
 108
 109 /* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
 110
 111 &lpass_cpu {
 112         status = "okay";
 113
 114         pinctrl-names = "default";
 115         pinctrl-0 = <&mi2s1_data0>, <&mi2s1_sclk>, <&mi2s1_ws>;
 116
 117         dai-link@1 {
 118                 reg = <MI2S_SECONDARY>;
 119                 qcom,playback-sd-lines = <0>;
 120         };
 121
 122         dai-link@5 {
 123                 reg = <LPASS_DP_RX>;
 124         };
 125
 126         dai-link@6 {
 127                 reg = <LPASS_CDC_DMA_RX0>;
 128         };
 129
 130         dai-link@19 {
 131                 reg = <LPASS_CDC_DMA_TX3>;
 132         };
 133
 134         dai-link@25 {
 135                 reg = <LPASS_CDC_DMA_VA_TX0>;
 136         };
 137 };
 138
 139 &lpass_rx_macro {
 140         status = "okay";
 141 };
 142
 143 &lpass_tx_macro {
 144         status = "okay";
 145 };
 146
 147 &lpass_va_macro {
 148         status = "okay";
 149 };
 150
 151 &swr0 {
 152         status = "okay";
 153 };
 154
 155 &swr1 {
 156         status = "okay";
 157 };
 158
 159 &wcd9385 {
 160         status = "okay";
 161 };
 162
 163 /* PINCTRL */
 164
 165 &lpass_dmic01_clk {
 166         drive-strength = <8>;
 167         bias-disable;
 168 };
 169
 170 &lpass_dmic01_clk_sleep {
 171         drive-strength = <2>;
 172 };
 173
 174 &lpass_dmic01_data {
 175         bias-pull-down;
 176 };
 177
 178 &lpass_dmic23_clk {
 179         drive-strength = <8>;
 180         bias-disable;
 181 };
 182
 183 &lpass_dmic23_clk_sleep {
 184         drive-strength = <2>;
 185 };
 186
 187 &lpass_dmic23_data {
 188         bias-pull-down;
 189 };
 190
 191 &lpass_rx_swr_clk {
 192         drive-strength = <2>;
 193         slew-rate = <1>;
 194         bias-disable;
 195 };
 196
 197 &lpass_rx_swr_clk_sleep {
 198         bias-pull-down;
 199 };
 200
 201 &lpass_rx_swr_data {
 202         drive-strength = <2>;
 203         slew-rate = <1>;
 204         bias-bus-hold;
 205 };
 206
 207 &lpass_rx_swr_data_sleep {
 208         bias-pull-down;
 209 };
 210
 211 &lpass_tx_swr_clk {
 212         drive-strength = <2>;
 213         slew-rate = <1>;
 214         bias-disable;
 215 };
 216
 217 &lpass_tx_swr_clk_sleep {
 218         bias-pull-down;
 219 };
 220
 221 &lpass_tx_swr_data {
 222         drive-strength = <2>;
 223         slew-rate = <1>;
 224         bias-bus-hold;
 225 };
 226
 227 &mi2s1_data0 {
 228         drive-strength = <6>;
 229         bias-disable;
 230 };
 231
 232 &mi2s1_sclk {
 233         drive-strength = <6>;
 234         bias-disable;
 235 };
 236
 237 &mi2s1_ws {
 238         drive-strength = <6>;
 239 };