1 // SPDX-License-Identifier: BSD-3-Clause
3 * sc7280 CRD board device tree source
5 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
10 #include "sc7280-idp.dtsi"
11 #include "sc7280-idp-ec-h1.dtsi"
14 model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15 compatible = "qcom,sc7280-crd",
16 "google,hoglin-rev3", "google,hoglin-rev4",
17 "google,piglin-rev3", "google,piglin-rev4",
25 stdout-path = "serial0:115200n8";
31 compatible = "qcom,pmg1110-rpmh-regulators";
35 regulator-min-microvolt = <1010000>;
36 regulator-max-microvolt = <1170000>;
43 clock-frequency = <400000>;
45 trackpad: trackpad@15 {
46 compatible = "hid-over-i2c";
48 pinctrl-names = "default";
49 pinctrl-0 = <&tp_int_odl>;
51 interrupt-parent = <&tlmm>;
52 interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
54 post-power-on-delay-ms = <20>;
55 hid-descr-addr = <0x0001>;
56 vdd-supply = <&vreg_l18b_1p8>;
62 ap_ts_pen_1v8: &i2c13 {
64 clock-frequency = <400000>;
66 ap_ts: touchscreen@5c {
67 compatible = "hid-over-i2c";
69 pinctrl-names = "default";
70 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
72 interrupt-parent = <&tlmm>;
73 interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
75 post-power-on-delay-ms = <500>;
76 hid-descr-addr = <0x0000>;
78 vdd-supply = <&vreg_l19b_1p8>;
83 gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
92 "IN1_HPHL", "HPHL_OUT",
93 "IN2_HPHR", "HPHR_OUT",
96 "VA DMIC0", "MIC BIAS1",
97 "VA DMIC1", "MIC BIAS1",
98 "VA DMIC2", "MIC BIAS3",
99 "VA DMIC3", "MIC BIAS3",
100 "TX SWR_ADC0", "ADC1_OUTPUT",
101 "TX SWR_ADC1", "ADC2_OUTPUT",
102 "TX SWR_ADC2", "ADC3_OUTPUT",
103 "TX SWR_DMIC0", "DMIC1_OUTPUT",
104 "TX SWR_DMIC1", "DMIC2_OUTPUT",
105 "TX SWR_DMIC2", "DMIC3_OUTPUT",
106 "TX SWR_DMIC3", "DMIC4_OUTPUT",
107 "TX SWR_DMIC4", "DMIC5_OUTPUT",
108 "TX SWR_DMIC5", "DMIC6_OUTPUT",
109 "TX SWR_DMIC6", "DMIC7_OUTPUT",
110 "TX SWR_DMIC7", "DMIC8_OUTPUT";
114 pinctrl-names = "default", "sleep";
115 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
116 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
117 us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
121 tp_int_odl: tp-int-odl {
133 ts_reset_l: ts-reset-l {
139 us_euro_hs_sel: us-euro-hs-sel {
143 drive-strength = <2>;