1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * IPQ9574 RDP418 board device tree source
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
11 #include "ipq9574.dtsi"
14 model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C2";
15 compatible = "qcom,ipq9574-ap-al02-c2", "qcom,ipq9574";
18 serial0 = &blsp1_uart2;
22 stdout-path = "serial0:115200n8";
27 pinctrl-0 = <&spi_0_pins>;
28 pinctrl-names = "default";
32 compatible = "micron,n25q128a11", "jedec,spi-nor";
36 spi-max-frequency = <50000000>;
41 pinctrl-0 = <&uart2_pins>;
42 pinctrl-names = "default";
48 compatible = "qcom,rpm-mp5496-regulators";
52 * During kernel bootup, the SoC runs at 800MHz with 875mV set by the bootloaders.
53 * During regulator registration, kernel not knowing the initial voltage,
54 * considers it as zero and brings up the regulators with minimum supported voltage.
55 * Update the regulator-min-microvolt with SVS voltage of 725mV so that
56 * the regulators are brought up with 725mV which is sufficient for all the
57 * corner parts to operate at 800MHz
59 regulator-min-microvolt = <725000>;
60 regulator-max-microvolt = <1075000>;
66 pinctrl-0 = <&sdc_default_state>;
67 pinctrl-names = "default";
71 mmc-hs400-enhanced-strobe;
72 max-frequency = <384000000>;
78 clock-frequency = <32000>;
82 sdc_default_state: sdc-default-state {
98 pins = "gpio0", "gpio1", "gpio2",
99 "gpio3", "gpio6", "gpio7",
101 function = "sdc_data";
102 drive-strength = <8>;
108 function = "sdc_rclk";
109 drive-strength = <8>;
114 spi_0_pins: spi-0-state {
115 pins = "gpio11", "gpio12", "gpio13", "gpio14";
116 function = "blsp0_spi";
117 drive-strength = <8>;
123 clock-frequency = <24000000>;