1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
7 #include "sparx5_pcb_common.dtsi"
11 compatible = "gpio-restart";
12 gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
17 compatible = "gpio-leds";
20 gpios = <&sgpio_out0 8 0 GPIO_ACTIVE_LOW>;
23 label = "twr0:yellow";
24 gpios = <&sgpio_out0 8 1 GPIO_ACTIVE_LOW>;
28 gpios = <&sgpio_out0 9 0 GPIO_ACTIVE_LOW>;
31 label = "twr1:yellow";
32 gpios = <&sgpio_out0 9 1 GPIO_ACTIVE_LOW>;
36 gpios = <&sgpio_out0 10 0 GPIO_ACTIVE_LOW>;
39 label = "twr2:yellow";
40 gpios = <&sgpio_out0 10 1 GPIO_ACTIVE_LOW>;
44 gpios = <&sgpio_out0 11 0 GPIO_ACTIVE_LOW>;
47 label = "twr3:yellow";
48 gpios = <&sgpio_out0 11 1 GPIO_ACTIVE_LOW>;
51 label = "eth12:green";
52 gpios = <&sgpio_out0 12 0 GPIO_ACTIVE_HIGH>;
53 default-state = "off";
56 label = "eth12:yellow";
57 gpios = <&sgpio_out0 12 1 GPIO_ACTIVE_HIGH>;
58 default-state = "off";
61 label = "eth13:green";
62 gpios = <&sgpio_out0 13 0 GPIO_ACTIVE_HIGH>;
63 default-state = "off";
66 label = "eth13:yellow";
67 gpios = <&sgpio_out0 13 1 GPIO_ACTIVE_HIGH>;
68 default-state = "off";
71 label = "eth14:green";
72 gpios = <&sgpio_out0 14 0 GPIO_ACTIVE_HIGH>;
73 default-state = "off";
76 label = "eth14:yellow";
77 gpios = <&sgpio_out0 14 1 GPIO_ACTIVE_HIGH>;
78 default-state = "off";
81 label = "eth15:green";
82 gpios = <&sgpio_out0 15 0 GPIO_ACTIVE_HIGH>;
83 default-state = "off";
86 label = "eth15:yellow";
87 gpios = <&sgpio_out0 15 1 GPIO_ACTIVE_HIGH>;
88 default-state = "off";
91 label = "eth48:green";
92 gpios = <&sgpio_out1 16 0 GPIO_ACTIVE_HIGH>;
93 default-state = "off";
96 label = "eth48:yellow";
97 gpios = <&sgpio_out1 16 1 GPIO_ACTIVE_HIGH>;
98 default-state = "off";
101 label = "eth49:green";
102 gpios = <&sgpio_out1 17 0 GPIO_ACTIVE_HIGH>;
103 default-state = "off";
106 label = "eth49:yellow";
107 gpios = <&sgpio_out1 17 1 GPIO_ACTIVE_HIGH>;
108 default-state = "off";
111 label = "eth50:green";
112 gpios = <&sgpio_out1 18 0 GPIO_ACTIVE_HIGH>;
113 default-state = "off";
116 label = "eth50:yellow";
117 gpios = <&sgpio_out1 18 1 GPIO_ACTIVE_HIGH>;
118 default-state = "off";
121 label = "eth51:green";
122 gpios = <&sgpio_out1 19 0 GPIO_ACTIVE_HIGH>;
123 default-state = "off";
126 label = "eth51:yellow";
127 gpios = <&sgpio_out1 19 1 GPIO_ACTIVE_HIGH>;
128 default-state = "off";
131 label = "eth52:green";
132 gpios = <&sgpio_out1 20 0 GPIO_ACTIVE_HIGH>;
133 default-state = "off";
136 label = "eth52:yellow";
137 gpios = <&sgpio_out1 20 1 GPIO_ACTIVE_HIGH>;
138 default-state = "off";
141 label = "eth53:green";
142 gpios = <&sgpio_out1 21 0 GPIO_ACTIVE_HIGH>;
143 default-state = "off";
146 label = "eth53:yellow";
147 gpios = <&sgpio_out1 21 1 GPIO_ACTIVE_HIGH>;
148 default-state = "off";
151 label = "eth54:green";
152 gpios = <&sgpio_out1 22 0 GPIO_ACTIVE_HIGH>;
153 default-state = "off";
156 label = "eth54:yellow";
157 gpios = <&sgpio_out1 22 1 GPIO_ACTIVE_HIGH>;
158 default-state = "off";
161 label = "eth55:green";
162 gpios = <&sgpio_out1 23 0 GPIO_ACTIVE_HIGH>;
163 default-state = "off";
166 label = "eth55:yellow";
167 gpios = <&sgpio_out1 23 1 GPIO_ACTIVE_HIGH>;
168 default-state = "off";
171 label = "eth56:green";
172 gpios = <&sgpio_out1 24 0 GPIO_ACTIVE_HIGH>;
173 default-state = "off";
176 label = "eth56:yellow";
177 gpios = <&sgpio_out1 24 1 GPIO_ACTIVE_HIGH>;
178 default-state = "off";
181 label = "eth57:green";
182 gpios = <&sgpio_out1 25 0 GPIO_ACTIVE_HIGH>;
183 default-state = "off";
186 label = "eth57:yellow";
187 gpios = <&sgpio_out1 25 1 GPIO_ACTIVE_HIGH>;
188 default-state = "off";
191 label = "eth58:green";
192 gpios = <&sgpio_out1 26 0 GPIO_ACTIVE_HIGH>;
193 default-state = "off";
196 label = "eth58:yellow";
197 gpios = <&sgpio_out1 26 1 GPIO_ACTIVE_HIGH>;
198 default-state = "off";
201 label = "eth59:green";
202 gpios = <&sgpio_out1 27 0 GPIO_ACTIVE_HIGH>;
203 default-state = "off";
206 label = "eth59:yellow";
207 gpios = <&sgpio_out1 27 1 GPIO_ACTIVE_HIGH>;
208 default-state = "off";
211 label = "eth60:green";
212 gpios = <&sgpio_out1 28 0 GPIO_ACTIVE_HIGH>;
213 default-state = "off";
216 label = "eth60:yellow";
217 gpios = <&sgpio_out1 28 1 GPIO_ACTIVE_HIGH>;
218 default-state = "off";
221 label = "eth61:green";
222 gpios = <&sgpio_out1 29 0 GPIO_ACTIVE_HIGH>;
223 default-state = "off";
226 label = "eth61:yellow";
227 gpios = <&sgpio_out1 29 1 GPIO_ACTIVE_HIGH>;
228 default-state = "off";
231 label = "eth62:green";
232 gpios = <&sgpio_out1 30 0 GPIO_ACTIVE_HIGH>;
233 default-state = "off";
236 label = "eth62:yellow";
237 gpios = <&sgpio_out1 30 1 GPIO_ACTIVE_HIGH>;
238 default-state = "off";
241 label = "eth63:green";
242 gpios = <&sgpio_out1 31 0 GPIO_ACTIVE_HIGH>;
243 default-state = "off";
246 label = "eth63:yellow";
247 gpios = <&sgpio_out1 31 1 GPIO_ACTIVE_HIGH>;
248 default-state = "off";
255 microchip,sgpio-port-ranges = <8 15>;
266 microchip,sgpio-port-ranges = <24 31>;
278 compatible = "jedec,spi-nor";
279 spi-max-frequency = <8000000>;
287 compatible = "spi-mux";
288 mux-controls = <&mux>;
289 #address-cells = <1>;
293 compatible = "jedec,spi-nor";
294 spi-max-frequency = <8000000>;
295 reg = <0x9>; /* SPI */
302 microchip,sgpio-port-ranges = <8 15>;
313 microchip,sgpio-port-ranges = <24 31>;
324 microchip,sgpio-port-ranges = <0 0>, <11 31>;
328 i2cmux_pins_i: i2cmux-pins {
329 pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19",
330 "GPIO_20", "GPIO_22", "GPIO_36", "GPIO_35",
331 "GPIO_50", "GPIO_51", "GPIO_56", "GPIO_57";
332 function = "twi_scl_m";
335 i2cmux_0: i2cmux-0-pins {
337 function = "twi_scl_m";
340 i2cmux_1: i2cmux-1-pins {
342 function = "twi_scl_m";
345 i2cmux_2: i2cmux-2-pins {
347 function = "twi_scl_m";
350 i2cmux_3: i2cmux-3-pins {
352 function = "twi_scl_m";
355 i2cmux_4: i2cmux-4-pins {
357 function = "twi_scl_m";
360 i2cmux_5: i2cmux-5-pins {
362 function = "twi_scl_m";
365 i2cmux_6: i2cmux-6-pins {
367 function = "twi_scl_m";
370 i2cmux_7: i2cmux-7-pins {
372 function = "twi_scl_m";
375 i2cmux_8: i2cmux-8-pins {
377 function = "twi_scl_m";
380 i2cmux_9: i2cmux-9-pins {
382 function = "twi_scl_m";
385 i2cmux_10: i2cmux-10-pins {
387 function = "twi_scl_m";
390 i2cmux_11: i2cmux-11-pins {
392 function = "twi_scl_m";
398 i2c0_imux: i2c0-imux@0 {
399 compatible = "i2c-mux-pinctrl";
400 #address-cells = <1>;
402 i2c-parent = <&i2c0>;
404 i2c0_emux: i2c0-emux@0 {
405 compatible = "i2c-mux-gpio";
406 #address-cells = <1>;
408 i2c-parent = <&i2c0>;
414 "i2c_sfp1", "i2c_sfp2", "i2c_sfp3", "i2c_sfp4",
415 "i2c_sfp5", "i2c_sfp6", "i2c_sfp7", "i2c_sfp8",
416 "i2c_sfp9", "i2c_sfp10", "i2c_sfp11", "i2c_sfp12", "idle";
417 pinctrl-0 = <&i2cmux_0>;
418 pinctrl-1 = <&i2cmux_1>;
419 pinctrl-2 = <&i2cmux_2>;
420 pinctrl-3 = <&i2cmux_3>;
421 pinctrl-4 = <&i2cmux_4>;
422 pinctrl-5 = <&i2cmux_5>;
423 pinctrl-6 = <&i2cmux_6>;
424 pinctrl-7 = <&i2cmux_7>;
425 pinctrl-8 = <&i2cmux_8>;
426 pinctrl-9 = <&i2cmux_9>;
427 pinctrl-10 = <&i2cmux_10>;
428 pinctrl-11 = <&i2cmux_11>;
429 pinctrl-12 = <&i2cmux_pins_i>;
432 #address-cells = <1>;
437 #address-cells = <1>;
442 #address-cells = <1>;
447 #address-cells = <1>;
452 #address-cells = <1>;
457 #address-cells = <1>;
462 #address-cells = <1>;
467 #address-cells = <1>;
472 #address-cells = <1>;
475 i2c_sfp10: i2c_sfp10 {
477 #address-cells = <1>;
480 i2c_sfp11: i2c_sfp11 {
482 #address-cells = <1>;
485 i2c_sfp12: i2c_sfp12 {
487 #address-cells = <1>;
493 mux-gpios = <&gpio 55 GPIO_ACTIVE_HIGH
494 &gpio 60 GPIO_ACTIVE_HIGH
495 &gpio 61 GPIO_ACTIVE_HIGH
496 &gpio 54 GPIO_ACTIVE_HIGH>;
498 i2c_sfp13: i2c_sfp13 {
500 #address-cells = <1>;
503 i2c_sfp14: i2c_sfp14 {
505 #address-cells = <1>;
508 i2c_sfp15: i2c_sfp15 {
510 #address-cells = <1>;
513 i2c_sfp16: i2c_sfp16 {
515 #address-cells = <1>;
518 i2c_sfp17: i2c_sfp17 {
520 #address-cells = <1>;
523 i2c_sfp18: i2c_sfp18 {
525 #address-cells = <1>;
528 i2c_sfp19: i2c_sfp19 {
530 #address-cells = <1>;
533 i2c_sfp20: i2c_sfp20 {
535 #address-cells = <1>;
542 phy64: ethernet-phy@64 {
548 sfp_eth12: sfp-eth12 {
549 compatible = "sff,sfp";
550 i2c-bus = <&i2c_sfp1>;
551 tx-disable-gpios = <&sgpio_out2 11 1 GPIO_ACTIVE_LOW>;
552 los-gpios = <&sgpio_in2 11 1 GPIO_ACTIVE_HIGH>;
553 mod-def0-gpios = <&sgpio_in2 11 2 GPIO_ACTIVE_LOW>;
554 tx-fault-gpios = <&sgpio_in2 12 0 GPIO_ACTIVE_HIGH>;
556 sfp_eth13: sfp-eth13 {
557 compatible = "sff,sfp";
558 i2c-bus = <&i2c_sfp2>;
559 tx-disable-gpios = <&sgpio_out2 12 1 GPIO_ACTIVE_LOW>;
560 los-gpios = <&sgpio_in2 12 1 GPIO_ACTIVE_HIGH>;
561 mod-def0-gpios = <&sgpio_in2 12 2 GPIO_ACTIVE_LOW>;
562 tx-fault-gpios = <&sgpio_in2 13 0 GPIO_ACTIVE_HIGH>;
564 sfp_eth14: sfp-eth14 {
565 compatible = "sff,sfp";
566 i2c-bus = <&i2c_sfp3>;
567 tx-disable-gpios = <&sgpio_out2 13 1 GPIO_ACTIVE_LOW>;
568 los-gpios = <&sgpio_in2 13 1 GPIO_ACTIVE_HIGH>;
569 mod-def0-gpios = <&sgpio_in2 13 2 GPIO_ACTIVE_LOW>;
570 tx-fault-gpios = <&sgpio_in2 14 0 GPIO_ACTIVE_HIGH>;
572 sfp_eth15: sfp-eth15 {
573 compatible = "sff,sfp";
574 i2c-bus = <&i2c_sfp4>;
575 tx-disable-gpios = <&sgpio_out2 14 1 GPIO_ACTIVE_LOW>;
576 los-gpios = <&sgpio_in2 14 1 GPIO_ACTIVE_HIGH>;
577 mod-def0-gpios = <&sgpio_in2 14 2 GPIO_ACTIVE_LOW>;
578 tx-fault-gpios = <&sgpio_in2 15 0 GPIO_ACTIVE_HIGH>;
580 sfp_eth48: sfp-eth48 {
581 compatible = "sff,sfp";
582 i2c-bus = <&i2c_sfp5>;
583 tx-disable-gpios = <&sgpio_out2 15 1 GPIO_ACTIVE_LOW>;
584 los-gpios = <&sgpio_in2 15 1 GPIO_ACTIVE_HIGH>;
585 mod-def0-gpios = <&sgpio_in2 15 2 GPIO_ACTIVE_LOW>;
586 tx-fault-gpios = <&sgpio_in2 16 0 GPIO_ACTIVE_HIGH>;
588 sfp_eth49: sfp-eth49 {
589 compatible = "sff,sfp";
590 i2c-bus = <&i2c_sfp6>;
591 tx-disable-gpios = <&sgpio_out2 16 1 GPIO_ACTIVE_LOW>;
592 los-gpios = <&sgpio_in2 16 1 GPIO_ACTIVE_HIGH>;
593 mod-def0-gpios = <&sgpio_in2 16 2 GPIO_ACTIVE_LOW>;
594 tx-fault-gpios = <&sgpio_in2 17 0 GPIO_ACTIVE_HIGH>;
596 sfp_eth50: sfp-eth50 {
597 compatible = "sff,sfp";
598 i2c-bus = <&i2c_sfp7>;
599 tx-disable-gpios = <&sgpio_out2 17 1 GPIO_ACTIVE_LOW>;
600 los-gpios = <&sgpio_in2 17 1 GPIO_ACTIVE_HIGH>;
601 mod-def0-gpios = <&sgpio_in2 17 2 GPIO_ACTIVE_LOW>;
602 tx-fault-gpios = <&sgpio_in2 18 0 GPIO_ACTIVE_HIGH>;
604 sfp_eth51: sfp-eth51 {
605 compatible = "sff,sfp";
606 i2c-bus = <&i2c_sfp8>;
607 tx-disable-gpios = <&sgpio_out2 18 1 GPIO_ACTIVE_LOW>;
608 los-gpios = <&sgpio_in2 18 1 GPIO_ACTIVE_HIGH>;
609 mod-def0-gpios = <&sgpio_in2 18 2 GPIO_ACTIVE_LOW>;
610 tx-fault-gpios = <&sgpio_in2 19 0 GPIO_ACTIVE_HIGH>;
612 sfp_eth52: sfp-eth52 {
613 compatible = "sff,sfp";
614 i2c-bus = <&i2c_sfp9>;
615 tx-disable-gpios = <&sgpio_out2 19 1 GPIO_ACTIVE_LOW>;
616 los-gpios = <&sgpio_in2 19 1 GPIO_ACTIVE_HIGH>;
617 mod-def0-gpios = <&sgpio_in2 19 2 GPIO_ACTIVE_LOW>;
618 tx-fault-gpios = <&sgpio_in2 20 0 GPIO_ACTIVE_HIGH>;
620 sfp_eth53: sfp-eth53 {
621 compatible = "sff,sfp";
622 i2c-bus = <&i2c_sfp10>;
623 tx-disable-gpios = <&sgpio_out2 20 1 GPIO_ACTIVE_LOW>;
624 los-gpios = <&sgpio_in2 20 1 GPIO_ACTIVE_HIGH>;
625 mod-def0-gpios = <&sgpio_in2 20 2 GPIO_ACTIVE_LOW>;
626 tx-fault-gpios = <&sgpio_in2 21 0 GPIO_ACTIVE_HIGH>;
628 sfp_eth54: sfp-eth54 {
629 compatible = "sff,sfp";
630 i2c-bus = <&i2c_sfp11>;
631 tx-disable-gpios = <&sgpio_out2 21 1 GPIO_ACTIVE_LOW>;
632 los-gpios = <&sgpio_in2 21 1 GPIO_ACTIVE_HIGH>;
633 mod-def0-gpios = <&sgpio_in2 21 2 GPIO_ACTIVE_LOW>;
634 tx-fault-gpios = <&sgpio_in2 22 0 GPIO_ACTIVE_HIGH>;
636 sfp_eth55: sfp-eth55 {
637 compatible = "sff,sfp";
638 i2c-bus = <&i2c_sfp12>;
639 tx-disable-gpios = <&sgpio_out2 22 1 GPIO_ACTIVE_LOW>;
640 los-gpios = <&sgpio_in2 22 1 GPIO_ACTIVE_HIGH>;
641 mod-def0-gpios = <&sgpio_in2 22 2 GPIO_ACTIVE_LOW>;
642 tx-fault-gpios = <&sgpio_in2 23 0 GPIO_ACTIVE_HIGH>;
644 sfp_eth56: sfp-eth56 {
645 compatible = "sff,sfp";
646 i2c-bus = <&i2c_sfp13>;
647 tx-disable-gpios = <&sgpio_out2 23 1 GPIO_ACTIVE_LOW>;
648 los-gpios = <&sgpio_in2 23 1 GPIO_ACTIVE_HIGH>;
649 mod-def0-gpios = <&sgpio_in2 23 2 GPIO_ACTIVE_LOW>;
650 tx-fault-gpios = <&sgpio_in2 24 0 GPIO_ACTIVE_HIGH>;
652 sfp_eth57: sfp-eth57 {
653 compatible = "sff,sfp";
654 i2c-bus = <&i2c_sfp14>;
655 tx-disable-gpios = <&sgpio_out2 24 1 GPIO_ACTIVE_LOW>;
656 los-gpios = <&sgpio_in2 24 1 GPIO_ACTIVE_HIGH>;
657 mod-def0-gpios = <&sgpio_in2 24 2 GPIO_ACTIVE_LOW>;
658 tx-fault-gpios = <&sgpio_in2 25 0 GPIO_ACTIVE_HIGH>;
660 sfp_eth58: sfp-eth58 {
661 compatible = "sff,sfp";
662 i2c-bus = <&i2c_sfp15>;
663 tx-disable-gpios = <&sgpio_out2 25 1 GPIO_ACTIVE_LOW>;
664 los-gpios = <&sgpio_in2 25 1 GPIO_ACTIVE_HIGH>;
665 mod-def0-gpios = <&sgpio_in2 25 2 GPIO_ACTIVE_LOW>;
666 tx-fault-gpios = <&sgpio_in2 26 0 GPIO_ACTIVE_HIGH>;
668 sfp_eth59: sfp-eth59 {
669 compatible = "sff,sfp";
670 i2c-bus = <&i2c_sfp16>;
671 tx-disable-gpios = <&sgpio_out2 26 1 GPIO_ACTIVE_LOW>;
672 los-gpios = <&sgpio_in2 26 1 GPIO_ACTIVE_HIGH>;
673 mod-def0-gpios = <&sgpio_in2 26 2 GPIO_ACTIVE_LOW>;
674 tx-fault-gpios = <&sgpio_in2 27 0 GPIO_ACTIVE_HIGH>;
676 sfp_eth60: sfp-eth60 {
677 compatible = "sff,sfp";
678 i2c-bus = <&i2c_sfp17>;
679 tx-disable-gpios = <&sgpio_out2 27 1 GPIO_ACTIVE_LOW>;
680 los-gpios = <&sgpio_in2 27 1 GPIO_ACTIVE_HIGH>;
681 mod-def0-gpios = <&sgpio_in2 27 2 GPIO_ACTIVE_LOW>;
682 tx-fault-gpios = <&sgpio_in2 28 0 GPIO_ACTIVE_HIGH>;
684 sfp_eth61: sfp-eth61 {
685 compatible = "sff,sfp";
686 i2c-bus = <&i2c_sfp18>;
687 tx-disable-gpios = <&sgpio_out2 28 1 GPIO_ACTIVE_LOW>;
688 los-gpios = <&sgpio_in2 28 1 GPIO_ACTIVE_HIGH>;
689 mod-def0-gpios = <&sgpio_in2 28 2 GPIO_ACTIVE_LOW>;
690 tx-fault-gpios = <&sgpio_in2 29 0 GPIO_ACTIVE_HIGH>;
692 sfp_eth62: sfp-eth62 {
693 compatible = "sff,sfp";
694 i2c-bus = <&i2c_sfp19>;
695 tx-disable-gpios = <&sgpio_out2 29 1 GPIO_ACTIVE_LOW>;
696 los-gpios = <&sgpio_in2 29 1 GPIO_ACTIVE_HIGH>;
697 mod-def0-gpios = <&sgpio_in2 29 2 GPIO_ACTIVE_LOW>;
698 tx-fault-gpios = <&sgpio_in2 30 0 GPIO_ACTIVE_HIGH>;
700 sfp_eth63: sfp-eth63 {
701 compatible = "sff,sfp";
702 i2c-bus = <&i2c_sfp20>;
703 tx-disable-gpios = <&sgpio_out2 30 1 GPIO_ACTIVE_LOW>;
704 los-gpios = <&sgpio_in2 30 1 GPIO_ACTIVE_HIGH>;
705 mod-def0-gpios = <&sgpio_in2 30 2 GPIO_ACTIVE_LOW>;
706 tx-fault-gpios = <&sgpio_in2 31 0 GPIO_ACTIVE_HIGH>;
712 #address-cells = <1>;
718 microchip,bandwidth = <10000>;
720 phy-mode = "10gbase-r";
722 microchip,sd-sgpio = <301>;
723 managed = "in-band-status";
727 /* Example: CU SFP, 1G speed */
728 microchip,bandwidth = <10000>;
730 phy-mode = "10gbase-r";
732 microchip,sd-sgpio = <305>;
733 managed = "in-band-status";
737 microchip,bandwidth = <10000>;
739 phy-mode = "10gbase-r";
741 microchip,sd-sgpio = <309>;
742 managed = "in-band-status";
746 microchip,bandwidth = <10000>;
748 phy-mode = "10gbase-r";
750 microchip,sd-sgpio = <313>;
751 managed = "in-band-status";
755 microchip,bandwidth = <10000>;
757 phy-mode = "10gbase-r";
759 microchip,sd-sgpio = <317>;
760 managed = "in-band-status";
764 microchip,bandwidth = <10000>;
766 phy-mode = "10gbase-r";
768 microchip,sd-sgpio = <321>;
769 managed = "in-band-status";
773 microchip,bandwidth = <10000>;
775 phy-mode = "10gbase-r";
777 microchip,sd-sgpio = <325>;
778 managed = "in-band-status";
782 microchip,bandwidth = <10000>;
784 phy-mode = "10gbase-r";
786 microchip,sd-sgpio = <329>;
787 managed = "in-band-status";
791 microchip,bandwidth = <10000>;
793 phy-mode = "10gbase-r";
795 microchip,sd-sgpio = <333>;
796 managed = "in-band-status";
800 microchip,bandwidth = <10000>;
802 phy-mode = "10gbase-r";
804 microchip,sd-sgpio = <337>;
805 managed = "in-band-status";
809 microchip,bandwidth = <10000>;
811 phy-mode = "10gbase-r";
813 microchip,sd-sgpio = <341>;
814 managed = "in-band-status";
818 microchip,bandwidth = <10000>;
820 phy-mode = "10gbase-r";
822 microchip,sd-sgpio = <345>;
823 managed = "in-band-status";
828 microchip,bandwidth = <10000>;
830 phy-mode = "10gbase-r";
832 microchip,sd-sgpio = <349>;
833 managed = "in-band-status";
837 microchip,bandwidth = <10000>;
839 phy-mode = "10gbase-r";
841 microchip,sd-sgpio = <353>;
842 managed = "in-band-status";
846 microchip,bandwidth = <10000>;
848 phy-mode = "10gbase-r";
850 microchip,sd-sgpio = <357>;
851 managed = "in-band-status";
855 microchip,bandwidth = <10000>;
857 phy-mode = "10gbase-r";
859 microchip,sd-sgpio = <361>;
860 managed = "in-band-status";
864 microchip,bandwidth = <10000>;
866 phy-mode = "10gbase-r";
868 microchip,sd-sgpio = <365>;
869 managed = "in-band-status";
873 microchip,bandwidth = <10000>;
875 phy-mode = "10gbase-r";
877 microchip,sd-sgpio = <369>;
878 managed = "in-band-status";
882 microchip,bandwidth = <10000>;
884 phy-mode = "10gbase-r";
886 microchip,sd-sgpio = <373>;
887 managed = "in-band-status";
891 microchip,bandwidth = <10000>;
893 phy-mode = "10gbase-r";
895 microchip,sd-sgpio = <377>;
896 managed = "in-band-status";
898 /* Finally the Management interface */
901 microchip,bandwidth = <1000>;
903 phy-handle = <&phy64>;