1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2021 MediaTek Inc.
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
31 pwms = <&disp_pwm0 0 500000>;
32 power-supply = <&ppvar_sys>;
36 stdout-path = "serial0:115200n8";
40 compatible = "dmic-codec";
42 wakeup-delay-ms = <50>;
46 device_type = "memory";
47 reg = <0 0x40000000 0 0x80000000>;
50 pp3300_disp_x: regulator-pp3300-disp-x {
51 compatible = "regulator-fixed";
52 regulator-name = "pp3300_disp_x";
53 regulator-min-microvolt = <3300000>;
54 regulator-max-microvolt = <3300000>;
55 regulator-enable-ramp-delay = <2500>;
57 gpio = <&pio 55 GPIO_ACTIVE_HIGH>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&panel_fixed_pins>;
60 vin-supply = <&pp3300_z2>;
63 /* system wide LDO 3.3V power rail */
64 pp3300_z5: regulator-pp3300-ldo-z5 {
65 compatible = "regulator-fixed";
66 regulator-name = "pp3300_ldo_z5";
69 regulator-min-microvolt = <3300000>;
70 regulator-max-microvolt = <3300000>;
71 vin-supply = <&ppvar_sys>;
74 /* separately switched 3.3V power rail */
75 pp3300_s3: regulator-pp3300-s3 {
76 compatible = "regulator-fixed";
77 regulator-name = "pp3300_s3";
78 /* automatically sequenced by PMIC EXT_PMIC_EN2 */
81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <3300000>;
83 vin-supply = <&pp3300_z2>;
86 /* system wide 3.3V power rail */
87 pp3300_z2: regulator-pp3300-z2 {
88 compatible = "regulator-fixed";
89 regulator-name = "pp3300_z2";
90 /* EN pin tied to pp4200_z2, which is controlled by EC */
93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <3300000>;
95 vin-supply = <&ppvar_sys>;
98 /* system wide 4.2V power rail */
99 pp4200_z2: regulator-pp4200-z2 {
100 compatible = "regulator-fixed";
101 regulator-name = "pp4200_z2";
102 /* controlled by EC */
105 regulator-min-microvolt = <4200000>;
106 regulator-max-microvolt = <4200000>;
107 vin-supply = <&ppvar_sys>;
110 /* system wide switching 5.0V power rail */
111 pp5000_s5: regulator-pp5000-s5 {
112 compatible = "regulator-fixed";
113 regulator-name = "pp5000_s5";
114 /* controlled by EC */
117 regulator-min-microvolt = <5000000>;
118 regulator-max-microvolt = <5000000>;
119 vin-supply = <&ppvar_sys>;
122 /* system wide semi-regulated power rail from battery or USB */
123 ppvar_sys: regulator-ppvar-sys {
124 compatible = "regulator-fixed";
125 regulator-name = "ppvar_sys";
130 usb_vbus: regulator-5v0-usb-vbus {
131 compatible = "regulator-fixed";
132 regulator-name = "usb-vbus";
133 regulator-min-microvolt = <5000000>;
134 regulator-max-microvolt = <5000000>;
139 reserved_memory: reserved-memory {
140 #address-cells = <2>;
144 scp_mem: memory@50000000 {
145 compatible = "shared-dma-pool";
146 reg = <0 0x50000000 0 0x2900000>;
150 adsp_mem: memory@60000000 {
151 compatible = "shared-dma-pool";
152 reg = <0 0x60000000 0 0xd80000>;
156 afe_mem: memory@60d80000 {
157 compatible = "shared-dma-pool";
158 reg = <0 0x60d80000 0 0x100000>;
162 adsp_device_mem: memory@60e80000 {
163 compatible = "shared-dma-pool";
164 reg = <0 0x60e80000 0 0x280000>;
169 spk_amplifier: rt1019p {
170 compatible = "realtek,rt1019p";
172 pinctrl-names = "default";
173 pinctrl-0 = <&rt1019p_pins_default>;
174 sdb-gpios = <&pio 100 GPIO_ACTIVE_HIGH>;
181 memory-region = <&adsp_device_mem>, <&adsp_mem>;
187 mediatek,etdm-in2-cowork-source = <2>;
188 mediatek,etdm-out2-cowork-source = <0>;
189 memory-region = <&afe_mem>;
196 dp_intf0_out: endpoint {
197 remote-endpoint = <&edp_in>;
206 dp_intf1_out: endpoint {
207 remote-endpoint = <&dptx_in>;
215 pinctrl-names = "default";
216 pinctrl-0 = <&edptx_pins_default>;
219 #address-cells = <1>;
225 remote-endpoint = <&dp_intf0_out>;
232 data-lanes = <0 1 2 3>;
233 remote-endpoint = <&panel_in>;
240 compatible = "edp-panel";
241 power-supply = <&pp3300_disp_x>;
242 backlight = <&backlight_lcd0>;
245 remote-endpoint = <&edp_out>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&disp_pwm0_pin_default>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&dptx_pin>;
266 #address-cells = <1>;
272 remote-endpoint = <&dp_intf1_out>;
279 data-lanes = <0 1 2 3>;
286 mediatek,broken-save-restore-fw;
291 mali-supply = <&mt6315_7_vbuck1>;
297 clock-frequency = <400000>;
298 pinctrl-names = "default";
299 pinctrl-0 = <&i2c0_pins>;
305 clock-frequency = <400000>;
306 i2c-scl-internal-delay-ns = <12500>;
307 pinctrl-names = "default";
308 pinctrl-0 = <&i2c1_pins>;
311 compatible = "elan,ekth3000";
313 interrupts-extended = <&pio 6 IRQ_TYPE_LEVEL_LOW>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&trackpad_pins>;
316 vcc-supply = <&pp3300_s3>;
324 clock-frequency = <400000>;
325 pinctrl-names = "default";
326 pinctrl-0 = <&i2c2_pins>;
328 audio_codec: codec@1a {
329 /* Realtek RT5682i or RT5682s, sharing the same configuration */
331 interrupts-extended = <&pio 89 IRQ_TYPE_EDGE_BOTH>;
332 realtek,jd-src = <1>;
334 AVDD-supply = <&mt6359_vio18_ldo_reg>;
335 MICVDD-supply = <&pp3300_z2>;
336 VBAT-supply = <&pp3300_z5>;
343 clock-frequency = <400000>;
344 pinctrl-names = "default";
345 pinctrl-0 = <&i2c3_pins>;
348 compatible = "google,cr50";
350 interrupts-extended = <&pio 88 IRQ_TYPE_EDGE_FALLING>;
351 pinctrl-names = "default";
352 pinctrl-0 = <&cr50_int>;
359 clock-frequency = <400000>;
360 pinctrl-names = "default";
361 pinctrl-0 = <&i2c4_pins>;
363 ts_10: touchscreen@10 {
364 compatible = "hid-over-i2c";
366 hid-descr-addr = <0x0001>;
367 interrupts-extended = <&pio 92 IRQ_TYPE_LEVEL_LOW>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&touchscreen_pins>;
370 post-power-on-delay-ms = <10>;
371 vdd-supply = <&pp3300_s3>;
379 clock-frequency = <400000>;
380 pinctrl-names = "default";
381 pinctrl-0 = <&i2c5_pins>;
387 clock-frequency = <400000>;
388 pinctrl-names = "default";
389 pinctrl-0 = <&i2c7_pins>;
392 #interrupt-cells = <2>;
393 compatible = "mediatek,mt6360";
395 interrupt-controller;
396 interrupts-extended = <&pio 130 IRQ_TYPE_EDGE_FALLING>;
397 interrupt-names = "IRQB";
398 pinctrl-names = "default";
399 pinctrl-0 = <&subpmic_default>;
410 hs400-ds-delay = <0x14c11>;
411 max-frequency = <200000000>;
417 pinctrl-names = "default", "state_uhs";
418 pinctrl-0 = <&mmc0_pins_default>;
419 pinctrl-1 = <&mmc0_pins_uhs>;
420 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
421 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
429 cd-gpios = <&pio 54 GPIO_ACTIVE_LOW>;
430 max-frequency = <200000000>;
433 pinctrl-names = "default", "state_uhs";
434 pinctrl-0 = <&mmc1_pins_default>, <&mmc1_pins_detect>;
435 pinctrl-1 = <&mmc1_pins_default>;
438 vmmc-supply = <&mt_pmic_vmch_ldo_reg>;
439 vqmmc-supply = <&mt_pmic_vmc_ldo_reg>;
443 mediatek,dmic-mode = <1>; /* one-wire */
444 mediatek,mic-type-0 = <2>; /* DMIC */
448 &mt6359_vcore_buck_reg {
453 &mt6359_vgpu11_buck_reg {
457 &mt6359_vgpu11_sshub_buck_reg {
459 regulator-min-microvolt = <550000>;
460 regulator-max-microvolt = <550000>;
464 &mt6359_vpu_buck_reg {
468 &mt6359_vrf12_ldo_reg {
473 &mt6359_vsram_others_ldo_reg {
475 regulator-min-microvolt = <750000>;
476 regulator-max-microvolt = <750000>;
479 &mt6359_vufs_ldo_reg {
486 pinctrl-names = "default";
487 pinctrl-0 = <&nor_pins_default>;
490 compatible = "jedec,spi-nor";
492 spi-max-frequency = <52000000>;
493 spi-rx-bus-width = <2>;
494 spi-tx-bus-width = <2>;
501 pinctrl-names = "default";
502 pinctrl-0 = <&pcie1_pins_default>;
506 mediatek,rsel-resistance-in-si-unit;
507 pinctrl-names = "default";
508 pinctrl-0 = <&pio_default>;
518 * AP_FLASH_WP_L is crossystem ABI. Schematics
519 * call it AP_FLASH_WP_ODL.
526 "AP_I2C_TCHPAD_SDA_1V8",
527 "AP_I2C_TCHPAD_SCL_1V8",
530 "AP_I2C_TPM_SDA_1V8",
531 "AP_I2C_TPM_SCL_1V8",
532 "AP_I2C_TCHSCR_SDA_1V8",
533 "AP_I2C_TCHSCR_SCL_1V8",
537 "PCIE_NVME_CLKREQ_ODL",
539 "PCIE_CLKREQ_1V8_ODL",
543 "AP_I2C_PWR_SCL_1V8",
544 "AP_I2C_PWR_SDA_1V8",
573 "TCHSCR_REPORT_DISABLE",
579 "SCP_I2C_SENSOR_SCL_1V8",
580 "SCP_I2C_SENSOR_SDA_1V8",
593 "AP_SPI_GSC_TPM_CLK",
594 "AP_SPI_GSC_TPM_MOSI",
595 "AP_SPI_GSC_TPM_CS_L",
596 "AP_SPI_GSC_TPM_MISO",
617 "AP_EC_WARM_RST_REQ",
618 "UART_SCP_TX_DBGCON_RX",
619 "UART_DBGCON_TX_SCP_RX",
625 "MT6315_PROC_BC_INT",
661 aud_pins_default: audio-default-pins {
663 pinmux = <PINMUX_GPIO69__FUNC_AUD_CLK_MOSI>,
664 <PINMUX_GPIO70__FUNC_AUD_SYNC_MOSI>,
665 <PINMUX_GPIO71__FUNC_AUD_DAT_MOSI0>,
666 <PINMUX_GPIO72__FUNC_AUD_DAT_MOSI1>,
667 <PINMUX_GPIO73__FUNC_AUD_DAT_MISO0>,
668 <PINMUX_GPIO74__FUNC_AUD_DAT_MISO1>,
669 <PINMUX_GPIO75__FUNC_AUD_DAT_MISO2>,
670 <PINMUX_GPIO0__FUNC_TDMIN_MCK>,
671 <PINMUX_GPIO1__FUNC_TDMIN_DI>,
672 <PINMUX_GPIO2__FUNC_TDMIN_LRCK>,
673 <PINMUX_GPIO3__FUNC_TDMIN_BCK>,
674 <PINMUX_GPIO60__FUNC_I2SO2_D0>,
675 <PINMUX_GPIO49__FUNC_I2SIN_D0>,
676 <PINMUX_GPIO50__FUNC_I2SO1_MCK>,
677 <PINMUX_GPIO51__FUNC_I2SO1_BCK>,
678 <PINMUX_GPIO52__FUNC_I2SO1_WS>,
679 <PINMUX_GPIO53__FUNC_I2SO1_D0>;
682 pins-hp-jack-int-odl {
683 pinmux = <PINMUX_GPIO89__FUNC_GPIO89>;
685 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
689 cr50_int: cr50-irq-default-pins {
690 pins-gsc-ap-int-odl {
691 pinmux = <PINMUX_GPIO88__FUNC_GPIO88>;
696 cros_ec_int: cros-ec-irq-default-pins {
698 pinmux = <PINMUX_GPIO4__FUNC_GPIO4>;
699 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
704 edptx_pins_default: edptx-default-pins {
706 pinmux = <PINMUX_GPIO7__FUNC_EDP_TX_HPD>;
711 disp_pwm0_pin_default: disp-pwm0-default-pins {
713 pinmux = <PINMUX_GPIO82__FUNC_GPIO82>,
714 <PINMUX_GPIO97__FUNC_DISP_PWM0>;
718 dptx_pin: dptx-default-pins {
720 pinmux = <PINMUX_GPIO18__FUNC_DP_TX_HPD>;
725 i2c0_pins: i2c0-default-pins {
727 pinmux = <PINMUX_GPIO8__FUNC_SDA0>,
728 <PINMUX_GPIO9__FUNC_SCL0>;
730 drive-strength-microamp = <1000>;
734 i2c1_pins: i2c1-default-pins {
736 pinmux = <PINMUX_GPIO10__FUNC_SDA1>,
737 <PINMUX_GPIO11__FUNC_SCL1>;
738 bias-pull-up = <1000>;
739 drive-strength-microamp = <1000>;
743 i2c2_pins: i2c2-default-pins {
745 pinmux = <PINMUX_GPIO12__FUNC_SDA2>,
746 <PINMUX_GPIO13__FUNC_SCL2>;
748 drive-strength-microamp = <1000>;
752 i2c3_pins: i2c3-default-pins {
754 pinmux = <PINMUX_GPIO14__FUNC_SDA3>,
755 <PINMUX_GPIO15__FUNC_SCL3>;
756 bias-pull-up = <1000>;
757 drive-strength-microamp = <1000>;
761 i2c4_pins: i2c4-default-pins {
763 pinmux = <PINMUX_GPIO16__FUNC_SDA4>,
764 <PINMUX_GPIO17__FUNC_SCL4>;
765 bias-pull-up = <1000>;
766 drive-strength = <4>;
770 i2c5_pins: i2c5-default-pins {
772 pinmux = <PINMUX_GPIO29__FUNC_SCL5>,
773 <PINMUX_GPIO30__FUNC_SDA5>;
775 drive-strength-microamp = <1000>;
779 i2c7_pins: i2c7-default-pins {
781 pinmux = <PINMUX_GPIO27__FUNC_SCL7>,
782 <PINMUX_GPIO28__FUNC_SDA7>;
787 mmc0_pins_default: mmc0-default-pins {
789 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
790 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
791 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
792 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
793 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
794 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
795 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
796 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
797 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
799 drive-strength = <6>;
800 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
804 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
805 drive-strength = <6>;
806 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
810 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
811 drive-strength = <6>;
812 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
816 mmc0_pins_uhs: mmc0-uhs-pins {
818 pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
819 <PINMUX_GPIO125__FUNC_MSDC0_DAT1>,
820 <PINMUX_GPIO124__FUNC_MSDC0_DAT2>,
821 <PINMUX_GPIO123__FUNC_MSDC0_DAT3>,
822 <PINMUX_GPIO119__FUNC_MSDC0_DAT4>,
823 <PINMUX_GPIO118__FUNC_MSDC0_DAT5>,
824 <PINMUX_GPIO117__FUNC_MSDC0_DAT6>,
825 <PINMUX_GPIO116__FUNC_MSDC0_DAT7>,
826 <PINMUX_GPIO121__FUNC_MSDC0_CMD>;
828 drive-strength = <8>;
829 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
833 pinmux = <PINMUX_GPIO122__FUNC_MSDC0_CLK>;
834 drive-strength = <8>;
835 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
839 pinmux = <PINMUX_GPIO127__FUNC_MSDC0_DSL>;
840 drive-strength = <8>;
841 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
845 pinmux = <PINMUX_GPIO120__FUNC_MSDC0_RSTB>;
846 drive-strength = <8>;
847 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
851 mmc1_pins_detect: mmc1-detect-pins {
853 pinmux = <PINMUX_GPIO54__FUNC_GPIO54>;
858 mmc1_pins_default: mmc1-default-pins {
860 pinmux = <PINMUX_GPIO110__FUNC_MSDC1_CMD>,
861 <PINMUX_GPIO112__FUNC_MSDC1_DAT0>,
862 <PINMUX_GPIO113__FUNC_MSDC1_DAT1>,
863 <PINMUX_GPIO114__FUNC_MSDC1_DAT2>,
864 <PINMUX_GPIO115__FUNC_MSDC1_DAT3>;
866 drive-strength = <8>;
867 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
871 pinmux = <PINMUX_GPIO111__FUNC_MSDC1_CLK>;
872 drive-strength = <8>;
873 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
877 nor_pins_default: nor-default-pins {
879 pinmux = <PINMUX_GPIO142__FUNC_SPINOR_IO0>,
880 <PINMUX_GPIO141__FUNC_SPINOR_CK>,
881 <PINMUX_GPIO143__FUNC_SPINOR_IO1>;
882 drive-strength = <6>;
887 pinmux = <PINMUX_GPIO140__FUNC_SPINOR_CS>;
888 drive-strength = <6>;
893 pcie0_pins_default: pcie0-default-pins {
895 pinmux = <PINMUX_GPIO19__FUNC_WAKEN>,
896 <PINMUX_GPIO20__FUNC_PERSTN>,
897 <PINMUX_GPIO21__FUNC_CLKREQN>;
902 pcie1_pins_default: pcie1-default-pins {
904 pinmux = <PINMUX_GPIO22__FUNC_PERSTN_1>,
905 <PINMUX_GPIO23__FUNC_CLKREQN_1>,
906 <PINMUX_GPIO24__FUNC_WAKEN_1>;
911 panel_fixed_pins: panel-pwr-default-pins {
913 pinmux = <PINMUX_GPIO55__FUNC_GPIO55>;
917 pio_default: pio-default-pins {
919 pinmux = <PINMUX_GPIO58__FUNC_GPIO58>;
921 drive-strength = <14>;
925 pinmux = <PINMUX_GPIO25__FUNC_GPIO25>,
926 <PINMUX_GPIO26__FUNC_GPIO26>,
927 <PINMUX_GPIO46__FUNC_GPIO46>,
928 <PINMUX_GPIO47__FUNC_GPIO47>,
929 <PINMUX_GPIO48__FUNC_GPIO48>,
930 <PINMUX_GPIO65__FUNC_GPIO65>,
931 <PINMUX_GPIO66__FUNC_GPIO66>,
932 <PINMUX_GPIO67__FUNC_GPIO67>,
933 <PINMUX_GPIO68__FUNC_GPIO68>,
934 <PINMUX_GPIO128__FUNC_GPIO128>,
935 <PINMUX_GPIO129__FUNC_GPIO129>;
940 pins-low-power-pupd {
941 pinmux = <PINMUX_GPIO77__FUNC_GPIO77>,
942 <PINMUX_GPIO78__FUNC_GPIO78>,
943 <PINMUX_GPIO79__FUNC_GPIO79>,
944 <PINMUX_GPIO80__FUNC_GPIO80>,
945 <PINMUX_GPIO83__FUNC_GPIO83>,
946 <PINMUX_GPIO85__FUNC_GPIO85>,
947 <PINMUX_GPIO90__FUNC_GPIO90>,
948 <PINMUX_GPIO91__FUNC_GPIO91>,
949 <PINMUX_GPIO93__FUNC_GPIO93>,
950 <PINMUX_GPIO94__FUNC_GPIO94>,
951 <PINMUX_GPIO95__FUNC_GPIO95>,
952 <PINMUX_GPIO96__FUNC_GPIO96>,
953 <PINMUX_GPIO104__FUNC_GPIO104>,
954 <PINMUX_GPIO105__FUNC_GPIO105>,
955 <PINMUX_GPIO107__FUNC_GPIO107>;
957 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
961 rt1019p_pins_default: rt1019p-default-pins {
963 pinmux = <PINMUX_GPIO100__FUNC_GPIO100>;
968 scp_pins: scp-default-pins {
970 pinmux = <PINMUX_GPIO76__FUNC_SCP_VREQ_VAO>;
976 spi0_pins: spi0-default-pins {
978 pinmux = <PINMUX_GPIO132__FUNC_SPIM0_CSB>,
979 <PINMUX_GPIO134__FUNC_SPIM0_MO>,
980 <PINMUX_GPIO133__FUNC_SPIM0_CLK>;
985 pinmux = <PINMUX_GPIO135__FUNC_SPIM0_MI>;
990 subpmic_default: subpmic-default-pins {
991 subpmic_pin_irq: pins-subpmic-int-n {
992 pinmux = <PINMUX_GPIO130__FUNC_GPIO130>;
998 trackpad_pins: trackpad-default-pins {
1000 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
1006 touchscreen_pins: touchscreen-default-pins {
1008 pinmux = <PINMUX_GPIO92__FUNC_GPIO92>;
1010 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1013 pinmux = <PINMUX_GPIO56__FUNC_GPIO56>;
1017 pinmux = <PINMUX_GPIO57__FUNC_GPIO57>;
1024 interrupts-extended = <&pio 222 IRQ_TYPE_LEVEL_HIGH>;
1030 firmware-name = "/*(DEBLOBBED)*/";
1031 memory-region = <&scp_mem>;
1032 pinctrl-names = "default";
1033 pinctrl-0 = <&scp_pins>;
1036 compatible = "google,cros-ec-rpmsg";
1037 mediatek,rpmsg-name = "cros-ec-rpmsg";
1044 mediatek,adsp = <&adsp>;
1046 "DL10_FE", "DPTX_BE", "ETDM1_IN_BE", "ETDM2_IN_BE",
1047 "ETDM1_OUT_BE", "ETDM2_OUT_BE","UL_SRC1_BE",
1048 "AFE_SOF_DL2", "AFE_SOF_DL3", "AFE_SOF_UL4", "AFE_SOF_UL5";
1049 pinctrl-names = "default";
1050 pinctrl-0 = <&aud_pins_default>;
1056 pinctrl-names = "default";
1057 pinctrl-0 = <&spi0_pins>;
1058 mediatek,pad-select = <0>;
1061 #address-cells = <1>;
1064 compatible = "google,cros-ec-spi";
1066 interrupts-extended = <&pio 4 IRQ_TYPE_LEVEL_LOW>;
1067 pinctrl-names = "default";
1068 pinctrl-0 = <&cros_ec_int>;
1069 spi-max-frequency = <3000000>;
1071 keyboard-backlight {
1072 compatible = "google,cros-kbd-led-backlight";
1075 i2c_tunnel: i2c-tunnel {
1076 compatible = "google,cros-ec-i2c-tunnel";
1077 google,remote-bus = <0>;
1078 #address-cells = <1>;
1082 mt_pmic_vmc_ldo_reg: regulator@0 {
1083 compatible = "google,cros-ec-regulator";
1085 regulator-name = "mt_pmic_vmc_ldo";
1086 regulator-min-microvolt = <1200000>;
1087 regulator-max-microvolt = <3600000>;
1090 mt_pmic_vmch_ldo_reg: regulator@1 {
1091 compatible = "google,cros-ec-regulator";
1093 regulator-name = "mt_pmic_vmch_ldo";
1094 regulator-min-microvolt = <2700000>;
1095 regulator-max-microvolt = <3600000>;
1099 compatible = "google,cros-ec-typec";
1100 #address-cells = <1>;
1103 usb_c0: connector@0 {
1104 compatible = "usb-c-connector";
1106 power-role = "dual";
1108 try-power-role = "source";
1111 usb_c1: connector@1 {
1112 compatible = "usb-c-connector";
1114 power-role = "dual";
1116 try-power-role = "source";
1123 #address-cells = <2>;
1127 compatible = "mediatek,mt6315-regulator";
1128 reg = <0x6 SPMI_USID>;
1131 mt6315_6_vbuck1: vbuck1 {
1132 regulator-compatible = "vbuck1";
1133 regulator-name = "Vbcpu";
1134 regulator-min-microvolt = <300000>;
1135 regulator-max-microvolt = <1193750>;
1136 regulator-enable-ramp-delay = <256>;
1137 regulator-ramp-delay = <6250>;
1138 regulator-allowed-modes = <0 1 2>;
1139 regulator-always-on;
1145 compatible = "mediatek,mt6315-regulator";
1146 reg = <0x7 SPMI_USID>;
1149 mt6315_7_vbuck1: vbuck1 {
1150 regulator-compatible = "vbuck1";
1151 regulator-name = "Vgpu";
1152 regulator-min-microvolt = <625000>;
1153 regulator-max-microvolt = <1193750>;
1154 regulator-enable-ramp-delay = <256>;
1155 regulator-ramp-delay = <6250>;
1156 regulator-allowed-modes = <0 1 2>;
1157 regulator-always-on;
1186 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1187 vbus-supply = <&usb_vbus>;
1193 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1194 vbus-supply = <&usb_vbus>;
1200 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1201 vbus-supply = <&usb_vbus>;
1207 /* MT7921's USB Bluetooth has issues with USB2 LPM */
1209 vusb33-supply = <&mt6359_vusb_ldo_reg>;
1210 vbus-supply = <&usb_vbus>;
1213 #include <arm/cros-ec-keyboard.dtsi>
1214 #include <arm/cros-ec-sbs.dtsi>
1216 &keyboard_controller {
1217 function-row-physmap = <
1218 MATRIX_KEY(0x00, 0x02, 0) /* T1 */
1219 MATRIX_KEY(0x03, 0x02, 0) /* T2 */
1220 MATRIX_KEY(0x02, 0x02, 0) /* T3 */
1221 MATRIX_KEY(0x01, 0x02, 0) /* T4 */
1222 MATRIX_KEY(0x03, 0x04, 0) /* T5 */
1223 MATRIX_KEY(0x02, 0x04, 0) /* T6 */
1224 MATRIX_KEY(0x01, 0x04, 0) /* T7 */
1225 MATRIX_KEY(0x02, 0x09, 0) /* T8 */
1226 MATRIX_KEY(0x01, 0x09, 0) /* T9 */
1227 MATRIX_KEY(0x00, 0x04, 0) /* T10 */
1231 MATRIX_KEY(0x00, 0x02, KEY_BACK)
1232 MATRIX_KEY(0x03, 0x02, KEY_REFRESH)
1233 MATRIX_KEY(0x02, 0x02, KEY_ZOOM)
1234 MATRIX_KEY(0x01, 0x02, KEY_SCALE)
1235 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ)
1236 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN)
1237 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP)
1238 MATRIX_KEY(0x02, 0x09, KEY_MUTE)
1239 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN)
1240 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP)
1242 CROS_STD_MAIN_KEYMAP