1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2020 MediaTek Inc.
4 * Author: Seiya Wang <seiya.wang@mediatek.com>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
29 device_type = "memory";
30 reg = <0 0x40000000 0 0x80000000>;
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
35 pwms = <&pwm0 0 500000>;
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
39 num-interpolated-steps = <1023>;
40 default-brightness-level = <576>;
43 dmic_codec: dmic-codec {
44 compatible = "dmic-codec";
46 wakeup-delay-ms = <50>;
49 pp1000_dpbrdg: regulator-1v0-dpbrdg {
50 compatible = "regulator-fixed";
51 regulator-name = "pp1000_dpbrdg";
52 pinctrl-names = "default";
53 pinctrl-0 = <&pp1000_dpbrdg_en_pins>;
54 regulator-min-microvolt = <1000000>;
55 regulator-max-microvolt = <1000000>;
58 gpio = <&pio 19 GPIO_ACTIVE_HIGH>;
59 vin-supply = <&mt6359_vs2_buck_reg>;
62 pp1000_mipibrdg: regulator-1v0-mipibrdg {
63 compatible = "regulator-fixed";
64 regulator-name = "pp1000_mipibrdg";
65 pinctrl-names = "default";
66 pinctrl-0 = <&pp1000_mipibrdg_en_pins>;
67 regulator-min-microvolt = <1000000>;
68 regulator-max-microvolt = <1000000>;
71 gpio = <&pio 129 GPIO_ACTIVE_HIGH>;
72 vin-supply = <&mt6359_vs2_buck_reg>;
75 pp1800_dpbrdg: regulator-1v8-dpbrdg {
76 compatible = "regulator-fixed";
77 regulator-name = "pp1800_dpbrdg";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pp1800_dpbrdg_en_pins>;
82 gpio = <&pio 126 GPIO_ACTIVE_HIGH>;
83 vin-supply = <&mt6359_vio18_ldo_reg>;
86 /* system wide LDO 1.8V power rail */
87 pp1800_ldo_g: regulator-1v8-g {
88 compatible = "regulator-fixed";
89 regulator-name = "pp1800_ldo_g";
92 regulator-min-microvolt = <1800000>;
93 regulator-max-microvolt = <1800000>;
94 vin-supply = <&pp3300_g>;
97 pp1800_mipibrdg: regulator-1v8-mipibrdg {
98 compatible = "regulator-fixed";
99 regulator-name = "pp1800_mipibrdg";
100 pinctrl-names = "default";
101 pinctrl-0 = <&pp1800_mipibrdg_en_pins>;
104 gpio = <&pio 128 GPIO_ACTIVE_HIGH>;
105 vin-supply = <&mt6359_vio18_ldo_reg>;
108 pp3300_dpbrdg: regulator-3v3-dpbrdg {
109 compatible = "regulator-fixed";
110 regulator-name = "pp3300_dpbrdg";
111 pinctrl-names = "default";
112 pinctrl-0 = <&pp3300_dpbrdg_en_pins>;
115 gpio = <&pio 26 GPIO_ACTIVE_HIGH>;
116 vin-supply = <&pp3300_g>;
119 /* system wide switching 3.3V power rail */
120 pp3300_g: regulator-3v3-g {
121 compatible = "regulator-fixed";
122 regulator-name = "pp3300_g";
125 regulator-min-microvolt = <3300000>;
126 regulator-max-microvolt = <3300000>;
127 vin-supply = <&ppvar_sys>;
130 /* system wide LDO 3.3V power rail */
131 pp3300_ldo_z: regulator-3v3-z {
132 compatible = "regulator-fixed";
133 regulator-name = "pp3300_ldo_z";
136 regulator-min-microvolt = <3300000>;
137 regulator-max-microvolt = <3300000>;
138 vin-supply = <&ppvar_sys>;
141 pp3300_mipibrdg: regulator-3v3-mipibrdg {
142 compatible = "regulator-fixed";
143 regulator-name = "pp3300_mipibrdg";
144 pinctrl-names = "default";
145 pinctrl-0 = <&pp3300_mipibrdg_en_pins>;
148 gpio = <&pio 127 GPIO_ACTIVE_HIGH>;
149 vin-supply = <&pp3300_g>;
152 /* separately switched 3.3V power rail */
153 pp3300_u: regulator-3v3-u {
154 compatible = "regulator-fixed";
155 regulator-name = "pp3300_u";
158 regulator-min-microvolt = <3300000>;
159 regulator-max-microvolt = <3300000>;
160 /* enable pin wired to GPIO controlled by EC */
161 vin-supply = <&pp3300_g>;
164 pp3300_wlan: regulator-3v3-wlan {
165 compatible = "regulator-fixed";
166 regulator-name = "pp3300_wlan";
169 regulator-min-microvolt = <3300000>;
170 regulator-max-microvolt = <3300000>;
171 pinctrl-names = "default";
172 pinctrl-0 = <&pp3300_wlan_pins>;
174 gpio = <&pio 143 GPIO_ACTIVE_HIGH>;
177 /* system wide switching 5.0V power rail */
178 pp5000_a: regulator-5v0-a {
179 compatible = "regulator-fixed";
180 regulator-name = "pp5000_a";
183 regulator-min-microvolt = <5000000>;
184 regulator-max-microvolt = <5000000>;
185 vin-supply = <&ppvar_sys>;
188 /* system wide semi-regulated power rail from battery or USB */
189 ppvar_sys: regulator-var-sys {
190 compatible = "regulator-fixed";
191 regulator-name = "ppvar_sys";
196 reserved_memory: reserved-memory {
197 #address-cells = <2>;
201 scp_mem_reserved: scp@50000000 {
202 compatible = "shared-dma-pool";
203 reg = <0 0x50000000 0 0x2900000>;
207 wifi_restricted_dma_region: wifi@c0000000 {
208 compatible = "restricted-dma-pool";
209 reg = <0 0xc0000000 0 0x4000000>;
213 rt1015p: audio-codec {
214 compatible = "realtek,rt1015p";
215 pinctrl-names = "default";
216 pinctrl-0 = <&rt1015p_pins>;
217 sdb-gpios = <&pio 147 GPIO_ACTIVE_HIGH>;
218 #sound-dai-cells = <0>;
222 mediatek,platform = <&afe>;
223 pinctrl-names = "aud_clk_mosi_off",
243 "aud_dat_mosi_ch34_off",
244 "aud_dat_mosi_ch34_on",
245 "aud_dat_miso_ch34_off",
246 "aud_dat_miso_ch34_on",
249 pinctrl-0 = <&aud_clk_mosi_off_pins>;
250 pinctrl-1 = <&aud_clk_mosi_on_pins>;
251 pinctrl-2 = <&aud_dat_mosi_off_pins>;
252 pinctrl-3 = <&aud_dat_mosi_on_pins>;
253 pinctrl-4 = <&aud_dat_miso_off_pins>;
254 pinctrl-5 = <&aud_dat_miso_on_pins>;
255 pinctrl-6 = <&vow_dat_miso_off_pins>;
256 pinctrl-7 = <&vow_dat_miso_on_pins>;
257 pinctrl-8 = <&vow_clk_miso_off_pins>;
258 pinctrl-9 = <&vow_clk_miso_on_pins>;
259 pinctrl-10 = <&aud_nle_mosi_off_pins>;
260 pinctrl-11 = <&aud_nle_mosi_on_pins>;
261 pinctrl-12 = <&aud_dat_miso2_off_pins>;
262 pinctrl-13 = <&aud_dat_miso2_on_pins>;
263 pinctrl-14 = <&aud_gpio_i2s3_off_pins>;
264 pinctrl-15 = <&aud_gpio_i2s3_on_pins>;
265 pinctrl-16 = <&aud_gpio_i2s8_off_pins>;
266 pinctrl-17 = <&aud_gpio_i2s8_on_pins>;
267 pinctrl-18 = <&aud_gpio_i2s9_off_pins>;
268 pinctrl-19 = <&aud_gpio_i2s9_on_pins>;
269 pinctrl-20 = <&aud_dat_mosi_ch34_off_pins>;
270 pinctrl-21 = <&aud_dat_mosi_ch34_on_pins>;
271 pinctrl-22 = <&aud_dat_miso_ch34_off_pins>;
272 pinctrl-23 = <&aud_dat_miso_ch34_on_pins>;
273 pinctrl-24 = <&aud_gpio_tdm_off_pins>;
274 pinctrl-25 = <&aud_gpio_tdm_on_pins>;
283 remote-endpoint = <&anx7625_in>;
287 mediatek,broken-save-restore-fw;
291 mali-supply = <&mt6315_7_vbuck1>;
298 clock-frequency = <400000>;
299 pinctrl-names = "default";
300 pinctrl-0 = <&i2c0_pins>;
302 touchscreen: touchscreen@10 {
304 interrupts-extended = <&pio 21 IRQ_TYPE_LEVEL_LOW>;
305 pinctrl-names = "default";
306 pinctrl-0 = <&touchscreen_pins>;
313 clock-frequency = <400000>;
314 pinctrl-names = "default";
315 pinctrl-0 = <&i2c1_pins>;
317 rt5682: audio-codec@1a {
318 /* Realtek RT5682i or RT5682s, sharing the same configuration */
320 interrupts-extended = <&pio 18 IRQ_TYPE_LEVEL_LOW>;
321 realtek,jd-src = <1>;
322 #sound-dai-cells = <1>;
324 AVDD-supply = <&mt6359_vio18_ldo_reg>;
325 DBVDD-supply = <&mt6359_vio18_ldo_reg>;
326 LDO1-IN-supply = <&mt6359_vio18_ldo_reg>;
327 MICVDD-supply = <&pp3300_g>;
334 clock-frequency = <400000>;
335 clock-stretch-ns = <12600>;
336 pinctrl-names = "default";
337 pinctrl-0 = <&i2c2_pins>;
340 compatible = "elan,ekth3000";
342 interrupts-extended = <&pio 15 IRQ_TYPE_LEVEL_LOW>;
343 pinctrl-names = "default";
344 pinctrl-0 = <&trackpad_pins>;
345 vcc-supply = <&pp3300_u>;
353 clock-frequency = <400000>;
354 pinctrl-names = "default";
355 pinctrl-0 = <&i2c3_pins>;
357 anx_bridge: anx7625@58 {
358 compatible = "analogix,anx7625";
360 pinctrl-names = "default";
361 pinctrl-0 = <&anx7625_pins>;
362 enable-gpios = <&pio 41 GPIO_ACTIVE_HIGH>;
363 reset-gpios = <&pio 42 GPIO_ACTIVE_HIGH>;
364 vdd10-supply = <&pp1000_mipibrdg>;
365 vdd18-supply = <&pp1800_mipibrdg>;
366 vdd33-supply = <&pp3300_mipibrdg>;
369 #address-cells = <1>;
375 anx7625_in: endpoint {
376 remote-endpoint = <&dsi_out>;
383 anx7625_out: endpoint {
384 remote-endpoint = <&panel_in>;
391 compatible = "edp-panel";
392 power-supply = <&pp3300_mipibrdg>;
393 backlight = <&backlight_lcd0>;
397 remote-endpoint = <&anx7625_out>;
408 clock-frequency = <400000>;
409 pinctrl-names = "default";
410 pinctrl-0 = <&i2c7_pins>;
414 domain-supply = <&mt6315_7_vbuck1>;
418 domain-supply = <&mt6359_vsram_others_ldo_reg>;
428 pinctrl-names = "default", "state_uhs";
429 pinctrl-0 = <&mmc0_default_pins>;
430 pinctrl-1 = <&mmc0_uhs_pins>;
432 max-frequency = <200000000>;
433 vmmc-supply = <&mt6359_vemc_1_ldo_reg>;
434 vqmmc-supply = <&mt6359_vufs_ldo_reg>;
440 mmc-hs400-enhanced-strobe;
441 hs400-ds-delay = <0x12814>;
450 pinctrl-names = "default", "state_uhs";
451 pinctrl-0 = <&mmc1_default_pins>;
452 pinctrl-1 = <&mmc1_uhs_pins>;
454 max-frequency = <200000000>;
455 cd-gpios = <&pio 17 GPIO_ACTIVE_LOW>;
456 vmmc-supply = <&mt6360_ldo5_reg>;
457 vqmmc-supply = <&mt6360_ldo3_reg>;
466 &mt6359_vgpu11_buck_reg {
470 &mt6359_vgpu11_sshub_buck_reg {
472 regulator-min-microvolt = <575000>;
473 regulator-max-microvolt = <575000>;
476 &mt6359_vrf12_ldo_reg {
480 &mt6359_vsram_others_ldo_reg {
481 regulator-min-microvolt = <750000>;
482 regulator-max-microvolt = <800000>;
483 regulator-coupled-with = <&mt6315_7_vbuck1>;
484 regulator-coupled-max-spread = <10000>;
487 &mt6359_vufs_ldo_reg {
492 mediatek,dmic-mode = <1>; /* one-wire */
493 mediatek,mic-type-0 = <2>; /* DMIC */
494 mediatek,mic-type-2 = <2>; /* DMIC */
500 pinctrl-names = "default";
501 pinctrl-0 = <&nor_flash_pins>;
502 assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
503 assigned-clock-parents = <&topckgen CLK_TOP_UNIVPLL_D6_D8>;
506 compatible = "winbond,w25q64jwm", "jedec,spi-nor";
508 spi-max-frequency = <52000000>;
509 spi-rx-bus-width = <2>;
510 spi-tx-bus-width = <2>;
515 pinctrl-names = "default";
516 pinctrl-0 = <&pcie_pins>;
520 reg = <0x0000 0 0 0 0>;
522 bus-range = <0x1 0x1>;
524 #address-cells = <3>;
529 reg = <0x10000 0 0 0 0x100000>,
530 <0x10000 0 0x100000 0 0x100000>;
531 memory-region = <&wifi_restricted_dma_region>;
538 gpio-line-names = "I2S_DP_LRCK",
553 * AP_FLASH_WP_L is crossystem ABI. Schematics
554 * call it AP_FLASH_WP_ODL.
568 "EN_PP3300_DPBRDG_DX",
579 "AP_SPI_H1_TPM_CS_L",
580 "AP_SPI_H1_TPM_MISO",
581 "AP_SPI_H1_TPM_MOSI",
668 "EN_PP1800_DPBRDG_DX",
670 "EN_PP1800_EDPBRDG_DX",
678 "EN_PP3300_DISPLAY_DX",
680 "TOUCH_REPORT_DISABLE",
683 "AP_I2C_TRACKPAD_SCL_1V8",
684 "AP_I2C_TRACKPAD_SDA_1V8",
688 "SET_VMC_VOLT_AT_1V8",
702 "AP_I2C_EDPBRDG_SCL",
703 "AP_I2C_EDPBRDG_SDA",
706 "UART_SERVO_TX_SCP_RX",
707 "UART_SCP_TX_SERVO_RX",
710 "UART_AP_WAKE_BT_ODL",
763 anx7625_pins: anx7625-default-pins {
765 pinmux = <PINMUX_GPIO41__FUNC_GPIO41>,
766 <PINMUX_GPIO42__FUNC_GPIO42>;
771 pinmux = <PINMUX_GPIO6__FUNC_GPIO6>;
777 aud_clk_mosi_off_pins: aud-clk-mosi-off-pins {
779 pinmux = <PINMUX_GPIO214__FUNC_GPIO214>,
780 <PINMUX_GPIO215__FUNC_GPIO215>;
784 aud_clk_mosi_on_pins: aud-clk-mosi-on-pins {
786 pinmux = <PINMUX_GPIO214__FUNC_AUD_CLK_MOSI>,
787 <PINMUX_GPIO215__FUNC_AUD_SYNC_MOSI>;
788 drive-strength = <10>;
792 aud_dat_miso_ch34_off_pins: aud-dat-miso-ch34-off-pins {
794 pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
798 aud_dat_miso_ch34_on_pins: aud-dat-miso-ch34-on-pins {
800 pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
804 aud_dat_miso_off_pins: aud-dat-miso-off-pins {
806 pinmux = <PINMUX_GPIO218__FUNC_GPIO218>,
807 <PINMUX_GPIO219__FUNC_GPIO219>;
811 aud_dat_miso_on_pins: aud-dat-miso-on-pins {
813 pinmux = <PINMUX_GPIO218__FUNC_AUD_DAT_MISO0>,
814 <PINMUX_GPIO219__FUNC_AUD_DAT_MISO1>;
815 drive-strength = <10>;
819 aud_dat_miso2_off_pins: aud-dat-miso2-off-pins {
821 pinmux = <PINMUX_GPIO199__FUNC_GPIO199>;
825 aud_dat_miso2_on_pins: aud-dat-miso2-on-pins {
827 pinmux = <PINMUX_GPIO199__FUNC_AUD_DAT_MISO2>;
831 aud_dat_mosi_ch34_off_pins: aud-dat-mosi-ch34-off-pins {
833 pinmux = <PINMUX_GPIO196__FUNC_GPIO196>;
837 aud_dat_mosi_ch34_on_pins: aud-dat-mosi-ch34-on-pins {
839 pinmux = <PINMUX_GPIO196__FUNC_AUD_DAT_MOSI2>;
843 aud_dat_mosi_off_pins: aud-dat-mosi-off-pins {
845 pinmux = <PINMUX_GPIO216__FUNC_GPIO216>,
846 <PINMUX_GPIO217__FUNC_GPIO217>;
850 aud_dat_mosi_on_pins: aud-dat-mosi-on-pins {
852 pinmux = <PINMUX_GPIO216__FUNC_AUD_DAT_MOSI0>,
853 <PINMUX_GPIO217__FUNC_AUD_DAT_MOSI1>;
854 drive-strength = <10>;
858 aud_gpio_i2s3_off_pins: aud-gpio-i2s3-off-pins {
860 pinmux = <PINMUX_GPIO32__FUNC_GPIO32>,
861 <PINMUX_GPIO33__FUNC_GPIO33>,
862 <PINMUX_GPIO35__FUNC_GPIO35>;
866 aud_gpio_i2s3_on_pins: aud-gpio-i2s3-on-pins {
868 pinmux = <PINMUX_GPIO32__FUNC_I2S3_BCK>,
869 <PINMUX_GPIO33__FUNC_I2S3_LRCK>,
870 <PINMUX_GPIO35__FUNC_I2S3_DO>;
874 aud_gpio_i2s8_off_pins: aud-gpio-i2s8-off-pins {
876 pinmux = <PINMUX_GPIO10__FUNC_GPIO10>,
877 <PINMUX_GPIO11__FUNC_GPIO11>,
878 <PINMUX_GPIO12__FUNC_GPIO12>,
879 <PINMUX_GPIO13__FUNC_GPIO13>;
883 aud_gpio_i2s8_on_pins: aud-gpio-i2s8-on-pins {
885 pinmux = <PINMUX_GPIO10__FUNC_I2S8_MCK>,
886 <PINMUX_GPIO11__FUNC_I2S8_BCK>,
887 <PINMUX_GPIO12__FUNC_I2S8_LRCK>,
888 <PINMUX_GPIO13__FUNC_I2S8_DI>;
892 aud_gpio_i2s9_off_pins: aud-gpio-i2s9-off-pins {
894 pinmux = <PINMUX_GPIO29__FUNC_GPIO29>;
898 aud_gpio_i2s9_on_pins: aud-gpio-i2s9-on-pins {
900 pinmux = <PINMUX_GPIO29__FUNC_I2S9_DO>;
904 aud_gpio_tdm_off_pins: aud-gpio-tdm-off-pins {
906 pinmux = <PINMUX_GPIO0__FUNC_GPIO0>,
907 <PINMUX_GPIO1__FUNC_GPIO1>,
908 <PINMUX_GPIO2__FUNC_GPIO2>,
909 <PINMUX_GPIO3__FUNC_GPIO3>;
913 aud_gpio_tdm_on_pins: aud-gpio-tdm-on-pins {
915 pinmux = <PINMUX_GPIO0__FUNC_TDM_LRCK>,
916 <PINMUX_GPIO1__FUNC_TDM_BCK>,
917 <PINMUX_GPIO2__FUNC_TDM_MCK>,
918 <PINMUX_GPIO3__FUNC_TDM_DATA0>;
922 aud_nle_mosi_off_pins: aud-nle-mosi-off-pins {
924 pinmux = <PINMUX_GPIO197__FUNC_GPIO197>,
925 <PINMUX_GPIO198__FUNC_GPIO198>;
929 aud_nle_mosi_on_pins: aud-nle-mosi-on-pins {
931 pinmux = <PINMUX_GPIO197__FUNC_AUD_NLE_MOSI1>,
932 <PINMUX_GPIO198__FUNC_AUD_NLE_MOSI0>;
936 cr50_int: cr50-irq-default-pins {
937 pins-gsc-ap-int-odl {
938 pinmux = <PINMUX_GPIO171__FUNC_GPIO171>;
943 cros_ec_int: cros-ec-irq-default-pins {
945 pinmux = <PINMUX_GPIO5__FUNC_GPIO5>;
951 i2c0_pins: i2c0-default-pins {
953 pinmux = <PINMUX_GPIO204__FUNC_SCL0>,
954 <PINMUX_GPIO205__FUNC_SDA0>;
955 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
956 drive-strength-microamp = <1000>;
960 i2c1_pins: i2c1-default-pins {
962 pinmux = <PINMUX_GPIO118__FUNC_SCL1>,
963 <PINMUX_GPIO119__FUNC_SDA1>;
964 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
965 drive-strength-microamp = <1000>;
969 i2c2_pins: i2c2-default-pins {
971 pinmux = <PINMUX_GPIO141__FUNC_SCL2>,
972 <PINMUX_GPIO142__FUNC_SDA2>;
973 bias-pull-up = <MTK_PULL_SET_RSEL_011>;
977 i2c3_pins: i2c3-default-pins {
979 pinmux = <PINMUX_GPIO160__FUNC_SCL3>,
980 <PINMUX_GPIO161__FUNC_SDA3>;
982 drive-strength-microamp = <1000>;
986 i2c7_pins: i2c7-default-pins {
988 pinmux = <PINMUX_GPIO124__FUNC_SCL7>,
989 <PINMUX_GPIO125__FUNC_SDA7>;
991 drive-strength-microamp = <1000>;
995 mmc0_default_pins: mmc0-default-pins {
997 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
998 <PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
999 <PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
1000 <PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
1001 <PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
1002 <PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
1003 <PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
1004 <PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
1005 <PINMUX_GPIO183__FUNC_MSDC0_CMD>;
1007 drive-strength = <8>;
1008 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1012 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
1013 drive-strength = <8>;
1014 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1018 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
1019 drive-strength = <8>;
1020 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1024 mmc0_uhs_pins: mmc0-uhs-pins {
1026 pinmux = <PINMUX_GPIO184__FUNC_MSDC0_DAT0>,
1027 <PINMUX_GPIO188__FUNC_MSDC0_DAT1>,
1028 <PINMUX_GPIO185__FUNC_MSDC0_DAT2>,
1029 <PINMUX_GPIO193__FUNC_MSDC0_DAT3>,
1030 <PINMUX_GPIO186__FUNC_MSDC0_DAT4>,
1031 <PINMUX_GPIO189__FUNC_MSDC0_DAT5>,
1032 <PINMUX_GPIO187__FUNC_MSDC0_DAT6>,
1033 <PINMUX_GPIO190__FUNC_MSDC0_DAT7>,
1034 <PINMUX_GPIO183__FUNC_MSDC0_CMD>;
1036 drive-strength = <10>;
1037 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1041 pinmux = <PINMUX_GPIO192__FUNC_MSDC0_CLK>;
1042 drive-strength = <10>;
1043 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1047 pinmux = <PINMUX_GPIO194__FUNC_MSDC0_RSTB>;
1048 drive-strength = <8>;
1049 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
1053 pinmux = <PINMUX_GPIO191__FUNC_MSDC0_DSL>;
1054 drive-strength = <10>;
1055 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1059 mmc1_default_pins: mmc1-default-pins {
1061 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
1062 <PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
1063 <PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
1064 <PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
1065 <PINMUX_GPIO52__FUNC_MSDC1_CMD>;
1067 drive-strength = <8>;
1068 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1072 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
1073 drive-strength = <8>;
1074 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1078 pinmux = <PINMUX_GPIO17__FUNC_GPIO17>;
1084 mmc1_uhs_pins: mmc1-uhs-pins {
1086 pinmux = <PINMUX_GPIO54__FUNC_MSDC1_DAT0>,
1087 <PINMUX_GPIO56__FUNC_MSDC1_DAT1>,
1088 <PINMUX_GPIO55__FUNC_MSDC1_DAT2>,
1089 <PINMUX_GPIO53__FUNC_MSDC1_DAT3>,
1090 <PINMUX_GPIO52__FUNC_MSDC1_CMD>;
1092 drive-strength = <8>;
1093 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
1097 pinmux = <PINMUX_GPIO51__FUNC_MSDC1_CLK>;
1099 drive-strength = <8>;
1100 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
1104 nor_flash_pins: nor-flash-default-pins {
1106 pinmux = <PINMUX_GPIO24__FUNC_SPINOR_CS>,
1107 <PINMUX_GPIO28__FUNC_SPINOR_IO1>;
1110 drive-strength = <10>;
1114 pinmux = <PINMUX_GPIO27__FUNC_SPINOR_IO0>;
1116 drive-strength = <10>;
1120 pinmux = <PINMUX_GPIO25__FUNC_SPINOR_CK>;
1123 drive-strength = <10>;
1127 pcie_pins: pcie-default-pins {
1129 pinmux = <PINMUX_GPIO63__FUNC_PCIE_WAKE_N>;
1134 pinmux = <PINMUX_GPIO64__FUNC_PCIE_PERESET_N>;
1138 pinmux = <PINMUX_GPIO65__FUNC_PCIE_CLKREQ_N>;
1143 pinmux = <PINMUX_GPIO145__FUNC_GPIO145>; /* WIFI_KILL_L */
1148 pp1000_dpbrdg_en_pins: pp1000-dpbrdg-en-pins {
1150 pinmux = <PINMUX_GPIO19__FUNC_GPIO19>;
1155 pp1000_mipibrdg_en_pins: pp1000-mipibrdg-en-pins {
1157 pinmux = <PINMUX_GPIO129__FUNC_GPIO129>;
1162 pp1800_dpbrdg_en_pins: pp1800-dpbrdg-en-pins {
1164 pinmux = <PINMUX_GPIO126__FUNC_GPIO126>;
1169 pp1800_mipibrdg_en_pins: pp1800-mipibrd-en-pins {
1171 pinmux = <PINMUX_GPIO128__FUNC_GPIO128>;
1176 pp3300_dpbrdg_en_pins: pp3300-dpbrdg-en-pins {
1178 pinmux = <PINMUX_GPIO26__FUNC_GPIO26>;
1183 pp3300_mipibrdg_en_pins: pp3300-mipibrdg-en-pins {
1185 pinmux = <PINMUX_GPIO127__FUNC_GPIO127>;
1190 pp3300_wlan_pins: pp3300-wlan-pins {
1191 pins-pcie-en-pp3300-wlan {
1192 pinmux = <PINMUX_GPIO143__FUNC_GPIO143>;
1197 pwm0_pins: pwm0-default-pins {
1199 pinmux = <PINMUX_GPIO40__FUNC_DISP_PWM>;
1203 pinmux = <PINMUX_GPIO152__FUNC_GPIO152>;
1208 rt1015p_pins: rt1015p-default-pins {
1210 pinmux = <PINMUX_GPIO147__FUNC_GPIO147>;
1215 scp_pins: scp-pins {
1217 pinmux = <PINMUX_GPIO195__FUNC_SCP_VREQ_VAO>;
1221 spi1_pins: spi1-default-pins {
1223 pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
1224 <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
1225 <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
1230 pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
1235 spi5_pins: spi5-default-pins {
1237 pinmux = <PINMUX_GPIO38__FUNC_SPI5_A_MI>,
1238 <PINMUX_GPIO37__FUNC_GPIO37>,
1239 <PINMUX_GPIO39__FUNC_SPI5_A_MO>,
1240 <PINMUX_GPIO36__FUNC_SPI5_A_CLK>;
1245 trackpad_pins: trackpad-default-pins {
1247 pinmux = <PINMUX_GPIO15__FUNC_GPIO15>;
1249 bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
1253 touchscreen_pins: touchscreen-default-pins {
1255 pinmux = <PINMUX_GPIO21__FUNC_GPIO21>;
1261 pinmux = <PINMUX_GPIO137__FUNC_GPIO137>;
1266 pinmux = <PINMUX_GPIO138__FUNC_GPIO138>;
1271 vow_clk_miso_off_pins: vow-clk-miso-off-pins {
1273 pinmux = <PINMUX_GPIO219__FUNC_GPIO219>;
1277 vow_clk_miso_on_pins: vow-clk-miso-on-pins {
1279 pinmux = <PINMUX_GPIO219__FUNC_VOW_CLK_MISO>;
1283 vow_dat_miso_off_pins: vow-dat-miso-off-pins {
1285 pinmux = <PINMUX_GPIO218__FUNC_GPIO218>;
1289 vow_dat_miso_on_pins: vow-dat-miso-on-pins {
1291 pinmux = <PINMUX_GPIO218__FUNC_VOW_DAT_MISO>;
1297 interrupts-extended = <&pio 214 IRQ_TYPE_LEVEL_HIGH>;
1303 pinctrl-names = "default";
1304 pinctrl-0 = <&pwm0_pins>;
1310 firmware-name = "/*(DEBLOBBED)*/";
1311 memory-region = <&scp_mem_reserved>;
1312 pinctrl-names = "default";
1313 pinctrl-0 = <&scp_pins>;
1316 compatible = "google,cros-ec-rpmsg";
1317 mediatek,rpmsg-name = "cros-ec-rpmsg";
1324 mediatek,pad-select = <0>;
1325 pinctrl-names = "default";
1326 pinctrl-0 = <&spi1_pins>;
1329 compatible = "google,cros-ec-spi";
1331 interrupts-extended = <&pio 5 IRQ_TYPE_LEVEL_LOW>;
1332 spi-max-frequency = <3000000>;
1333 pinctrl-names = "default";
1334 pinctrl-0 = <&cros_ec_int>;
1336 #address-cells = <1>;
1339 base_detection: cbas {
1340 compatible = "google,cros-cbas";
1344 compatible = "google,cros-ec-pwm";
1347 status = "disabled";
1350 i2c_tunnel: i2c-tunnel {
1351 compatible = "google,cros-ec-i2c-tunnel";
1352 google,remote-bus = <0>;
1353 #address-cells = <1>;
1357 mt6360_ldo3_reg: regulator@0 {
1358 compatible = "google,cros-ec-regulator";
1360 regulator-min-microvolt = <1800000>;
1361 regulator-max-microvolt = <3300000>;
1364 mt6360_ldo5_reg: regulator@1 {
1365 compatible = "google,cros-ec-regulator";
1367 regulator-min-microvolt = <3300000>;
1368 regulator-max-microvolt = <3300000>;
1372 compatible = "google,cros-ec-typec";
1373 #address-cells = <1>;
1376 usb_c0: connector@0 {
1377 compatible = "usb-c-connector";
1380 power-role = "dual";
1382 try-power-role = "source";
1385 usb_c1: connector@1 {
1386 compatible = "usb-c-connector";
1389 power-role = "dual";
1391 try-power-role = "source";
1400 cs-gpios = <&pio 37 GPIO_ACTIVE_LOW>;
1401 mediatek,pad-select = <0>;
1402 pinctrl-names = "default";
1403 pinctrl-0 = <&spi5_pins>;
1406 compatible = "google,cr50";
1408 interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>;
1409 spi-max-frequency = <1000000>;
1410 pinctrl-names = "default";
1411 pinctrl-0 = <&cr50_int>;
1416 #address-cells = <2>;
1420 compatible = "mediatek,mt6315-regulator";
1421 reg = <0x6 SPMI_USID>;
1424 mt6315_6_vbuck1: vbuck1 {
1425 regulator-compatible = "vbuck1";
1426 regulator-name = "Vbcpu";
1427 regulator-min-microvolt = <300000>;
1428 regulator-max-microvolt = <1193750>;
1429 regulator-enable-ramp-delay = <256>;
1430 regulator-allowed-modes = <0 1 2>;
1431 regulator-always-on;
1434 mt6315_6_vbuck3: vbuck3 {
1435 regulator-compatible = "vbuck3";
1436 regulator-name = "Vlcpu";
1437 regulator-min-microvolt = <300000>;
1438 regulator-max-microvolt = <1193750>;
1439 regulator-enable-ramp-delay = <256>;
1440 regulator-allowed-modes = <0 1 2>;
1441 regulator-always-on;
1447 compatible = "mediatek,mt6315-regulator";
1448 reg = <0x7 SPMI_USID>;
1451 mt6315_7_vbuck1: vbuck1 {
1452 regulator-compatible = "vbuck1";
1453 regulator-name = "Vgpu";
1454 regulator-min-microvolt = <606250>;
1455 regulator-max-microvolt = <800000>;
1456 regulator-enable-ramp-delay = <256>;
1457 regulator-allowed-modes = <0 1 2>;
1458 regulator-coupled-with = <&mt6359_vsram_others_ldo_reg>;
1459 regulator-coupled-max-spread = <10000>;
1473 vusb33-supply = <&pp3300_g>;
1474 vbus-supply = <&pp5000_a>;
1477 #include <arm/cros-ec-keyboard.dtsi>
1478 #include <arm/cros-ec-sbs.dtsi>