arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / arm64 / boot / dts / mediatek / mt8183-kukui-krane.dtsi
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3  * Copyright 2019 Google LLC
4  */
5
6 #include "mt8183-kukui.dtsi"
7 #include "mt8183-kukui-audio-max98357a.dtsi"
8
9 / {
10         ppvarn_lcd: ppvarn-lcd {
11                 compatible = "regulator-fixed";
12                 regulator-name = "ppvarn_lcd";
13                 pinctrl-names = "default";
14                 pinctrl-0 = <&ppvarn_lcd_en>;
15
16                 enable-active-high;
17
18                 gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
19         };
20
21         ppvarp_lcd: ppvarp-lcd {
22                 compatible = "regulator-fixed";
23                 regulator-name = "ppvarp_lcd";
24                 pinctrl-names = "default";
25                 pinctrl-0 = <&ppvarp_lcd_en>;
26
27                 enable-active-high;
28
29                 gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
30         };
31
32         pp1800_lcd: pp1800-lcd {
33                 compatible = "regulator-fixed";
34                 regulator-name = "pp1800_lcd";
35                 pinctrl-names = "default";
36                 pinctrl-0 = <&pp1800_lcd_en>;
37
38                 enable-active-high;
39
40                 gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
41         };
42 };
43
44 &bluetooth {
45         firmware-name = "/*(DEBLOBBED)*/";
46 };
47
48 &i2c0 {
49         status = "okay";
50
51         touchscreen4: touchscreen@5d {
52                 compatible = "hid-over-i2c";
53                 reg = <0x5d>;
54                 pinctrl-names = "default";
55                 pinctrl-0 = <&open_touch>;
56
57                 interrupt-parent = <&pio>;
58                 interrupts = <155 IRQ_TYPE_EDGE_FALLING>;
59
60                 post-power-on-delay-ms = <10>;
61                 hid-descr-addr = <0x0001>;
62         };
63 };
64
65 &mt6358_vcama2_reg {
66         regulator-min-microvolt = <2800000>;
67         regulator-max-microvolt = <2800000>;
68 };
69
70 &i2c2 {
71         pinctrl-names = "default";
72         pinctrl-0 = <&i2c2_pins>;
73         status = "okay";
74         clock-frequency = <400000>;
75         vbus-supply = <&mt6358_vcamio_reg>;
76
77         eeprom@58 {
78                 compatible = "atmel,24c32";
79                 reg = <0x58>;
80                 pagesize = <32>;
81                 vcc-supply = <&mt6358_vcama2_reg>;
82         };
83 };
84
85 &i2c4 {
86         pinctrl-names = "default";
87         pinctrl-0 = <&i2c4_pins>;
88         status = "okay";
89         clock-frequency = <400000>;
90         vbus-supply = <&mt6358_vcn18_reg>;
91
92         eeprom@54 {
93                 compatible = "atmel,24c32";
94                 reg = <0x54>;
95                 pagesize = <32>;
96                 vcc-supply = <&mt6358_vcn18_reg>;
97         };
98 };
99
100 &pio {
101         /* 192 lines */
102         gpio-line-names =
103                 "SPI_AP_EC_CS_L",
104                 "SPI_AP_EC_MOSI",
105                 "SPI_AP_EC_CLK",
106                 "I2S3_DO",
107                 "USB_PD_INT_ODL",
108                 "",
109                 "",
110                 "",
111                 "",
112                 "IT6505_HPD_L",
113                 "I2S3_TDM_D3",
114                 "SOC_I2C6_1V8_SCL",
115                 "SOC_I2C6_1V8_SDA",
116                 "DPI_D0",
117                 "DPI_D1",
118                 "DPI_D2",
119                 "DPI_D3",
120                 "DPI_D4",
121                 "DPI_D5",
122                 "DPI_D6",
123                 "DPI_D7",
124                 "DPI_D8",
125                 "DPI_D9",
126                 "DPI_D10",
127                 "DPI_D11",
128                 "DPI_HSYNC",
129                 "DPI_VSYNC",
130                 "DPI_DE",
131                 "DPI_CK",
132                 "AP_MSDC1_CLK",
133                 "AP_MSDC1_DAT3",
134                 "AP_MSDC1_CMD",
135                 "AP_MSDC1_DAT0",
136                 "AP_MSDC1_DAT2",
137                 "AP_MSDC1_DAT1",
138                 "",
139                 "",
140                 "",
141                 "",
142                 "",
143                 "",
144                 "OTG_EN",
145                 "DRVBUS",
146                 "DISP_PWM",
147                 "DSI_TE",
148                 "LCM_RST_1V8",
149                 "AP_CTS_WIFI_RTS",
150                 "AP_RTS_WIFI_CTS",
151                 "SOC_I2C5_1V8_SCL",
152                 "SOC_I2C5_1V8_SDA",
153                 "SOC_I2C3_1V8_SCL",
154                 "SOC_I2C3_1V8_SDA",
155                 "",
156                 "",
157                 "",
158                 "",
159                 "",
160                 "",
161                 "",
162                 "",
163                 "",
164                 "",
165                 "",
166                 "",
167                 "",
168                 "",
169                 "",
170                 "",
171                 "",
172                 "",
173                 "",
174                 "",
175                 "",
176                 "",
177                 "",
178                 "",
179                 "",
180                 "",
181                 "",
182                 "",
183                 "",
184                 "SOC_I2C1_1V8_SDA",
185                 "SOC_I2C0_1V8_SDA",
186                 "SOC_I2C0_1V8_SCL",
187                 "SOC_I2C1_1V8_SCL",
188                 "AP_SPI_H1_MISO",
189                 "AP_SPI_H1_CS_L",
190                 "AP_SPI_H1_MOSI",
191                 "AP_SPI_H1_CLK",
192                 "I2S5_BCK",
193                 "I2S5_LRCK",
194                 "I2S5_DO",
195                 "BOOTBLOCK_EN_L",
196                 "MT8183_KPCOL0",
197                 "SPI_AP_EC_MISO",
198                 "UART_DBG_TX_AP_RX",
199                 "UART_AP_TX_DBG_RX",
200                 "I2S2_MCK",
201                 "I2S2_BCK",
202                 "CLK_5M_WCAM",
203                 "CLK_2M_UCAM",
204                 "I2S2_LRCK",
205                 "I2S2_DI",
206                 "SOC_I2C2_1V8_SCL",
207                 "SOC_I2C2_1V8_SDA",
208                 "SOC_I2C4_1V8_SCL",
209                 "SOC_I2C4_1V8_SDA",
210                 "",
211                 "SCL8",
212                 "SDA8",
213                 "FCAM_PWDN_L",
214                 "",
215                 "",
216                 "",
217                 "",
218                 "",
219                 "",
220                 "",
221                 "",
222                 "",
223                 "",
224                 "",
225                 "",
226                 "",
227                 "",
228                 "",
229                 "",
230                 "",
231                 "",
232                 "",
233                 "",
234                 "",
235                 "",
236                 "",
237                 "",
238                 "",
239                 "I2S_PMIC",
240                 "I2S_PMIC",
241                 "I2S_PMIC",
242                 "I2S_PMIC",
243                 "I2S_PMIC",
244                 "I2S_PMIC",
245                 "I2S_PMIC",
246                 "I2S_PMIC",
247                 "",
248                 "",
249                 "",
250                 "",
251                 "",
252                 "",
253                 /*
254                  * AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
255                  * call it BIOS_FLASH_WP_R_L.
256                  */
257                 "AP_FLASH_WP_L",
258                 "EC_AP_INT_ODL",
259                 "IT6505_INT_ODL",
260                 "H1_INT_OD_L",
261                 "",
262                 "",
263                 "",
264                 "",
265                 "",
266                 "",
267                 "",
268                 "AP_SPI_FLASH_MISO",
269                 "AP_SPI_FLASH_CS_L",
270                 "AP_SPI_FLASH_MOSI",
271                 "AP_SPI_FLASH_CLK",
272                 "DA7219_IRQ",
273                 "",
274                 "",
275                 "",
276                 "",
277                 "",
278                 "",
279                 "",
280                 "",
281                 "",
282                 "",
283                 "",
284                 "",
285                 "",
286                 "",
287                 "",
288                 "",
289                 "",
290                 "",
291                 "",
292                 "",
293                 "",
294                 "",
295                 "",
296                 "",
297                 "",
298                 "";
299
300         ppvarp_lcd_en: ppvarp-lcd-en {
301                 pins1 {
302                         pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
303                         output-low;
304                 };
305         };
306
307         ppvarn_lcd_en: ppvarn-lcd-en {
308                 pins1 {
309                         pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
310                         output-low;
311                 };
312         };
313
314         pp1800_lcd_en: pp1800-lcd-en {
315                 pins1 {
316                         pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
317                         output-low;
318                 };
319         };
320
321         open_touch: open_touch {
322                 irq_pin {
323                         pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
324                         input-enable;
325                         bias-pull-up;
326                 };
327
328                 rst_pin {
329                         pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
330
331                         /*
332                          * The pen driver doesn't currently support  driving
333                          * this reset line.  By specifying output-high here
334                          * we're relying on the fact that this pin has a default
335                          * pulldown at boot (which makes sure the pen was in
336                          * reset if it was powered) and then we set it high here
337                          * to take it out of reset.  Better would be if the pen
338                          * driver could control this and we could remove
339                          * "output-high" here.
340                          */
341                         output-high;
342                 };
343         };
344 };
345
346 &cros_ec {
347         keyboard-controller {
348                 compatible = "google,cros-ec-keyb-switches";
349         };
350 };
351
352 &qca_wifi {
353         qcom,ath10k-calibration-variant = "LE_Krane";
354 };
355
356 &sound {
357         compatible = "mediatek,mt8183_mt6358_ts3a227_max98357";
358 };