1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (c) 2018 MediaTek Inc.
4 * Author: Ben Ho <ben.ho@mediatek.com>
5 * Erin Lo <erin.lo@mediatek.com>
12 model = "MediaTek MT8183 evaluation board";
13 compatible = "mediatek,mt8183-evb", "mediatek,mt8183";
20 device_type = "memory";
21 reg = <0 0x40000000 0 0x80000000>;
25 stdout-path = "serial0:921600n8";
34 pinctrl-names = "default";
35 pinctrl-0 = <&i2c_pins_0>;
37 clock-frequency = <100000>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&i2c_pins_1>;
44 clock-frequency = <100000>;
48 pinctrl-names = "default";
49 pinctrl-0 = <&i2c_pins_2>;
51 clock-frequency = <100000>;
55 pinctrl-names = "default";
56 pinctrl-0 = <&i2c_pins_3>;
58 clock-frequency = <100000>;
62 pinctrl-names = "default";
63 pinctrl-0 = <&i2c_pins_4>;
65 clock-frequency = <1000000>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&i2c_pins_5>;
72 clock-frequency = <1000000>;
78 pinmux = <PINMUX_GPIO82__FUNC_SDA0>,
79 <PINMUX_GPIO83__FUNC_SCL0>;
80 mediatek,pull-up-adv = <3>;
81 mediatek,drive-strength-adv = <00>;
87 pinmux = <PINMUX_GPIO81__FUNC_SDA1>,
88 <PINMUX_GPIO84__FUNC_SCL1>;
89 mediatek,pull-up-adv = <3>;
90 mediatek,drive-strength-adv = <00>;
96 pinmux = <PINMUX_GPIO103__FUNC_SCL2>,
97 <PINMUX_GPIO104__FUNC_SDA2>;
98 mediatek,pull-up-adv = <3>;
99 mediatek,drive-strength-adv = <00>;
105 pinmux = <PINMUX_GPIO50__FUNC_SCL3>,
106 <PINMUX_GPIO51__FUNC_SDA3>;
107 mediatek,pull-up-adv = <3>;
108 mediatek,drive-strength-adv = <00>;
114 pinmux = <PINMUX_GPIO105__FUNC_SCL4>,
115 <PINMUX_GPIO106__FUNC_SDA4>;
116 mediatek,pull-up-adv = <3>;
117 mediatek,drive-strength-adv = <00>;
123 pinmux = <PINMUX_GPIO48__FUNC_SCL5>,
124 <PINMUX_GPIO49__FUNC_SDA5>;
125 mediatek,pull-up-adv = <3>;
126 mediatek,drive-strength-adv = <00>;
132 pinmux = <PINMUX_GPIO85__FUNC_SPI0_MI>,
133 <PINMUX_GPIO86__FUNC_SPI0_CSB>,
134 <PINMUX_GPIO87__FUNC_SPI0_MO>,
135 <PINMUX_GPIO88__FUNC_SPI0_CLK>;
142 pinmux = <PINMUX_GPIO161__FUNC_SPI1_A_MI>,
143 <PINMUX_GPIO162__FUNC_SPI1_A_CSB>,
144 <PINMUX_GPIO163__FUNC_SPI1_A_MO>,
145 <PINMUX_GPIO164__FUNC_SPI1_A_CLK>;
152 pinmux = <PINMUX_GPIO0__FUNC_SPI2_CSB>,
153 <PINMUX_GPIO1__FUNC_SPI2_MO>,
154 <PINMUX_GPIO2__FUNC_SPI2_CLK>,
155 <PINMUX_GPIO94__FUNC_SPI2_MI>;
162 pinmux = <PINMUX_GPIO21__FUNC_SPI3_MI>,
163 <PINMUX_GPIO22__FUNC_SPI3_CSB>,
164 <PINMUX_GPIO23__FUNC_SPI3_MO>,
165 <PINMUX_GPIO24__FUNC_SPI3_CLK>;
172 pinmux = <PINMUX_GPIO17__FUNC_SPI4_MI>,
173 <PINMUX_GPIO18__FUNC_SPI4_CSB>,
174 <PINMUX_GPIO19__FUNC_SPI4_MO>,
175 <PINMUX_GPIO20__FUNC_SPI4_CLK>;
182 pinmux = <PINMUX_GPIO13__FUNC_SPI5_MI>,
183 <PINMUX_GPIO14__FUNC_SPI5_CSB>,
184 <PINMUX_GPIO15__FUNC_SPI5_MO>,
185 <PINMUX_GPIO16__FUNC_SPI5_CLK>;
192 pinctrl-names = "default";
193 pinctrl-0 = <&spi_pins_0>;
194 mediatek,pad-select = <0>;
199 pinctrl-names = "default";
200 pinctrl-0 = <&spi_pins_1>;
201 mediatek,pad-select = <0>;
206 pinctrl-names = "default";
207 pinctrl-0 = <&spi_pins_2>;
208 mediatek,pad-select = <0>;
213 pinctrl-names = "default";
214 pinctrl-0 = <&spi_pins_3>;
215 mediatek,pad-select = <0>;
220 pinctrl-names = "default";
221 pinctrl-0 = <&spi_pins_4>;
222 mediatek,pad-select = <0>;
227 pinctrl-names = "default";
228 pinctrl-0 = <&spi_pins_5>;
229 mediatek,pad-select = <0>;