1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2016 MediaTek Inc.
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include "mt8173.dtsi"
20 device_type = "memory";
21 reg = <0 0x40000000 0 0x80000000>;
24 backlight: backlight {
25 compatible = "pwm-backlight";
26 pwms = <&pwm0 0 1000000>;
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
35 bl_fixed_reg: fixedregulator2 {
36 compatible = "regulator-fixed";
37 regulator-name = "bl_fixed";
38 regulator-min-microvolt = <1800000>;
39 regulator-max-microvolt = <1800000>;
40 startup-delay-us = <1000>;
42 gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
43 pinctrl-names = "default";
44 pinctrl-0 = <&bl_fixed_pins>;
48 stdout-path = "serial0:115200n8";
51 gpio_keys: gpio-keys {
52 compatible = "gpio-keys";
53 pinctrl-names = "default";
54 pinctrl-0 = <&gpio_keys_pins>;
58 gpios = <&pio 69 GPIO_ACTIVE_LOW>;
59 linux,code = <SW_LID>;
60 linux,input-type = <EV_SW>;
66 gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
67 linux,code = <KEY_POWER>;
68 debounce-interval = <30>;
73 label = "Tablet_mode";
74 gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
75 linux,code = <SW_TABLET_MODE>;
76 linux,input-type = <EV_SW>;
81 label = "Volume_down";
82 gpios = <&pio 123 GPIO_ACTIVE_LOW>;
83 linux,code = <KEY_VOLUMEDOWN>;
88 gpios = <&pio 124 GPIO_ACTIVE_LOW>;
89 linux,code = <KEY_VOLUMEUP>;
93 panel_fixed_3v3: regulator1 {
94 compatible = "regulator-fixed";
95 regulator-name = "PANEL_3V3";
96 regulator-min-microvolt = <3300000>;
97 regulator-max-microvolt = <3300000>;
100 off-on-delay-us = <500000>;
101 gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
102 pinctrl-names = "default";
103 pinctrl-0 = <&panel_fixed_pins>;
106 ps8640_fixed_1v2: regulator2 {
107 compatible = "regulator-fixed";
108 regulator-name = "PS8640_1V2";
109 regulator-min-microvolt = <1200000>;
110 regulator-max-microvolt = <1200000>;
111 regulator-enable-ramp-delay = <2000>;
114 gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
115 pinctrl-names = "default";
116 pinctrl-0 = <&ps8640_fixed_pins>;
119 sdio_fixed_3v3: fixedregulator0 {
120 compatible = "regulator-fixed";
121 regulator-name = "3V3";
122 regulator-min-microvolt = <3300000>;
123 regulator-max-microvolt = <3300000>;
124 gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
125 pinctrl-names = "default";
126 pinctrl-0 = <&sdio_fixed_3v3_pins>;
130 compatible = "mediatek,mt8173-rt5650";
131 mediatek,audio-codec = <&rt5650 &hdmi0>;
132 mediatek,platform = <&afe>;
133 pinctrl-names = "default";
134 pinctrl-0 = <&aud_i2s2>;
138 sound-dai = <&rt5650 1>;
143 compatible = "hdmi-connector";
146 ddc-i2c-bus = <&hdmiddc0>;
149 hdmi_connector_in: endpoint {
150 remote-endpoint = <&hdmi0_out>;
156 compatible = "arm,smc-wdt";
161 * Disable the original MMIO watch dog and switch to the SMC watchdog, which
162 * operates on the same MMIO.
169 domain-supply = <&da9211_vgpu_reg>;
177 proc-supply = <&mt6397_vpca15_reg>;
181 proc-supply = <&mt6397_vpca15_reg>;
185 proc-supply = <&da9211_vcpu_reg>;
186 sram-supply = <&mt6397_vsramca7_reg>;
190 proc-supply = <&da9211_vcpu_reg>;
191 sram-supply = <&mt6397_vsramca7_reg>;
195 sustainable-power = <4500>; /* milliwatts */
197 threshold: trip-point0 {
198 temperature = <60000>;
201 target: trip-point1 {
202 temperature = <65000>;
212 remote-endpoint = <&ps8640_in>;
228 hdmi0_out: endpoint {
229 remote-endpoint = <&hdmi_connector_in>;
237 mediatek,ibias = <0xc>;
243 rt5650: audio-codec@1a {
244 compatible = "realtek,rt5650";
246 avdd-supply = <&mt6397_vgp1_reg>;
247 cpvdd-supply = <&mt6397_vcama_reg>;
248 interrupt-parent = <&pio>;
249 interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&rt5650_irq>;
252 #sound-dai-cells = <1>;
253 realtek,dmic1-data-pin = <2>;
254 realtek,jd-mode = <2>;
257 ps8640: edp-bridge@8 {
258 compatible = "parade,ps8640";
260 powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
261 reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&ps8640_pins>;
264 vdd12-supply = <&ps8640_fixed_1v2>;
265 vdd33-supply = <&mt6397_vgp2_reg>;
268 #address-cells = <1>;
274 ps8640_in: endpoint {
275 remote-endpoint = <&dsi0_out>;
282 ps8640_out: endpoint {
283 remote-endpoint = <&panel_in>;
290 compatible = "edp-panel";
291 power-supply = <&panel_fixed_3v3>;
292 backlight = <&backlight>;
296 remote-endpoint = <&ps8640_out>;
305 clock-frequency = <1500000>;
309 compatible = "dlg,da9211";
311 interrupt-parent = <&pio>;
312 interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
315 da9211_vcpu_reg: BUCKA {
316 regulator-name = "VBUCKA";
317 regulator-min-microvolt = < 700000>;
318 regulator-max-microvolt = <1310000>;
319 regulator-min-microamp = <2000000>;
320 regulator-max-microamp = <4400000>;
321 regulator-ramp-delay = <10000>;
323 regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
324 DA9211_BUCK_MODE_AUTO>;
327 da9211_vgpu_reg: BUCKB {
328 regulator-name = "VBUCKB";
329 regulator-min-microvolt = < 700000>;
330 regulator-max-microvolt = <1310000>;
331 regulator-min-microamp = <2000000>;
332 regulator-max-microamp = <3000000>;
333 regulator-ramp-delay = <10000>;
343 compatible = "infineon,slb9645tt";
345 powered-while-suspended;
350 clock-frequency = <400000>;
353 touchscreen: touchscreen@10 {
354 compatible = "elan,ekth3500";
356 interrupt-parent = <&pio>;
357 interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
362 clock-frequency = <400000>;
364 pinctrl-names = "default";
365 pinctrl-0 = <&trackpad_irq>;
367 trackpad: trackpad@15 {
368 compatible = "elan,ekth3000";
369 interrupt-parent = <&pio>;
370 interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
372 vcc-supply = <&mt6397_vgp6_reg>;
383 pinctrl-names = "default", "state_uhs";
384 pinctrl-0 = <&mmc0_pins_default>;
385 pinctrl-1 = <&mmc0_pins_uhs>;
387 max-frequency = <200000000>;
392 hs400-ds-delay = <0x14015>;
393 mediatek,hs200-cmd-int-delay = <30>;
394 mediatek,hs400-cmd-int-delay = <14>;
395 mediatek,hs400-cmd-resp-sel-rising;
396 vmmc-supply = <&mt6397_vemc_3v3_reg>;
397 vqmmc-supply = <&mt6397_vio18_reg>;
398 assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
399 assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
405 pinctrl-names = "default", "state_uhs";
406 pinctrl-0 = <&mmc1_pins_default>;
407 pinctrl-1 = <&mmc1_pins_uhs>;
409 max-frequency = <200000000>;
413 cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
414 vmmc-supply = <&mt6397_vmch_reg>;
415 vqmmc-supply = <&mt6397_vmc_reg>;
420 pinctrl-names = "default", "state_uhs";
421 pinctrl-0 = <&mmc3_pins_default>;
422 pinctrl-1 = <&mmc3_pins_uhs>;
424 max-frequency = <200000000>;
428 keep-power-in-suspend;
431 vmmc-supply = <&sdio_fixed_3v3>;
432 vqmmc-supply = <&mt6397_vgp3_reg>;
436 #address-cells = <1>;
440 compatible = "marvell,sd8897-bt";
442 interrupt-parent = <&pio>;
443 interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
444 marvell,wakeup-pin = /bits/ 16 <0x0d>;
445 marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
449 compatible = "marvell,sd8897";
451 interrupt-parent = <&pio>;
452 interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
453 marvell,wakeup-pin = <3>;
459 pinctrl-names = "default";
460 pinctrl-0 = <&nor_gpio1_pins>;
463 compatible = "jedec,spi-nor";
465 spi-max-frequency = <50000000>;
470 gpio-line-names = "EC_INT_1V8",
475 * AP_FLASH_WP_L is crossystem ABI. Schematics
484 "WRAP_EVENT_S_EINT10",
506 "PANEL_LCD_POWER_EN",
517 "SOC_I2C2_1V8_SDA_400K",
518 "SOC_I2C2_1V8_SCL_400K",
519 "SOC_I2C0_1V8_SDA_400K",
520 "SOC_I2C0_1V8_SCL_400K",
567 "TOUCHSCREEN_RESET_R",
568 "PLATFORM_PROCHOT_L",
580 "SOC_I2C3_1V8_SDA_400K",
581 "SOC_I2C3_1V8_SCL_400K",
589 "PS8640_SYSRSTN_1V8",
590 "APIN_MAX98090_DOUT2",
599 "SOC_I2C1_1V8_SDA_1M",
600 "SOC_I2C1_1V8_SCL_1M",
605 "APOUT_MAX98090_DIN",
606 "APIN_MAX98090_DOUT",
607 "SOC_I2C4_1V8_SDA_400K",
608 "SOC_I2C4_1V8_SCL_400K";
612 pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
613 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
614 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
615 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
616 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
617 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
618 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
623 bl_fixed_pins: bl_fixed_pins {
625 pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
630 bt_wake_pins: bt_wake_pins {
632 pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
637 disp_pwm0_pins: disp_pwm0_pins {
639 pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
644 gpio_keys_pins: gpio_keys_pins {
646 pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
647 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
652 pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
657 hdmi_mux_pins: hdmi_mux_pins {
659 pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
665 pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
670 mmc0_pins_default: mmc0default {
672 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
673 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
674 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
675 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
676 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
677 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
678 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
679 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
680 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
685 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
690 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
695 mmc1_pins_default: mmc1default {
697 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
698 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
699 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
700 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
701 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
703 drive-strength = <MTK_DRIVE_4mA>;
704 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
708 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
710 drive-strength = <MTK_DRIVE_4mA>;
714 pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
719 mmc3_pins_default: mmc3default {
721 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
722 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
723 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
724 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
726 drive-strength = <MTK_DRIVE_8mA>;
727 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
731 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
733 drive-strength = <MTK_DRIVE_8mA>;
734 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
738 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
740 drive-strength = <MTK_DRIVE_8mA>;
744 mmc0_pins_uhs: mmc0 {
746 pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
747 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
748 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
749 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
750 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
751 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
752 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
753 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
754 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
756 drive-strength = <MTK_DRIVE_6mA>;
757 bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
761 pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
762 drive-strength = <MTK_DRIVE_6mA>;
763 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
767 pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
768 drive-strength = <MTK_DRIVE_10mA>;
769 bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
773 pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
778 mmc1_pins_uhs: mmc1 {
780 pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
781 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
782 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
783 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
784 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
786 drive-strength = <MTK_DRIVE_6mA>;
787 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
791 pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
792 drive-strength = <MTK_DRIVE_8mA>;
793 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
797 mmc3_pins_uhs: mmc3 {
799 pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
800 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
801 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
802 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
804 drive-strength = <MTK_DRIVE_8mA>;
805 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
809 pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
811 drive-strength = <MTK_DRIVE_8mA>;
812 bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
816 pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
817 drive-strength = <MTK_DRIVE_8mA>;
818 bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
822 nor_gpio1_pins: nor {
824 pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
825 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
826 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
828 drive-strength = <MTK_DRIVE_4mA>;
833 pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
834 drive-strength = <MTK_DRIVE_4mA>;
839 pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
841 drive-strength = <MTK_DRIVE_4mA>;
846 panel_backlight_en_pins: panel_backlight_en_pins {
848 pinmux = <MT8173_PIN_95_PCM_TX__FUNC_GPIO95>;
852 panel_fixed_pins: panel_fixed_pins {
854 pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
858 ps8640_pins: ps8640_pins {
860 pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
861 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
862 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
866 ps8640_fixed_pins: ps8640_fixed_pins {
868 pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
872 rt5650_irq: rt5650_irq {
874 pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
879 sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
881 pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
888 pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
893 pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
894 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
895 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
896 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
901 trackpad_irq: trackpad_irq {
903 pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
911 pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
917 wifi_wake_pins: wifi_wake_pins {
919 pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
926 pinctrl-names = "default";
927 pinctrl-0 = <&disp_pwm0_pins>;
933 compatible = "mediatek,mt6397";
934 #address-cells = <1>;
936 interrupt-parent = <&pio>;
937 interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
938 interrupt-controller;
939 #interrupt-cells = <2>;
942 compatible = "mediatek,mt6397-clk";
947 compatible = "mediatek,mt6397-pinctrl";
952 regulator: mt6397regulator {
953 compatible = "mediatek,mt6397-regulator";
955 mt6397_vpca15_reg: buck_vpca15 {
956 regulator-compatible = "buck_vpca15";
957 regulator-name = "vpca15";
958 regulator-min-microvolt = < 700000>;
959 regulator-max-microvolt = <1350000>;
960 regulator-ramp-delay = <12500>;
962 regulator-allowed-modes = <0 1>;
965 mt6397_vpca7_reg: buck_vpca7 {
966 regulator-compatible = "buck_vpca7";
967 regulator-name = "vpca7";
968 regulator-min-microvolt = < 700000>;
969 regulator-max-microvolt = <1350000>;
970 regulator-ramp-delay = <12500>;
971 regulator-enable-ramp-delay = <115>;
975 mt6397_vsramca15_reg: buck_vsramca15 {
976 regulator-compatible = "buck_vsramca15";
977 regulator-name = "vsramca15";
978 regulator-min-microvolt = < 700000>;
979 regulator-max-microvolt = <1350000>;
980 regulator-ramp-delay = <12500>;
984 mt6397_vsramca7_reg: buck_vsramca7 {
985 regulator-compatible = "buck_vsramca7";
986 regulator-name = "vsramca7";
987 regulator-min-microvolt = < 700000>;
988 regulator-max-microvolt = <1350000>;
989 regulator-ramp-delay = <12500>;
993 mt6397_vcore_reg: buck_vcore {
994 regulator-compatible = "buck_vcore";
995 regulator-name = "vcore";
996 regulator-min-microvolt = < 700000>;
997 regulator-max-microvolt = <1350000>;
998 regulator-ramp-delay = <12500>;
1002 mt6397_vgpu_reg: buck_vgpu {
1003 regulator-compatible = "buck_vgpu";
1004 regulator-name = "vgpu";
1005 regulator-min-microvolt = < 700000>;
1006 regulator-max-microvolt = <1350000>;
1007 regulator-ramp-delay = <12500>;
1008 regulator-enable-ramp-delay = <115>;
1011 mt6397_vdrm_reg: buck_vdrm {
1012 regulator-compatible = "buck_vdrm";
1013 regulator-name = "vdrm";
1014 regulator-min-microvolt = <1200000>;
1015 regulator-max-microvolt = <1400000>;
1016 regulator-ramp-delay = <12500>;
1017 regulator-always-on;
1020 mt6397_vio18_reg: buck_vio18 {
1021 regulator-compatible = "buck_vio18";
1022 regulator-name = "vio18";
1023 regulator-min-microvolt = <1620000>;
1024 regulator-max-microvolt = <1980000>;
1025 regulator-ramp-delay = <12500>;
1026 regulator-always-on;
1029 mt6397_vtcxo_reg: ldo_vtcxo {
1030 regulator-compatible = "ldo_vtcxo";
1031 regulator-name = "vtcxo";
1032 regulator-always-on;
1035 mt6397_va28_reg: ldo_va28 {
1036 regulator-compatible = "ldo_va28";
1037 regulator-name = "va28";
1040 mt6397_vcama_reg: ldo_vcama {
1041 regulator-compatible = "ldo_vcama";
1042 regulator-name = "vcama";
1043 regulator-min-microvolt = <1800000>;
1044 regulator-max-microvolt = <1800000>;
1045 regulator-enable-ramp-delay = <218>;
1048 mt6397_vio28_reg: ldo_vio28 {
1049 regulator-compatible = "ldo_vio28";
1050 regulator-name = "vio28";
1051 regulator-always-on;
1054 mt6397_vusb_reg: ldo_vusb {
1055 regulator-compatible = "ldo_vusb";
1056 regulator-name = "vusb";
1059 mt6397_vmc_reg: ldo_vmc {
1060 regulator-compatible = "ldo_vmc";
1061 regulator-name = "vmc";
1062 regulator-min-microvolt = <1800000>;
1063 regulator-max-microvolt = <3300000>;
1064 regulator-enable-ramp-delay = <218>;
1067 mt6397_vmch_reg: ldo_vmch {
1068 regulator-compatible = "ldo_vmch";
1069 regulator-name = "vmch";
1070 regulator-min-microvolt = <3000000>;
1071 regulator-max-microvolt = <3300000>;
1072 regulator-enable-ramp-delay = <218>;
1075 mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1076 regulator-compatible = "ldo_vemc3v3";
1077 regulator-name = "vemc_3v3";
1078 regulator-min-microvolt = <3000000>;
1079 regulator-max-microvolt = <3300000>;
1080 regulator-enable-ramp-delay = <218>;
1083 mt6397_vgp1_reg: ldo_vgp1 {
1084 regulator-compatible = "ldo_vgp1";
1085 regulator-name = "vcamd";
1086 regulator-min-microvolt = <1800000>;
1087 regulator-max-microvolt = <1800000>;
1088 regulator-enable-ramp-delay = <240>;
1091 mt6397_vgp2_reg: ldo_vgp2 {
1092 regulator-compatible = "ldo_vgp2";
1093 regulator-name = "vcamio";
1094 regulator-min-microvolt = <3300000>;
1095 regulator-max-microvolt = <3300000>;
1096 regulator-enable-ramp-delay = <218>;
1099 mt6397_vgp3_reg: ldo_vgp3 {
1100 regulator-compatible = "ldo_vgp3";
1101 regulator-name = "vcamaf";
1102 regulator-min-microvolt = <1800000>;
1103 regulator-max-microvolt = <1800000>;
1104 regulator-enable-ramp-delay = <218>;
1107 mt6397_vgp4_reg: ldo_vgp4 {
1108 regulator-compatible = "ldo_vgp4";
1109 regulator-name = "vgp4";
1110 regulator-min-microvolt = <1200000>;
1111 regulator-max-microvolt = <3300000>;
1112 regulator-enable-ramp-delay = <218>;
1115 mt6397_vgp5_reg: ldo_vgp5 {
1116 regulator-compatible = "ldo_vgp5";
1117 regulator-name = "vgp5";
1118 regulator-min-microvolt = <1200000>;
1119 regulator-max-microvolt = <3000000>;
1120 regulator-enable-ramp-delay = <218>;
1123 mt6397_vgp6_reg: ldo_vgp6 {
1124 regulator-compatible = "ldo_vgp6";
1125 regulator-name = "vgp6";
1126 regulator-min-microvolt = <3300000>;
1127 regulator-max-microvolt = <3300000>;
1128 regulator-enable-ramp-delay = <218>;
1129 regulator-always-on;
1132 mt6397_vibr_reg: ldo_vibr {
1133 regulator-compatible = "ldo_vibr";
1134 regulator-name = "vibr";
1135 regulator-min-microvolt = <1300000>;
1136 regulator-max-microvolt = <3300000>;
1137 regulator-enable-ramp-delay = <218>;
1142 compatible = "mediatek,mt6397-rtc";
1145 syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1146 compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1148 reg = <0 0x0000c000 0 0x0108>;
1154 pinctrl-names = "default";
1155 pinctrl-0 = <&spi_pins_a>;
1156 mediatek,pad-select = <1>;
1160 compatible = "google,cros-ec-spi";
1162 spi-max-frequency = <12000000>;
1163 interrupt-parent = <&pio>;
1164 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1165 google,cros-ec-spi-msg-delay = <500>;
1167 i2c_tunnel: i2c-tunnel0 {
1168 compatible = "google,cros-ec-i2c-tunnel";
1169 google,remote-bus = <0>;
1170 #address-cells = <1>;
1173 battery: sbs-battery@b {
1174 compatible = "sbs,sbs-battery";
1176 sbs,i2c-retry-count = <2>;
1177 sbs,poll-retry-count = <1>;
1186 vusb33-supply = <&mt6397_vusb_reg>;
1191 bank0-supply = <&mt6397_vpca15_reg>;
1192 bank1-supply = <&da9211_vcpu_reg>;
1200 pinctrl-names = "default";
1201 pinctrl-0 = <&usb_pins>;
1202 vusb33-supply = <&mt6397_vusb_reg>;
1206 #include <arm/cros-ec-keyboard.dtsi>