1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2019 Marvell International Ltd.
5 * Device tree for the CN9132-DB board.
8 #include "cn9132-db.dtsi"
11 model = "Marvell Armada CN9132-DB setup B";
14 /* Setup B has NAND flash as a boot device, while regular setup uses SPI flash.
15 * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated
16 * simultaneously. When NAND controller is enabled, SPI1 should be disabled.
19 &cp0_nand_controller {