arch/arm64/boot/dts/marvell/armada-cp11x.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright (C) 2016 Marvell Technology Group Ltd.
   4  *
   5  * Device Tree file for Marvell Armada CP11x.
   6  */
   7
   8 #include <dt-bindings/interrupt-controller/mvebu-icu.h>
   9 #include <dt-bindings/thermal/thermal.h>
  10
  11 #include "armada-common.dtsi"
  12
  13 #define CP11X_PCIEx_CONF_BASE(iface)    (CP11X_PCIEx_MEM_BASE(iface) + CP11X_PCIEx_MEM_SIZE(iface))
  14
  15 / {
  16         /*
  17          * The contents of the node are defined below, in order to
  18          * save one indentation level
  19          */
  20         CP11X_NAME: CP11X_NAME { };
  21
  22         /*
  23          * CPs only have one sensor in the thermal IC.
  24          *
  25          * The cooling maps are empty as there are no cooling devices.
  26          */
  27         thermal-zones {
  28                 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(thermal-ic) {
  29                         polling-delay-passive = <0>; /* Interrupt driven */
  30                         polling-delay = <0>; /* Interrupt driven */
  31
  32                         thermal-sensors = <&CP11X_LABEL(thermal) 0>;
  33
  34                         trips {
  35                                 CP11X_LABEL(crit): crit {
  36                                         temperature = <100000>; /* mC degrees */
  37                                         hysteresis = <2000>; /* mC degrees */
  38                                         type = "critical";
  39                                 };
  40                         };
  41
  42                         cooling-maps { };
  43                 };
  44         };
  45 };
  46
  47 &CP11X_NAME {
  48         #address-cells = <2>;
  49         #size-cells = <2>;
  50         compatible = "simple-bus";
  51         interrupt-parent = <&CP11X_LABEL(icu_nsr)>;
  52         ranges;
  53
  54         config-space@CP11X_BASE {
  55                 #address-cells = <1>;
  56                 #size-cells = <1>;
  57                 compatible = "simple-bus";
  58                 ranges = <0x0 0x0 ADDRESSIFY(CP11X_BASE) 0x2000000>;
  59
  60                 CP11X_LABEL(ethernet): ethernet@0 {
  61                         compatible = "marvell,armada-7k-pp22";
  62                         reg = <0x0 0x100000>, <0x129000 0xb000>, <0x220000 0x800>;
  63                         clocks = <&CP11X_LABEL(clk) 1 3>, <&CP11X_LABEL(clk) 1 9>,
  64                                  <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
  65                                  <&CP11X_LABEL(clk) 1 18>;
  66                         clock-names = "pp_clk", "gop_clk",
  67                                       "mg_clk", "mg_core_clk", "axi_clk";
  68                         marvell,system-controller = <&CP11X_LABEL(syscon0)>;
  69                         status = "disabled";
  70                         dma-coherent;
  71
  72                         CP11X_LABEL(eth0): eth0 {
  73                                 interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,
  74                                         <43 IRQ_TYPE_LEVEL_HIGH>,
  75                                         <47 IRQ_TYPE_LEVEL_HIGH>,
  76                                         <51 IRQ_TYPE_LEVEL_HIGH>,
  77                                         <55 IRQ_TYPE_LEVEL_HIGH>,
  78                                         <59 IRQ_TYPE_LEVEL_HIGH>,
  79                                         <63 IRQ_TYPE_LEVEL_HIGH>,
  80                                         <67 IRQ_TYPE_LEVEL_HIGH>,
  81                                         <71 IRQ_TYPE_LEVEL_HIGH>,
  82                                         <129 IRQ_TYPE_LEVEL_HIGH>;
  83                                 interrupt-names = "hif0", "hif1", "hif2",
  84                                         "hif3", "hif4", "hif5", "hif6", "hif7",
  85                                         "hif8", "link";
  86                                 port-id = <0>;
  87                                 gop-port-id = <0>;
  88                                 status = "disabled";
  89                         };
  90
  91                         CP11X_LABEL(eth1): eth1 {
  92                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH>,
  93                                         <44 IRQ_TYPE_LEVEL_HIGH>,
  94                                         <48 IRQ_TYPE_LEVEL_HIGH>,
  95                                         <52 IRQ_TYPE_LEVEL_HIGH>,
  96                                         <56 IRQ_TYPE_LEVEL_HIGH>,
  97                                         <60 IRQ_TYPE_LEVEL_HIGH>,
  98                                         <64 IRQ_TYPE_LEVEL_HIGH>,
  99                                         <68 IRQ_TYPE_LEVEL_HIGH>,
 100                                         <72 IRQ_TYPE_LEVEL_HIGH>,
 101                                         <128 IRQ_TYPE_LEVEL_HIGH>;
 102                                 interrupt-names = "hif0", "hif1", "hif2",
 103                                         "hif3", "hif4", "hif5", "hif6", "hif7",
 104                                         "hif8", "link";
 105                                 port-id = <1>;
 106                                 gop-port-id = <2>;
 107                                 status = "disabled";
 108                         };
 109
 110                         CP11X_LABEL(eth2): eth2 {
 111                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH>,
 112                                         <45 IRQ_TYPE_LEVEL_HIGH>,
 113                                         <49 IRQ_TYPE_LEVEL_HIGH>,
 114                                         <53 IRQ_TYPE_LEVEL_HIGH>,
 115                                         <57 IRQ_TYPE_LEVEL_HIGH>,
 116                                         <61 IRQ_TYPE_LEVEL_HIGH>,
 117                                         <65 IRQ_TYPE_LEVEL_HIGH>,
 118                                         <69 IRQ_TYPE_LEVEL_HIGH>,
 119                                         <73 IRQ_TYPE_LEVEL_HIGH>,
 120                                         <127 IRQ_TYPE_LEVEL_HIGH>;
 121                                 interrupt-names = "hif0", "hif1", "hif2",
 122                                         "hif3", "hif4", "hif5", "hif6", "hif7",
 123                                         "hif8", "link";
 124                                 port-id = <2>;
 125                                 gop-port-id = <3>;
 126                                 status = "disabled";
 127                         };
 128                 };
 129
 130                 CP11X_LABEL(comphy): phy@120000 {
 131                         compatible = "marvell,comphy-cp110";
 132                         reg = <0x120000 0x6000>;
 133                         marvell,system-controller = <&CP11X_LABEL(syscon0)>;
 134                         clocks = <&CP11X_LABEL(clk) 1 5>, <&CP11X_LABEL(clk) 1 6>,
 135                                  <&CP11X_LABEL(clk) 1 18>;
 136                         clock-names = "mg_clk", "mg_core_clk", "axi_clk";
 137                         #address-cells = <1>;
 138                         #size-cells = <0>;
 139
 140                         CP11X_LABEL(comphy0): phy@0 {
 141                                 reg = <0>;
 142                                 #phy-cells = <1>;
 143                         };
 144
 145                         CP11X_LABEL(comphy1): phy@1 {
 146                                 reg = <1>;
 147                                 #phy-cells = <1>;
 148                         };
 149
 150                         CP11X_LABEL(comphy2): phy@2 {
 151                                 reg = <2>;
 152                                 #phy-cells = <1>;
 153                         };
 154
 155                         CP11X_LABEL(comphy3): phy@3 {
 156                                 reg = <3>;
 157                                 #phy-cells = <1>;
 158                         };
 159
 160                         CP11X_LABEL(comphy4): phy@4 {
 161                                 reg = <4>;
 162                                 #phy-cells = <1>;
 163                         };
 164
 165                         CP11X_LABEL(comphy5): phy@5 {
 166                                 reg = <5>;
 167                                 #phy-cells = <1>;
 168                         };
 169                 };
 170
 171                 CP11X_LABEL(mdio): mdio@12a200 {
 172                         #address-cells = <1>;
 173                         #size-cells = <0>;
 174                         compatible = "marvell,orion-mdio";
 175                         reg = <0x12a200 0x10>;
 176                         clocks = <&CP11X_LABEL(clk) 1 9>, <&CP11X_LABEL(clk) 1 5>,
 177                                  <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
 178                         status = "disabled";
 179                 };
 180
 181                 CP11X_LABEL(xmdio): mdio@12a600 {
 182                         #address-cells = <1>;
 183                         #size-cells = <0>;
 184                         compatible = "marvell,xmdio";
 185                         reg = <0x12a600 0x10>;
 186                         clocks = <&CP11X_LABEL(clk) 1 5>,
 187                                  <&CP11X_LABEL(clk) 1 6>, <&CP11X_LABEL(clk) 1 18>;
 188                         status = "disabled";
 189                 };
 190
 191                 CP11X_LABEL(icu): interrupt-controller@1e0000 {
 192                         compatible = "marvell,cp110-icu";
 193                         reg = <0x1e0000 0x440>;
 194                         #address-cells = <1>;
 195                         #size-cells = <1>;
 196
 197                         CP11X_LABEL(icu_nsr): interrupt-controller@10 {
 198                                 compatible = "marvell,cp110-icu-nsr";
 199                                 reg = <0x10 0x20>;
 200                                 #interrupt-cells = <2>;
 201                                 interrupt-controller;
 202                                 msi-parent = <&gicp>;
 203                         };
 204
 205                         CP11X_LABEL(icu_sei): interrupt-controller@50 {
 206                                 compatible = "marvell,cp110-icu-sei";
 207                                 reg = <0x50 0x10>;
 208                                 #interrupt-cells = <2>;
 209                                 interrupt-controller;
 210                                 msi-parent = <&sei>;
 211                         };
 212                 };
 213
 214                 CP11X_LABEL(rtc): rtc@284000 {
 215                         compatible = "marvell,armada-8k-rtc";
 216                         reg = <0x284000 0x20>, <0x284080 0x24>;
 217                         reg-names = "rtc", "rtc-soc";
 218                         interrupts = <77 IRQ_TYPE_LEVEL_HIGH>;
 219                 };
 220
 221                 CP11X_LABEL(syscon0): system-controller@440000 {
 222                         compatible = "syscon", "simple-mfd";
 223                         reg = <0x440000 0x2000>;
 224
 225                         CP11X_LABEL(clk): clock {
 226                                 compatible = "marvell,cp110-clock";
 227                                 #clock-cells = <2>;
 228                         };
 229
 230                         CP11X_LABEL(gpio1): gpio@100 {
 231                                 compatible = "marvell,armada-8k-gpio";
 232                                 offset = <0x100>;
 233                                 ngpios = <32>;
 234                                 gpio-controller;
 235                                 #gpio-cells = <2>;
 236                                 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 0 32>;
 237                                 marvell,pwm-offset = <0x1f0>;
 238                                 #pwm-cells = <2>;
 239                                 interrupt-controller;
 240                                 interrupts = <86 IRQ_TYPE_LEVEL_HIGH>,
 241                                         <85 IRQ_TYPE_LEVEL_HIGH>,
 242                                         <84 IRQ_TYPE_LEVEL_HIGH>,
 243                                         <83 IRQ_TYPE_LEVEL_HIGH>;
 244                                 #interrupt-cells = <2>;
 245                                 clock-names = "core", "axi";
 246                                 clocks = <&CP11X_LABEL(clk) 1 21>,
 247                                          <&CP11X_LABEL(clk) 1 17>;
 248                                 status = "disabled";
 249                         };
 250
 251                         CP11X_LABEL(gpio2): gpio@140 {
 252                                 compatible = "marvell,armada-8k-gpio";
 253                                 offset = <0x140>;
 254                                 ngpios = <31>;
 255                                 gpio-controller;
 256                                 #gpio-cells = <2>;
 257                                 gpio-ranges = <&CP11X_LABEL(pinctrl) 0 32 31>;
 258                                 marvell,pwm-offset = <0x1f0>;
 259                                 #pwm-cells = <2>;
 260                                 interrupt-controller;
 261                                 interrupts = <82 IRQ_TYPE_LEVEL_HIGH>,
 262                                         <81 IRQ_TYPE_LEVEL_HIGH>,
 263                                         <80 IRQ_TYPE_LEVEL_HIGH>,
 264                                         <79 IRQ_TYPE_LEVEL_HIGH>;
 265                                 #interrupt-cells = <2>;
 266                                 clock-names = "core", "axi";
 267                                 clocks = <&CP11X_LABEL(clk) 1 21>,
 268                                          <&CP11X_LABEL(clk) 1 17>;
 269                                 status = "disabled";
 270                         };
 271                 };
 272
 273                 CP11X_LABEL(syscon1): system-controller@400000 {
 274                         compatible = "syscon", "simple-mfd";
 275                         reg = <0x400000 0x1000>;
 276                         #address-cells = <1>;
 277                         #size-cells = <1>;
 278
 279                         CP11X_LABEL(thermal): thermal-sensor@70 {
 280                                 compatible = "marvell,armada-cp110-thermal";
 281                                 reg = <0x70 0x10>;
 282                                 interrupts-extended =
 283                                         <&CP11X_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>;
 284                                 #thermal-sensor-cells = <1>;
 285                         };
 286                 };
 287
 288                 CP11X_LABEL(utmi): utmi@580000 {
 289                         compatible = "marvell,cp110-utmi-phy";
 290                         reg = <0x580000 0x2000>;
 291                         marvell,system-controller = <&CP11X_LABEL(syscon0)>;
 292                         #address-cells = <1>;
 293                         #size-cells = <0>;
 294                         status = "disabled";
 295
 296                         CP11X_LABEL(utmi0): usb-phy@0 {
 297                                 reg = <0>;
 298                                 #phy-cells = <0>;
 299                         };
 300
 301                         CP11X_LABEL(utmi1): usb-phy@1 {
 302                                 reg = <1>;
 303                                 #phy-cells = <0>;
 304                         };
 305                 };
 306
 307                 CP11X_LABEL(usb3_0): usb@500000 {
 308                         compatible = "marvell,armada-8k-xhci",
 309                         "generic-xhci";
 310                         reg = <0x500000 0x4000>;
 311                         dma-coherent;
 312                         interrupts = <106 IRQ_TYPE_LEVEL_HIGH>;
 313                         clock-names = "core", "reg";
 314                         clocks = <&CP11X_LABEL(clk) 1 22>,
 315                                  <&CP11X_LABEL(clk) 1 16>;
 316                         status = "disabled";
 317                 };
 318
 319                 CP11X_LABEL(usb3_1): usb@510000 {
 320                         compatible = "marvell,armada-8k-xhci",
 321                         "generic-xhci";
 322                         reg = <0x510000 0x4000>;
 323                         dma-coherent;
 324                         interrupts = <105 IRQ_TYPE_LEVEL_HIGH>;
 325                         clock-names = "core", "reg";
 326                         clocks = <&CP11X_LABEL(clk) 1 23>,
 327                                  <&CP11X_LABEL(clk) 1 16>;
 328                         status = "disabled";
 329                 };
 330
 331                 CP11X_LABEL(sata0): sata@540000 {
 332                         compatible = "marvell,armada-8k-ahci",
 333                         "generic-ahci";
 334                         reg = <0x540000 0x30000>;
 335                         dma-coherent;
 336                         interrupts = <107 IRQ_TYPE_LEVEL_HIGH>;
 337                         clocks = <&CP11X_LABEL(clk) 1 15>,
 338                                  <&CP11X_LABEL(clk) 1 16>;
 339                         #address-cells = <1>;
 340                         #size-cells = <0>;
 341                         status = "disabled";
 342
 343                         sata-port@0 {
 344                                 reg = <0>;
 345                         };
 346
 347                         sata-port@1 {
 348                                 reg = <1>;
 349                         };
 350                 };
 351
 352                 CP11X_LABEL(xor0): xor@6a0000 {
 353                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 354                         reg = <0x6a0000 0x1000>, <0x6b0000 0x1000>;
 355                         dma-coherent;
 356                         msi-parent = <&gic_v2m0>;
 357                         clock-names = "core", "reg";
 358                         clocks = <&CP11X_LABEL(clk) 1 8>,
 359                                  <&CP11X_LABEL(clk) 1 14>;
 360                 };
 361
 362                 CP11X_LABEL(xor1): xor@6c0000 {
 363                         compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 364                         reg = <0x6c0000 0x1000>, <0x6d0000 0x1000>;
 365                         dma-coherent;
 366                         msi-parent = <&gic_v2m0>;
 367                         clock-names = "core", "reg";
 368                         clocks = <&CP11X_LABEL(clk) 1 7>,
 369                                  <&CP11X_LABEL(clk) 1 14>;
 370                 };
 371
 372                 CP11X_LABEL(spi0): spi@700600 {
 373                         compatible = "marvell,armada-380-spi";
 374                         reg = <0x700600 0x50>;
 375                         #address-cells = <0x1>;
 376                         #size-cells = <0x0>;
 377                         clock-names = "core", "axi";
 378                         clocks = <&CP11X_LABEL(clk) 1 21>,
 379                                  <&CP11X_LABEL(clk) 1 17>;
 380                         status = "disabled";
 381                 };
 382
 383                 CP11X_LABEL(spi1): spi@700680 {
 384                         compatible = "marvell,armada-380-spi";
 385                         reg = <0x700680 0x50>;
 386                         #address-cells = <1>;
 387                         #size-cells = <0>;
 388                         clock-names = "core", "axi";
 389                         clocks = <&CP11X_LABEL(clk) 1 21>,
 390                                  <&CP11X_LABEL(clk) 1 17>;
 391                         status = "disabled";
 392                 };
 393
 394                 CP11X_LABEL(i2c0): i2c@701000 {
 395                         compatible = "marvell,mv78230-i2c";
 396                         reg = <0x701000 0x20>;
 397                         #address-cells = <1>;
 398                         #size-cells = <0>;
 399                         interrupts = <120 IRQ_TYPE_LEVEL_HIGH>;
 400                         clock-names = "core", "reg";
 401                         clocks = <&CP11X_LABEL(clk) 1 21>,
 402                                  <&CP11X_LABEL(clk) 1 17>;
 403                         status = "disabled";
 404                 };
 405
 406                 CP11X_LABEL(i2c1): i2c@701100 {
 407                         compatible = "marvell,mv78230-i2c";
 408                         reg = <0x701100 0x20>;
 409                         #address-cells = <1>;
 410                         #size-cells = <0>;
 411                         interrupts = <121 IRQ_TYPE_LEVEL_HIGH>;
 412                         clock-names = "core", "reg";
 413                         clocks = <&CP11X_LABEL(clk) 1 21>,
 414                                  <&CP11X_LABEL(clk) 1 17>;
 415                         status = "disabled";
 416                 };
 417
 418                 CP11X_LABEL(uart0): serial@702000 {
 419                         compatible = "snps,dw-apb-uart";
 420                         reg = <0x702000 0x100>;
 421                         reg-shift = <2>;
 422                         interrupts = <122 IRQ_TYPE_LEVEL_HIGH>;
 423                         reg-io-width = <1>;
 424                         clock-names = "baudclk", "apb_pclk";
 425                         clocks = <&CP11X_LABEL(clk) 1 21>,
 426                                  <&CP11X_LABEL(clk) 1 17>;
 427                         status = "disabled";
 428                 };
 429
 430                 CP11X_LABEL(uart1): serial@702100 {
 431                         compatible = "snps,dw-apb-uart";
 432                         reg = <0x702100 0x100>;
 433                         reg-shift = <2>;
 434                         interrupts = <123 IRQ_TYPE_LEVEL_HIGH>;
 435                         reg-io-width = <1>;
 436                         clock-names = "baudclk", "apb_pclk";
 437                         clocks = <&CP11X_LABEL(clk) 1 21>,
 438                                  <&CP11X_LABEL(clk) 1 17>;
 439                         status = "disabled";
 440                 };
 441
 442                 CP11X_LABEL(uart2): serial@702200 {
 443                         compatible = "snps,dw-apb-uart";
 444                         reg = <0x702200 0x100>;
 445                         reg-shift = <2>;
 446                         interrupts = <124 IRQ_TYPE_LEVEL_HIGH>;
 447                         reg-io-width = <1>;
 448                         clock-names = "baudclk", "apb_pclk";
 449                         clocks = <&CP11X_LABEL(clk) 1 21>,
 450                                  <&CP11X_LABEL(clk) 1 17>;
 451                         status = "disabled";
 452                 };
 453
 454                 CP11X_LABEL(uart3): serial@702300 {
 455                         compatible = "snps,dw-apb-uart";
 456                         reg = <0x702300 0x100>;
 457                         reg-shift = <2>;
 458                         interrupts = <125 IRQ_TYPE_LEVEL_HIGH>;
 459                         reg-io-width = <1>;
 460                         clock-names = "baudclk", "apb_pclk";
 461                         clocks = <&CP11X_LABEL(clk) 1 21>,
 462                                  <&CP11X_LABEL(clk) 1 17>;
 463                         status = "disabled";
 464                 };
 465
 466                 CP11X_LABEL(nand_controller): nand@720000 {
 467                         /*
 468                          * Due to the limitation of the pins available
 469                          * this controller is only usable on the CPM
 470                          * for A7K and on the CPS for A8K.
 471                          */
 472                         compatible = "marvell,armada-8k-nand-controller",
 473                                 "marvell,armada370-nand-controller";
 474                         reg = <0x720000 0x54>;
 475                         #address-cells = <1>;
 476                         #size-cells = <0>;
 477                         interrupts = <115 IRQ_TYPE_LEVEL_HIGH>;
 478                         clock-names = "core", "reg";
 479                         clocks = <&CP11X_LABEL(clk) 1 2>,
 480                                  <&CP11X_LABEL(clk) 1 17>;
 481                         marvell,system-controller = <&CP11X_LABEL(syscon0)>;
 482                         status = "disabled";
 483                 };
 484
 485                 CP11X_LABEL(trng): trng@760000 {
 486                         compatible = "marvell,armada-8k-rng",
 487                         "inside-secure,safexcel-eip76";
 488                         reg = <0x760000 0x7d>;
 489                         interrupts = <95 IRQ_TYPE_LEVEL_HIGH>;
 490                         clock-names = "core", "reg";
 491                         clocks = <&CP11X_LABEL(clk) 1 25>,
 492                                  <&CP11X_LABEL(clk) 1 17>;
 493                         status = "okay";
 494                 };
 495
 496                 CP11X_LABEL(sdhci0): mmc@780000 {
 497                         compatible = "marvell,armada-cp110-sdhci";
 498                         reg = <0x780000 0x300>;
 499                         interrupts = <27 IRQ_TYPE_LEVEL_HIGH>;
 500                         clock-names = "core", "axi";
 501                         clocks = <&CP11X_LABEL(clk) 1 4>, <&CP11X_LABEL(clk) 1 18>;
 502                         dma-coherent;
 503                         status = "disabled";
 504                 };
 505
 506                 CP11X_LABEL(crypto): crypto@800000 {
 507                         compatible = "inside-secure,safexcel-eip197b";
 508                         reg = <0x800000 0x200000>;
 509                         interrupts = <88 IRQ_TYPE_LEVEL_HIGH>,
 510                                 <89 IRQ_TYPE_LEVEL_HIGH>,
 511                                 <90 IRQ_TYPE_LEVEL_HIGH>,
 512                                 <91 IRQ_TYPE_LEVEL_HIGH>,
 513                                 <92 IRQ_TYPE_LEVEL_HIGH>,
 514                                 <87 IRQ_TYPE_LEVEL_HIGH>;
 515                         interrupt-names = "ring0", "ring1", "ring2", "ring3",
 516                                           "eip", "mem";
 517                         clock-names = "core", "reg";
 518                         clocks = <&CP11X_LABEL(clk) 1 26>,
 519                                  <&CP11X_LABEL(clk) 1 17>;
 520                         dma-coherent;
 521                 };
 522         };
 523
 524         CP11X_LABEL(pcie0): pcie@CP11X_PCIE0_BASE {
 525                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 526                 reg = <0 ADDRESSIFY(CP11X_PCIE0_BASE) 0 0x10000>,
 527                       <0 CP11X_PCIEx_CONF_BASE(0) 0 0x80000>;
 528                 reg-names = "ctrl", "config";
 529                 #address-cells = <3>;
 530                 #size-cells = <2>;
 531                 #interrupt-cells = <1>;
 532                 device_type = "pci";
 533                 dma-coherent;
 534                 msi-parent = <&gic_v2m0>;
 535
 536                 bus-range = <0 0xff>;
 537                 /* non-prefetchable memory */
 538                 ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(0) 0  CP11X_PCIEx_MEM_BASE(0) 0 CP11X_PCIEx_MEM_SIZE(0)>;
 539                 interrupt-map-mask = <0 0 0 0>;
 540                 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
 541                 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
 542                 num-lanes = <1>;
 543                 clock-names = "core", "reg";
 544                 clocks = <&CP11X_LABEL(clk) 1 13>, <&CP11X_LABEL(clk) 1 14>;
 545                 status = "disabled";
 546         };
 547
 548         CP11X_LABEL(pcie1): pcie@CP11X_PCIE1_BASE {
 549                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 550                 reg = <0 ADDRESSIFY(CP11X_PCIE1_BASE) 0 0x10000>,
 551                       <0 CP11X_PCIEx_CONF_BASE(1) 0 0x80000>;
 552                 reg-names = "ctrl", "config";
 553                 #address-cells = <3>;
 554                 #size-cells = <2>;
 555                 #interrupt-cells = <1>;
 556                 device_type = "pci";
 557                 dma-coherent;
 558                 msi-parent = <&gic_v2m0>;
 559
 560                 bus-range = <0 0xff>;
 561                 /* non-prefetchable memory */
 562                 ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0  CP11X_PCIEx_MEM_BASE(1) 0 CP11X_PCIEx_MEM_SIZE(1)>;
 563                 interrupt-map-mask = <0 0 0 0>;
 564                 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
 565                 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
 566
 567                 num-lanes = <1>;
 568                 clock-names = "core", "reg";
 569                 clocks = <&CP11X_LABEL(clk) 1 11>, <&CP11X_LABEL(clk) 1 14>;
 570                 status = "disabled";
 571         };
 572
 573         CP11X_LABEL(pcie2): pcie@CP11X_PCIE2_BASE {
 574                 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
 575                 reg = <0 ADDRESSIFY(CP11X_PCIE2_BASE) 0 0x10000>,
 576                       <0 CP11X_PCIEx_CONF_BASE(2) 0 0x80000>;
 577                 reg-names = "ctrl", "config";
 578                 #address-cells = <3>;
 579                 #size-cells = <2>;
 580                 #interrupt-cells = <1>;
 581                 device_type = "pci";
 582                 dma-coherent;
 583                 msi-parent = <&gic_v2m0>;
 584
 585                 bus-range = <0 0xff>;
 586                 /* non-prefetchable memory */
 587                 ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(2) 0  CP11X_PCIEx_MEM_BASE(2) 0 CP11X_PCIEx_MEM_SIZE(2)>;
 588                 interrupt-map-mask = <0 0 0 0>;
 589                 interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
 590                 interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
 591
 592                 num-lanes = <1>;
 593                 clock-names = "core", "reg";
 594                 clocks = <&CP11X_LABEL(clk) 1 12>, <&CP11X_LABEL(clk) 1 14>;
 595                 status = "disabled";
 596         };
 597 };