1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2016 Marvell Technology Group Ltd.
5 * Device Tree file for Marvell Armada AP806.
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 model = "Marvell Armada AP806";
14 compatible = "marvell,armada-ap806";
26 compatible = "arm,psci-0.2";
36 * This area matches the mapping done with a
37 * mainline U-Boot, and should be updated by the
42 reg = <0x0 0x4000000 0x0 0x200000>;
50 compatible = "simple-bus";
51 interrupt-parent = <&gic>;
54 config-space@f0000000 {
57 compatible = "simple-bus";
58 ranges = <0x0 0x0 0xf0000000 0x1000000>;
60 gic: interrupt-controller@210000 {
61 compatible = "arm,gic-400";
62 #interrupt-cells = <3>;
67 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
68 reg = <0x210000 0x10000>,
73 gic_v2m0: v2m@280000 {
74 compatible = "arm,gic-v2m-frame";
76 reg = <0x280000 0x1000>;
77 arm,msi-base-spi = <160>;
78 arm,msi-num-spis = <32>;
80 gic_v2m1: v2m@290000 {
81 compatible = "arm,gic-v2m-frame";
83 reg = <0x290000 0x1000>;
84 arm,msi-base-spi = <192>;
85 arm,msi-num-spis = <32>;
87 gic_v2m2: v2m@2a0000 {
88 compatible = "arm,gic-v2m-frame";
90 reg = <0x2a0000 0x1000>;
91 arm,msi-base-spi = <224>;
92 arm,msi-num-spis = <32>;
94 gic_v2m3: v2m@2b0000 {
95 compatible = "arm,gic-v2m-frame";
97 reg = <0x2b0000 0x1000>;
98 arm,msi-base-spi = <256>;
99 arm,msi-num-spis = <32>;
104 compatible = "arm,armv8-timer";
105 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
106 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
107 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
108 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
112 compatible = "arm,cortex-a72-pmu";
113 interrupt-parent = <&pic>;
118 compatible = "marvell,odmi-controller";
119 interrupt-controller;
121 marvell,odmi-frames = <4>;
122 reg = <0x300000 0x4000>,
126 marvell,spi-base = <128>, <136>, <144>, <152>;
130 compatible = "marvell,ap806-gicp";
131 reg = <0x3f0040 0x10>;
132 marvell,spi-ranges = <64 64>, <288 64>;
136 pic: interrupt-controller@3f0100 {
137 compatible = "marvell,armada-8k-pic";
138 reg = <0x3f0100 0x10>;
139 #interrupt-cells = <1>;
140 interrupt-controller;
141 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
145 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
146 reg = <0x400000 0x1000>,
148 msi-parent = <&gic_v2m0>;
149 clocks = <&ap_clk 3>;
154 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
155 reg = <0x420000 0x1000>,
157 msi-parent = <&gic_v2m0>;
158 clocks = <&ap_clk 3>;
163 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
164 reg = <0x440000 0x1000>,
166 msi-parent = <&gic_v2m0>;
167 clocks = <&ap_clk 3>;
172 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
173 reg = <0x460000 0x1000>,
175 msi-parent = <&gic_v2m0>;
176 clocks = <&ap_clk 3>;
181 compatible = "marvell,armada-380-spi";
182 reg = <0x510600 0x50>;
183 #address-cells = <1>;
185 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
186 clocks = <&ap_clk 3>;
191 compatible = "marvell,mv78230-i2c";
192 reg = <0x511000 0x20>;
193 #address-cells = <1>;
195 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
197 clocks = <&ap_clk 3>;
201 uart0: serial@512000 {
202 compatible = "snps,dw-apb-uart";
203 reg = <0x512000 0x100>;
205 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
207 clocks = <&ap_clk 3>;
211 uart1: serial@512100 {
212 compatible = "snps,dw-apb-uart";
213 reg = <0x512100 0x100>;
215 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
217 clocks = <&ap_clk 3>;
222 watchdog: watchdog@610000 {
223 compatible = "arm,sbsa-gwdt";
224 reg = <0x610000 0x1000>, <0x600000 0x1000>;
225 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
228 ap_sdhci0: sdhci@6e0000 {
229 compatible = "marvell,armada-ap806-sdhci";
230 reg = <0x6e0000 0x300>;
231 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
232 clock-names = "core";
233 clocks = <&ap_clk 4>;
235 marvell,xenon-phy-slow-mode;
239 ap_syscon: system-controller@6f4000 {
240 compatible = "syscon", "simple-mfd";
241 reg = <0x6f4000 0x2000>;
244 compatible = "marvell,ap806-clock";
248 ap_pinctrl: pinctrl {
249 compatible = "marvell,ap806-pinctrl";
251 uart0_pins: uart0-pins {
252 marvell,pins = "mpp11", "mpp19";
253 marvell,function = "uart0";
258 compatible = "marvell,armada-8k-gpio";
263 gpio-ranges = <&ap_pinctrl 0 0 20>;
267 ap_thermal: thermal@6f808c {
268 compatible = "marvell,armada-ap806-thermal";
269 reg = <0x6f808c 0x4>,