arch/arm64/boot/dts/marvell/armada-ap806.dtsi

   1 /*
   2  * Copyright (C) 2016 Marvell Technology Group Ltd.
   3  *
   4  * This file is dual-licensed: you can use it either under the terms
   5  * of the GPLv2 or the X11 license, at your option. Note that this dual
   6  * licensing only applies to this file, and not this project as a
   7  * whole.
   8  *
   9  *  a) This library is free software; you can redistribute it and/or
  10  *     modify it under the terms of the GNU General Public License as
  11  *     published by the Free Software Foundation; either version 2 of the
  12  *     License, or (at your option) any later version.
  13  *
  14  *     This library is distributed in the hope that it will be useful,
  15  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  *     GNU General Public License for more details.
  18  *
  19  * Or, alternatively,
  20  *
  21  *  b) Permission is hereby granted, free of charge, to any person
  22  *     obtaining a copy of this software and associated documentation
  23  *     files (the "Software"), to deal in the Software without
  24  *     restriction, including without limitation the rights to use,
  25  *     copy, modify, merge, publish, distribute, sublicense, and/or
  26  *     sell copies of the Software, and to permit persons to whom the
  27  *     Software is furnished to do so, subject to the following
  28  *     conditions:
  29  *
  30  *     The above copyright notice and this permission notice shall be
  31  *     included in all copies or substantial portions of the Software.
  32  *
  33  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  34  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  35  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  36  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  37  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  38  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  39  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  40  *     OTHER DEALINGS IN THE SOFTWARE.
  41  */
  42
  43 /*
  44  * Device Tree file for Marvell Armada AP806.
  45  */
  46
  47 #include <dt-bindings/interrupt-controller/arm-gic.h>
  48
  49 /dts-v1/;
  50
  51 / {
  52         model = "Marvell Armada AP806";
  53         compatible = "marvell,armada-ap806";
  54         #address-cells = <2>;
  55         #size-cells = <2>;
  56
  57         aliases {
  58                 serial0 = &uart0;
  59                 serial1 = &uart1;
  60                 gpio0 = &ap_gpio;
  61         };
  62
  63         psci {
  64                 compatible = "arm,psci-0.2";
  65                 method = "smc";
  66         };
  67
  68         reserved-memory {
  69                 #address-cells = <2>;
  70                 #size-cells = <2>;
  71                 ranges;
  72
  73                 /*
  74                  * This area matches the mapping done with a
  75                  * mainline U-Boot, and should be updated by the
  76                  * bootloader.
  77                  */
  78
  79                 psci-area@4000000 {
  80                         reg = <0x0 0x4000000 0x0 0x200000>;
  81                         no-map;
  82                 };
  83         };
  84
  85         ap806 {
  86                 #address-cells = <2>;
  87                 #size-cells = <2>;
  88                 compatible = "simple-bus";
  89                 interrupt-parent = <&gic>;
  90                 ranges;
  91
  92                 config-space@f0000000 {
  93                         #address-cells = <1>;
  94                         #size-cells = <1>;
  95                         compatible = "simple-bus";
  96                         ranges = <0x0 0x0 0xf0000000 0x1000000>;
  97
  98                         gic: interrupt-controller@210000 {
  99                                 compatible = "arm,gic-400";
 100                                 #interrupt-cells = <3>;
 101                                 #address-cells = <1>;
 102                                 #size-cells = <1>;
 103                                 ranges;
 104                                 interrupt-controller;
 105                                 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 106                                 reg = <0x210000 0x10000>,
 107                                       <0x220000 0x20000>,
 108                                       <0x240000 0x20000>,
 109                                       <0x260000 0x20000>;
 110
 111                                 gic_v2m0: v2m@280000 {
 112                                         compatible = "arm,gic-v2m-frame";
 113                                         msi-controller;
 114                                         reg = <0x280000 0x1000>;
 115                                         arm,msi-base-spi = <160>;
 116                                         arm,msi-num-spis = <32>;
 117                                 };
 118                                 gic_v2m1: v2m@290000 {
 119                                         compatible = "arm,gic-v2m-frame";
 120                                         msi-controller;
 121                                         reg = <0x290000 0x1000>;
 122                                         arm,msi-base-spi = <192>;
 123                                         arm,msi-num-spis = <32>;
 124                                 };
 125                                 gic_v2m2: v2m@2a0000 {
 126                                         compatible = "arm,gic-v2m-frame";
 127                                         msi-controller;
 128                                         reg = <0x2a0000 0x1000>;
 129                                         arm,msi-base-spi = <224>;
 130                                         arm,msi-num-spis = <32>;
 131                                 };
 132                                 gic_v2m3: v2m@2b0000 {
 133                                         compatible = "arm,gic-v2m-frame";
 134                                         msi-controller;
 135                                         reg = <0x2b0000 0x1000>;
 136                                         arm,msi-base-spi = <256>;
 137                                         arm,msi-num-spis = <32>;
 138                                 };
 139                         };
 140
 141                         timer {
 142                                 compatible = "arm,armv8-timer";
 143                                 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 144                                              <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 145                                              <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 146                                              <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 147                         };
 148
 149                         pmu {
 150                                 compatible = "arm,cortex-a72-pmu";
 151                                 interrupt-parent = <&pic>;
 152                                 interrupts = <17>;
 153                         };
 154
 155                         odmi: odmi@300000 {
 156                                 compatible = "marvell,odmi-controller";
 157                                 interrupt-controller;
 158                                 msi-controller;
 159                                 marvell,odmi-frames = <4>;
 160                                 reg = <0x300000 0x4000>,
 161                                       <0x304000 0x4000>,
 162                                       <0x308000 0x4000>,
 163                                       <0x30C000 0x4000>;
 164                                 marvell,spi-base = <128>, <136>, <144>, <152>;
 165                         };
 166
 167                         gicp: gicp@3f0040 {
 168                                 compatible = "marvell,ap806-gicp";
 169                                 reg = <0x3f0040 0x10>;
 170                                 marvell,spi-ranges = <64 64>, <288 64>;
 171                                 msi-controller;
 172                         };
 173
 174                         pic: interrupt-controller@3f0100 {
 175                                 compatible = "marvell,armada-8k-pic";
 176                                 reg = <0x3f0100 0x10>;
 177                                 #interrupt-cells = <1>;
 178                                 interrupt-controller;
 179                                 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
 180                         };
 181
 182                         xor@400000 {
 183                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 184                                 reg = <0x400000 0x1000>,
 185                                       <0x410000 0x1000>;
 186                                 msi-parent = <&gic_v2m0>;
 187                                 clocks = <&ap_clk 3>;
 188                                 dma-coherent;
 189                         };
 190
 191                         xor@420000 {
 192                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 193                                 reg = <0x420000 0x1000>,
 194                                       <0x430000 0x1000>;
 195                                 msi-parent = <&gic_v2m0>;
 196                                 clocks = <&ap_clk 3>;
 197                                 dma-coherent;
 198                         };
 199
 200                         xor@440000 {
 201                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 202                                 reg = <0x440000 0x1000>,
 203                                       <0x450000 0x1000>;
 204                                 msi-parent = <&gic_v2m0>;
 205                                 clocks = <&ap_clk 3>;
 206                                 dma-coherent;
 207                         };
 208
 209                         xor@460000 {
 210                                 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
 211                                 reg = <0x460000 0x1000>,
 212                                       <0x470000 0x1000>;
 213                                 msi-parent = <&gic_v2m0>;
 214                                 clocks = <&ap_clk 3>;
 215                                 dma-coherent;
 216                         };
 217
 218                         spi0: spi@510600 {
 219                                 compatible = "marvell,armada-380-spi";
 220                                 reg = <0x510600 0x50>;
 221                                 #address-cells = <1>;
 222                                 #size-cells = <0>;
 223                                 cell-index = <0>;
 224                                 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 225                                 clocks = <&ap_clk 3>;
 226                                 status = "disabled";
 227                         };
 228
 229                         i2c0: i2c@511000 {
 230                                 compatible = "marvell,mv78230-i2c";
 231                                 reg = <0x511000 0x20>;
 232                                 #address-cells = <1>;
 233                                 #size-cells = <0>;
 234                                 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 235                                 timeout-ms = <1000>;
 236                                 clocks = <&ap_clk 3>;
 237                                 status = "disabled";
 238                         };
 239
 240                         uart0: serial@512000 {
 241                                 compatible = "snps,dw-apb-uart";
 242                                 reg = <0x512000 0x100>;
 243                                 reg-shift = <2>;
 244                                 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 245                                 reg-io-width = <1>;
 246                                 clocks = <&ap_clk 3>;
 247                                 status = "disabled";
 248                         };
 249
 250                         uart1: serial@512100 {
 251                                 compatible = "snps,dw-apb-uart";
 252                                 reg = <0x512100 0x100>;
 253                                 reg-shift = <2>;
 254                                 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 255                                 reg-io-width = <1>;
 256                                 clocks = <&ap_clk 3>;
 257                                 status = "disabled";
 258
 259                         };
 260
 261                         ap_sdhci0: sdhci@6e0000 {
 262                                 compatible = "marvell,armada-ap806-sdhci";
 263                                 reg = <0x6e0000 0x300>;
 264                                 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 265                                 clock-names = "core";
 266                                 clocks = <&ap_clk 4>;
 267                                 dma-coherent;
 268                                 marvell,xenon-phy-slow-mode;
 269                                 status = "disabled";
 270                         };
 271
 272                         ap_syscon: system-controller@6f4000 {
 273                                 compatible = "syscon", "simple-mfd";
 274                                 reg = <0x6f4000 0x2000>;
 275
 276                                 ap_clk: clock {
 277                                         compatible = "marvell,ap806-clock";
 278                                         #clock-cells = <1>;
 279                                 };
 280
 281                                 ap_pinctrl: pinctrl {
 282                                         compatible = "marvell,ap806-pinctrl";
 283                                 };
 284
 285                                 ap_gpio: gpio@1040 {
 286                                         compatible = "marvell,armada-8k-gpio";
 287                                         offset = <0x1040>;
 288                                         ngpios = <20>;
 289                                         gpio-controller;
 290                                         #gpio-cells = <2>;
 291                                         gpio-ranges = <&ap_pinctrl 0 0 20>;
 292                                 };
 293                         };
 294                 };
 295         };
 296 };