arch/arm64/boot/dts/marvell/armada-37xx.dtsi

   1 /*
   2  * Device Tree Include file for Marvell Armada 37xx family of SoCs.
   3  *
   4  * Copyright (C) 2016 Marvell
   5  *
   6  * Gregory CLEMENT <gregory.clement@free-electrons.com>
   7  *
   8  * This file is dual-licensed: you can use it either under the terms
   9  * of the GPL or the X11 license, at your option. Note that this dual
  10  * licensing only applies to this file, and not this project as a
  11  * whole.
  12  *
  13  *  a) This file is free software; you can redistribute it and/or
  14  *     modify it under the terms of the GNU General Public License as
  15  *     published by the Free Software Foundation; either version 2 of the
  16  *     License, or (at your option) any later version.
  17  *
  18  *     This file is distributed in the hope that it will be useful,
  19  *     but WITHOUT ANY WARRANTY; without even the implied warranty of
  20  *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21  *     GNU General Public License for more details.
  22  *
  23  * Or, alternatively,
  24  *
  25  *  b) Permission is hereby granted, free of charge, to any person
  26  *     obtaining a copy of this software and associated documentation
  27  *     files (the "Software"), to deal in the Software without
  28  *     restriction, including without limitation the rights to use,
  29  *     copy, modify, merge, publish, distribute, sublicense, and/or
  30  *     sell copies of the Software, and to permit persons to whom the
  31  *     Software is furnished to do so, subject to the following
  32  *     conditions:
  33  *
  34  *     The above copyright notice and this permission notice shall be
  35  *     included in all copies or substantial portions of the Software.
  36  *
  37  *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  38  *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  39  *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  40  *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
  41  *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  42  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  43  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  44  *     OTHER DEALINGS IN THE SOFTWARE.
  45  */
  46
  47 #include <dt-bindings/interrupt-controller/arm-gic.h>
  48
  49 / {
  50         model = "Marvell Armada 37xx SoC";
  51         compatible = "marvell,armada3700";
  52         interrupt-parent = <&gic>;
  53         #address-cells = <2>;
  54         #size-cells = <2>;
  55
  56         aliases {
  57                 serial0 = &uart0;
  58         };
  59
  60         cpus {
  61                 #address-cells = <1>;
  62                 #size-cells = <0>;
  63                 cpu@0 {
  64                         device_type = "cpu";
  65                         compatible = "arm,cortex-a53", "arm,armv8";
  66                         reg = <0>;
  67                         enable-method = "psci";
  68                 };
  69         };
  70
  71         psci {
  72                 compatible = "arm,psci-0.2";
  73                 method = "smc";
  74         };
  75
  76         timer {
  77                 compatible = "arm,armv8-timer";
  78                 interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>,
  79                              <GIC_PPI 14 IRQ_TYPE_LEVEL_HIGH>,
  80                              <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>,
  81                              <GIC_PPI 10 IRQ_TYPE_LEVEL_HIGH>;
  82         };
  83
  84         pmu {
  85                 compatible = "arm,armv8-pmuv3";
  86                 interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
  87         };
  88
  89         soc {
  90                 compatible = "simple-bus";
  91                 #address-cells = <2>;
  92                 #size-cells = <2>;
  93                 ranges;
  94
  95                 internal-regs@d0000000 {
  96                         #address-cells = <1>;
  97                         #size-cells = <1>;
  98                         compatible = "simple-bus";
  99                         /* 32M internal register @ 0xd000_0000 */
 100                         ranges = <0x0 0x0 0xd0000000 0x2000000>;
 101
 102                         spi0: spi@10600 {
 103                                 compatible = "marvell,armada-3700-spi";
 104                                 #address-cells = <1>;
 105                                 #size-cells = <0>;
 106                                 reg = <0x10600 0xA00>;
 107                                 clocks = <&nb_periph_clk 7>;
 108                                 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
 109                                 num-cs = <4>;
 110                                 status = "disabled";
 111                         };
 112
 113                         i2c0: i2c@11000 {
 114                                 compatible = "marvell,armada-3700-i2c";
 115                                 reg = <0x11000 0x24>;
 116                                 #address-cells = <1>;
 117                                 #size-cells = <0>;
 118                                 clocks = <&nb_periph_clk 10>;
 119                                 interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
 120                                 mrvl,i2c-fast-mode;
 121                                 status = "disabled";
 122                         };
 123
 124                         i2c1: i2c@11080 {
 125                                 compatible = "marvell,armada-3700-i2c";
 126                                 reg = <0x11080 0x24>;
 127                                 #address-cells = <1>;
 128                                 #size-cells = <0>;
 129                                 clocks = <&nb_periph_clk 9>;
 130                                 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
 131                                 mrvl,i2c-fast-mode;
 132                                 status = "disabled";
 133                         };
 134
 135                         uart0: serial@12000 {
 136                                 compatible = "marvell,armada-3700-uart";
 137                                 reg = <0x12000 0x200>;
 138                                 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 139                                 status = "disabled";
 140                         };
 141
 142                         nb_periph_clk: nb-periph-clk@13000 {
 143                                 compatible = "marvell,armada-3700-periph-clock-nb";
 144                                 reg = <0x13000 0x100>;
 145                                 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
 146                                 <&tbg 3>, <&xtalclk>;
 147                                 #clock-cells = <1>;
 148                         };
 149
 150                         sb_periph_clk: sb-periph-clk@18000 {
 151                                 compatible = "marvell,armada-3700-periph-clock-sb";
 152                                 reg = <0x18000 0x100>;
 153                                 clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>,
 154                                 <&tbg 3>, <&xtalclk>;
 155                                 #clock-cells = <1>;
 156                         };
 157
 158                         tbg: tbg@13200 {
 159                                 compatible = "marvell,armada-3700-tbg-clock";
 160                                 reg = <0x13200 0x100>;
 161                                 clocks = <&xtalclk>;
 162                                 #clock-cells = <1>;
 163                         };
 164
 165                         pinctrl_nb: pinctrl@13800 {
 166                                 compatible = "marvell,armada3710-nb-pinctrl",
 167                                              "syscon", "simple-mfd";
 168                                 reg = <0x13800 0x100>, <0x13C00 0x20>;
 169                                 gpionb: gpio {
 170                                         #gpio-cells = <2>;
 171                                         gpio-ranges = <&pinctrl_nb 0 0 36>;
 172                                         gpio-controller;
 173                                         interrupts =
 174                                         <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 175                                         <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 176                                         <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 177                                         <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 178                                         <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 179                                         <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 180                                         <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 181                                         <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 182                                         <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
 183                                         <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
 184                                         <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>,
 185                                         <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 186
 187                                 };
 188
 189                                 xtalclk: xtal-clk {
 190                                         compatible = "marvell,armada-3700-xtal-clock";
 191                                         clock-output-names = "xtal";
 192                                         #clock-cells = <0>;
 193                                 };
 194
 195                                 spi_quad_pins: spi-quad-pins {
 196                                         groups = "spi_quad";
 197                                         function = "spi";
 198                                 };
 199
 200                                 i2c1_pins: i2c1-pins {
 201                                         groups = "i2c1";
 202                                         function = "i2c";
 203                                 };
 204
 205                                 i2c2_pins: i2c2-pins {
 206                                         groups = "i2c2";
 207                                         function = "i2c";
 208                                 };
 209
 210                                 uart1_pins: uart1-pins {
 211                                         groups = "uart1";
 212                                         function = "uart";
 213                                 };
 214
 215                                 uart2_pins: uart2-pins {
 216                                         groups = "uart2";
 217                                         function = "uart";
 218                                 };
 219                         };
 220
 221                         pinctrl_sb: pinctrl@18800 {
 222                                 compatible = "marvell,armada3710-sb-pinctrl",
 223                                              "syscon", "simple-mfd";
 224                                 reg = <0x18800 0x100>, <0x18C00 0x20>;
 225                                 gpiosb: gpio {
 226                                         #gpio-cells = <2>;
 227                                         gpio-ranges = <&pinctrl_sb 0 0 30>;
 228                                         gpio-controller;
 229                                         interrupts =
 230                                         <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
 231                                         <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
 232                                         <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,
 233                                         <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
 234                                         <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
 235                                 };
 236
 237                                 rgmii_pins: mii-pins {
 238                                         groups = "rgmii";
 239                                         function = "mii";
 240                                 };
 241
 242                         };
 243
 244                         eth0: ethernet@30000 {
 245                                    compatible = "marvell,armada-3700-neta";
 246                                    reg = <0x30000 0x4000>;
 247                                    interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 248                                    clocks = <&sb_periph_clk 8>;
 249                                    status = "disabled";
 250                         };
 251
 252                         mdio: mdio@32004 {
 253                                 #address-cells = <1>;
 254                                 #size-cells = <0>;
 255                                 compatible = "marvell,orion-mdio";
 256                                 reg = <0x32004 0x4>;
 257                         };
 258
 259                         eth1: ethernet@40000 {
 260                                 compatible = "marvell,armada-3700-neta";
 261                                 reg = <0x40000 0x4000>;
 262                                 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 263                                 clocks = <&sb_periph_clk 7>;
 264                                 status = "disabled";
 265                         };
 266
 267                         usb3: usb@58000 {
 268                                 compatible = "marvell,armada3700-xhci",
 269                                 "generic-xhci";
 270                                 reg = <0x58000 0x4000>;
 271                                 interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
 272                                 clocks = <&sb_periph_clk 12>;
 273                                 status = "disabled";
 274                         };
 275
 276                         usb2: usb@5e000 {
 277                                 compatible = "marvell,armada-3700-ehci";
 278                                 reg = <0x5e000 0x2000>;
 279                                 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 280                                 status = "disabled";
 281                         };
 282
 283                         xor@60900 {
 284                                 compatible = "marvell,armada-3700-xor";
 285                                 reg = <0x60900 0x100>,
 286                                       <0x60b00 0x100>;
 287
 288                                 xor10 {
 289                                         interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
 290                                 };
 291                                 xor11 {
 292                                         interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
 293                                 };
 294                         };
 295
 296                         sdhci1: sdhci@d0000 {
 297                                 compatible = "marvell,armada-3700-sdhci",
 298                                              "marvell,sdhci-xenon";
 299                                 reg = <0xd0000 0x300>,
 300                                       <0x1e808 0x4>;
 301                                 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
 302                                 clocks = <&nb_periph_clk 0>;
 303                                 clock-names = "core";
 304                                 status = "disabled";
 305                         };
 306
 307                         sdhci0: sdhci@d8000 {
 308                                 compatible = "marvell,armada-3700-sdhci",
 309                                              "marvell,sdhci-xenon";
 310                                 reg = <0xd8000 0x300>,
 311                                       <0x17808 0x4>;
 312                                 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
 313                                 clocks = <&nb_periph_clk 0>;
 314                                 clock-names = "core";
 315                                 status = "disabled";
 316                         };
 317
 318                         sata: sata@e0000 {
 319                                 compatible = "marvell,armada-3700-ahci";
 320                                 reg = <0xe0000 0x2000>;
 321                                 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
 322                                 status = "disabled";
 323                         };
 324
 325                         gic: interrupt-controller@1d00000 {
 326                                 compatible = "arm,gic-v3";
 327                                 #interrupt-cells = <3>;
 328                                 interrupt-controller;
 329                                 reg = <0x1d00000 0x10000>, /* GICD */
 330                                       <0x1d40000 0x40000>, /* GICR */
 331                                       <0x1d80000 0x2000>,  /* GICC */
 332                                       <0x1d90000 0x2000>,  /* GICH */
 333                                       <0x1da0000 0x20000>; /* GICV */
 334                                 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 335                         };
 336                 };
 337
 338                 pcie0: pcie@d0070000 {
 339                         compatible = "marvell,armada-3700-pcie";
 340                         device_type = "pci";
 341                         status = "disabled";
 342                         reg = <0 0xd0070000 0 0x20000>;
 343                         #address-cells = <3>;
 344                         #size-cells = <2>;
 345                         bus-range = <0x00 0xff>;
 346                         interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
 347                         #interrupt-cells = <1>;
 348                         msi-parent = <&pcie0>;
 349                         msi-controller;
 350                         /*
 351                          * The 128 MiB address range [0xe8000000-0xf0000000] is
 352                          * dedicated for PCIe and can be assigned to 8 windows
 353                          * with size a power of two. Use one 64 KiB window for
 354                          * IO at the end and the remaining seven windows
 355                          * (totaling 127 MiB) for MEM.
 356                          */
 357                         ranges = <0x82000000 0 0xe8000000   0 0xe8000000   0 0x07f00000   /* Port 0 MEM */
 358                                   0x81000000 0 0xefff0000   0 0xefff0000   0 0x00010000>; /* Port 0 IO */
 359                         interrupt-map-mask = <0 0 0 7>;
 360                         interrupt-map = <0 0 0 1 &pcie_intc 0>,
 361                                         <0 0 0 2 &pcie_intc 1>,
 362                                         <0 0 0 3 &pcie_intc 2>,
 363                                         <0 0 0 4 &pcie_intc 3>;
 364                         pcie_intc: interrupt-controller {
 365                                 interrupt-controller;
 366                                 #interrupt-cells = <1>;
 367                         };
 368                 };
 369         };
 370 };