arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree file for Globalscale Marvell ESPRESSOBin Board
   4  * Copyright (C) 2016 Marvell
   5  *
   6  * Romain Perier <romain.perier@free-electrons.com>
   7  *
   8  */
   9 /*
  10  * Schematic available at http://espressobin.net/wp-content/uploads/2017/08/ESPRESSObin_V5_Schematics.pdf
  11  */
  12
  13 /dts-v1/;
  14
  15 #include <dt-bindings/gpio/gpio.h>
  16 #include "armada-372x.dtsi"
  17
  18 / {
  19         model = "Globalscale Marvell ESPRESSOBin Board";
  20         compatible = "globalscale,espressobin", "marvell,armada3720", "marvell,armada3710";
  21
  22         aliases {
  23                 ethernet0 = &eth0;
  24                 /* for dsa slave device */
  25                 ethernet1 = &switch0port1;
  26                 ethernet2 = &switch0port2;
  27                 ethernet3 = &switch0port3;
  28                 serial0 = &uart0;
  29                 serial1 = &uart1;
  30         };
  31
  32         chosen {
  33                 stdout-path = "serial0:115200n8";
  34         };
  35
  36         memory@0 {
  37                 device_type = "memory";
  38                 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
  39         };
  40
  41         vcc_sd_reg1: regulator {
  42                 compatible = "regulator-gpio";
  43                 regulator-name = "vcc_sd1";
  44                 regulator-min-microvolt = <1800000>;
  45                 regulator-max-microvolt = <3300000>;
  46                 regulator-boot-on;
  47
  48                 gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>;
  49                 gpios-states = <0>;
  50                 states = <1800000 0x1
  51                           3300000 0x0>;
  52                 enable-active-high;
  53         };
  54 };
  55
  56 /* J9 */
  57 &pcie0 {
  58         status = "okay";
  59 };
  60
  61 /* J6 */
  62 &sata {
  63         status = "okay";
  64 };
  65
  66 /* J1 */
  67 &sdhci1 {
  68         wp-inverted;
  69         bus-width = <4>;
  70         cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>;
  71         marvell,pad-type = "sd";
  72         vqmmc-supply = <&vcc_sd_reg1>;
  73         status = "okay";
  74 };
  75
  76 &spi0 {
  77         status = "okay";
  78
  79         flash@0 {
  80                 reg = <0>;
  81                 compatible = "winbond,w25q32dw", "jedec,spi-flash";
  82                 spi-max-frequency = <104000000>;
  83                 m25p,fast-read;
  84
  85                 partitions {
  86                         compatible = "fixed-partitions";
  87                         #address-cells = <1>;
  88                         #size-cells = <1>;
  89
  90                         partition@0 {
  91                                 label = "uboot";
  92                                 reg = <0 0x180000>;
  93                         };
  94
  95                         partition@180000 {
  96                                 label = "ubootenv";
  97                                 reg = <0x180000 0x10000>;
  98                         };
  99                 };
 100         };
 101 };
 102
 103 /* Exported on the micro USB connector J5 through an FTDI */
 104 &uart0 {
 105         pinctrl-names = "default";
 106         pinctrl-0 = <&uart1_pins>;
 107         status = "okay";
 108 };
 109
 110 /*
 111  * Connector J17 and J18 expose a number of different features. Some pins are
 112  * multiplexed. This is the case for instance for the following features:
 113  * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of
 114  *   how to enable it. Beware that the signals are 1.8V TTL.
 115  * - I2C
 116  * - SPI
 117  * - MMC
 118  */
 119
 120 /* J7 */
 121 &usb3 {
 122         status = "okay";
 123 };
 124
 125 /* J8 */
 126 &usb2 {
 127         status = "okay";
 128 };
 129
 130 &mdio {
 131         switch0: switch0@1 {
 132                 compatible = "marvell,mv88e6085";
 133                 #address-cells = <1>;
 134                 #size-cells = <0>;
 135                 reg = <1>;
 136
 137                 dsa,member = <0 0>;
 138
 139                 ports {
 140                         #address-cells = <1>;
 141                         #size-cells = <0>;
 142
 143                         switch0port0: port@0 {
 144                                 reg = <0>;
 145                                 label = "cpu";
 146                                 ethernet = <&eth0>;
 147                         };
 148
 149                         switch0port1: port@1 {
 150                                 reg = <1>;
 151                                 label = "wan";
 152                                 phy-handle = <&switch0phy0>;
 153                         };
 154
 155                         switch0port2: port@2 {
 156                                 reg = <2>;
 157                                 label = "lan0";
 158                                 phy-handle = <&switch0phy1>;
 159                         };
 160
 161                         switch0port3: port@3 {
 162                                 reg = <3>;
 163                                 label = "lan1";
 164                                 phy-handle = <&switch0phy2>;
 165                         };
 166
 167                 };
 168
 169                 mdio {
 170                         #address-cells = <1>;
 171                         #size-cells = <0>;
 172
 173                         switch0phy0: switch0phy0@11 {
 174                                 reg = <0x11>;
 175                         };
 176                         switch0phy1: switch0phy1@12 {
 177                                 reg = <0x12>;
 178                         };
 179                         switch0phy2: switch0phy2@13 {
 180                                 reg = <0x13>;
 181                         };
 182                 };
 183         };
 184 };
 185
 186 &eth0 {
 187         phy-mode = "rgmii-id";
 188         status = "okay";
 189
 190         fixed-link {
 191                 speed = <1000>;
 192                 full-duplex;
 193         };
 194 };