arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dts

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree For RD-AC5X.
   4  *
   5  * Copyright (C) 2021 Marvell
   6  * Copyright (C) 2022 Allied Telesis Labs
   7  */
   8 /*
   9  * Device Tree file for Marvell Alleycat 5X development board
  10  * This board file supports the B configuration of the board
  11  */
  12
  13 /dts-v1/;
  14
  15 #include "ac5-98dx35xx.dtsi"
  16
  17 / {
  18         model = "Marvell RD-AC5X Board";
  19         compatible = "marvell,rd-ac5x", "marvell,ac5x", "marvell,ac5";
  20
  21         aliases {
  22                 serial0 = &uart0;
  23                 spiflash0 = &spiflash0;
  24                 gpio0 = &gpio0;
  25                 gpio1 = &gpio1;
  26                 ethernet0 = &eth0;
  27                 ethernet1 = &eth1;
  28         };
  29
  30         memory@0 {
  31                 device_type = "memory";
  32                 reg = <0x2 0x00000000 0x0 0x40000000>;
  33         };
  34
  35         usb1phy: usb-phy {
  36                 compatible = "usb-nop-xceiv";
  37                 #phy-cells = <0>;
  38         };
  39 };
  40
  41 &mdio {
  42         phy0: ethernet-phy@0 {
  43                 reg = <0>;
  44         };
  45 };
  46
  47 &i2c0 {
  48         status = "okay";
  49 };
  50
  51 &i2c1 {
  52         status = "okay";
  53 };
  54
  55 &eth0 {
  56         status = "okay";
  57         phy-handle = <&phy0>;
  58 };
  59
  60 /* USB0 is a host USB */
  61 &usb0 {
  62         status = "okay";
  63 };
  64
  65 /* USB1 is a peripheral USB */
  66 &usb1 {
  67         status = "okay";
  68         phys = <&usb1phy>;
  69         phy-names = "usb-phy";
  70         dr_mode = "peripheral";
  71 };
  72
  73 &spi0 {
  74         status = "okay";
  75
  76         spiflash0: flash@0 {
  77                 compatible = "jedec,spi-nor";
  78                 spi-max-frequency = <50000000>;
  79                 spi-tx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */
  80                 spi-rx-bus-width = <1>; /* 1-single, 2-dual, 4-quad */
  81                 reg = <0>;
  82
  83                 #address-cells = <1>;
  84                 #size-cells = <1>;
  85
  86                 partition@0 {
  87                         label = "spi_flash_part0";
  88                         reg = <0x0 0x800000>;
  89                 };
  90
  91                 parition@1 {
  92                         label = "spi_flash_part1";
  93                         reg = <0x800000 0x700000>;
  94                 };
  95
  96                 parition@2 {
  97                         label = "spi_flash_part2";
  98                         reg = <0xF00000 0x100000>;
  99                 };
 100         };
 101 };