arch/arm64/boot/dts/intel/socfpga_n5x_socdk.dts

   1 // SPDX-License-Identifier:     GPL-2.0
   2 /*
   3  * Copyright (C) 2021, Intel Corporation
   4  */
   5 #include "socfpga_agilex.dtsi"
   6
   7 / {
   8         model = "eASIC N5X SoCDK";
   9         compatible = "intel,n5x-socdk", "intel,socfpga-agilex";
  10
  11         aliases {
  12                 serial0 = &uart0;
  13                 ethernet0 = &gmac0;
  14                 ethernet1 = &gmac1;
  15                 ethernet2 = &gmac2;
  16         };
  17
  18         chosen {
  19                 stdout-path = "serial0:115200n8";
  20         };
  21
  22         memory@80000000 {
  23                 device_type = "memory";
  24                 /* We expect the bootloader to fill in the reg */
  25                 reg = <0 0x80000000 0 0>;
  26         };
  27
  28         soc {
  29                 sdram_edac: memory-controller@f87f8000 {
  30                         compatible = "snps,ddrc-3.80a";
  31                         reg = <0xf87f8000 0x400>;
  32                         interrupts = <0 175 4>;
  33                         status = "okay";
  34                 };
  35         };
  36 };
  37
  38 &clkmgr {
  39         compatible = "intel,easic-n5x-clkmgr";
  40 };
  41
  42 &gmac0 {
  43         status = "okay";
  44         phy-mode = "rgmii";
  45         phy-handle = <&phy0>;
  46
  47         max-frame-size = <9000>;
  48
  49         mdio0 {
  50                 #address-cells = <1>;
  51                 #size-cells = <0>;
  52                 compatible = "snps,dwmac-mdio";
  53                 phy0: ethernet-phy@0 {
  54                         reg = <4>;
  55
  56                         txd0-skew-ps = <0>; /* -420ps */
  57                         txd1-skew-ps = <0>; /* -420ps */
  58                         txd2-skew-ps = <0>; /* -420ps */
  59                         txd3-skew-ps = <0>; /* -420ps */
  60                         rxd0-skew-ps = <420>; /* 0ps */
  61                         rxd1-skew-ps = <420>; /* 0ps */
  62                         rxd2-skew-ps = <420>; /* 0ps */
  63                         rxd3-skew-ps = <420>; /* 0ps */
  64                         txen-skew-ps = <0>; /* -420ps */
  65                         txc-skew-ps = <900>; /* 0ps */
  66                         rxdv-skew-ps = <420>; /* 0ps */
  67                         rxc-skew-ps = <1680>; /* 780ps */
  68                 };
  69         };
  70 };
  71
  72 &mmc {
  73         status = "okay";
  74         cap-sd-highspeed;
  75         broken-cd;
  76         bus-width = <4>;
  77         clk-phase-sd-hs = <0>, <135>;
  78 };
  79
  80 &osc1 {
  81         clock-frequency = <25000000>;
  82 };
  83
  84 &qspi {
  85         status = "okay";
  86         flash@0 {
  87                 #address-cells = <1>;
  88                 #size-cells = <1>;
  89                 compatible = "micron,mt25qu02g", "jedec,spi-nor";
  90                 reg = <0>;
  91                 spi-max-frequency = <100000000>;
  92
  93                 m25p,fast-read;
  94                 cdns,page-size = <256>;
  95                 cdns,block-size = <16>;
  96                 cdns,read-delay = <2>;
  97                 cdns,tshsl-ns = <50>;
  98                 cdns,tsd2d-ns = <50>;
  99                 cdns,tchsh-ns = <4>;
 100                 cdns,tslch-ns = <4>;
 101
 102                 partitions {
 103                         compatible = "fixed-partitions";
 104                         #address-cells = <1>;
 105                         #size-cells = <1>;
 106
 107                         qspi_boot: partition@0 {
 108                                 label = "Boot and fpga data";
 109                                 reg = <0x0 0x03FE0000>;
 110                         };
 111
 112                         qspi_rootfs: partition@3fe0000 {
 113                                 label = "Root Filesystem - JFFS2";
 114                                 reg = <0x03FE0000 0x0C020000>;
 115                         };
 116                 };
 117         };
 118 };
 119
 120 &uart0 {
 121         status = "okay";
 122 };
 123
 124 &usb0 {
 125         status = "okay";
 126         disable-over-current;
 127 };
 128
 129 &watchdog0 {
 130         status = "okay";
 131 };