1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2018 Jon Nettleton <jon@solid-run.com>
8 #include "dt-bindings/usb/pd.h"
9 #include "imx8mq-sr-som.dtsi"
12 model = "SolidRun i.MX8MQ HummingBoard Pulse";
13 compatible = "solidrun,hummingboard-pulse", "fsl,imx8mq";
19 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
20 compatible = "regulator-fixed";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
23 regulator-name = "VSD_3V3";
24 regulator-min-microvolt = <3300000>;
25 regulator-max-microvolt = <3300000>;
26 gpio = <&gpio1 13 GPIO_ACTIVE_LOW>;
29 reg_v_5v0: regulator-v-5v0 {
30 compatible = "regulator-fixed";
31 regulator-name = "v_5v0";
32 regulator-max-microvolt = <5000000>;
33 regulator-min-microvolt = <5000000>;
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_i2c2>;
41 clock-frequency = <100000>;
44 typec_ptn5100: usb-typec@50 {
45 compatible = "nxp,ptn5110";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_typec>;
49 interrupt-parent = <&gpio1>;
50 interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
53 compatible = "usb-c-connector";
57 try-power-role = "sink";
58 source-pdos = <PDO_FIXED(5000, 2000,
62 sink-pdos = <PDO_FIXED(5000, 2000,
70 op-sink-microwatt = <9000000>;
73 typec1_dr_sw: endpoint {
74 remote-endpoint = <&usb1_drd_sw>;
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_i2c3>;
84 clock-frequency = <100000>;
88 compatible = "abracon,ab1805";
90 abracon,tc-diode = "schottky";
91 abracon,tc-resistor = <3>;
95 &uart2 { /* J35 header */
96 pinctrl-names = "default";
97 pinctrl-0 = <&pinctrl_uart2>;
98 assigned-clocks = <&clk IMX8MQ_CLK_UART2>;
99 assigned-clock-parents = <&clk IMX8MQ_CLK_25M>;
103 &uart3 { /* Mikrobus */
104 pinctrl-names = "default";
105 pinctrl-0 = <&pinctrl_uart3>;
106 assigned-clocks = <&clk IMX8MQ_CLK_UART3>;
107 assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_80M>;
113 pinctrl-names = "default", "state_100mhz", "state_200mhz";
114 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
115 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
116 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
117 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
118 vmmc-supply = <®_usdhc2_vmmc>;
127 usb1_drd_sw: endpoint {
128 remote-endpoint = <&typec1_dr_sw>;
147 pinctrl-names = "default";
148 pinctrl-0 = <&pinctrl_hog>;
150 pinctrl_hog: hoggrp {
152 /* MikroBus Analog */
153 MX8MQ_IOMUXC_NAND_DATA05_GPIO3_IO11 0x41
155 MX8MQ_IOMUXC_SAI2_RXD0_GPIO4_IO23 0x41
157 * The following 2 pins need to be commented out and
158 * reconfigured to enable RTS/CTS on UART3
161 MX8MQ_IOMUXC_ECSPI1_MISO_GPIO5_IO8 0x41
163 MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41
167 pinctrl_i2c2: i2c2grp {
169 MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x4000007f
170 MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x4000007f
174 pinctrl_i2c3: i2c3grp {
176 MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x4000007f
177 MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x4000007f
181 pinctrl_typec: typecgrp {
183 MX8MQ_IOMUXC_NAND_RE_B_GPIO3_IO15 0x16
184 MX8MQ_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x17059
188 pinctrl_uart2: uart2grp {
190 MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
191 MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
195 pinctrl_uart3: uart3grp {
197 MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
198 MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
200 * These pins are by default GPIO on the Mikro Bus
201 * Header. To use RTS/CTS on UART3 comment them out
202 * of the hoggrp and enable them here
204 /* MX8MQ_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x49 */
205 /* MX8MQ_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x49 */
209 pinctrl_usdhc2_gpio: usdhc2grpgpio {
211 MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x41
215 pinctrl_usdhc2_vmmc: usdhc2vmmcgpio {
217 MX8MQ_IOMUXC_GPIO1_IO13_GPIO1_IO13 0x41
221 pinctrl_usdhc2: usdhc2grp {
223 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
224 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
225 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
226 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
227 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
228 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
229 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
233 pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
235 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
236 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
237 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
238 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
239 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
240 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
241 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1
245 pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
247 MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
248 MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xdf
249 MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xdf
250 MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xdf
251 MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xdf
252 MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xdf
253 MX8MQ_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xc1