1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2023 Gateworks Corporation
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 compatible = "gpio-leds";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_gpio_leds>;
17 function = LED_FUNCTION_STATUS;
18 color = <LED_COLOR_ID_GREEN>;
19 gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
21 linux,default-trigger = "heartbeat";
25 function = LED_FUNCTION_STATUS;
26 color = <LED_COLOR_ID_RED>;
27 gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
28 default-state = "off";
32 pcie0_refclk: clock-pcie0 {
33 compatible = "fixed-clock";
35 clock-frequency = <100000000>;
39 compatible = "pps-gpio";
40 pinctrl-names = "default";
41 pinctrl-0 = <&pinctrl_pps>;
42 gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
47 /* off-board header */
49 pinctrl-names = "default";
50 pinctrl-0 = <&pinctrl_spi2>;
51 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
59 "dio1", "", "", "dio0",
60 "", "", "pci_usb_sel", "",
63 "dio3", "", "dio2", "",
64 "pci_wdis#", "", "", "";
68 clock-frequency = <400000>;
69 pinctrl-names = "default";
70 pinctrl-0 = <&pinctrl_i2c2>;
74 compatible = "st,lis2de12";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_accel>;
78 st,drdy-int-pin = <1>;
79 interrupt-parent = <&gpio4>;
80 interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
85 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
86 fsl,clkreq-unsupported;
87 clocks = <&pcie0_refclk>;
93 pinctrl-names = "default";
94 pinctrl-0 = <&pinctrl_pcie0>;
95 reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
101 pinctrl-names = "default";
102 pinctrl-0 = <&pinctrl_uart1>;
106 /* off-board header */
108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_uart3>;
113 /* USB1 Type-C front panel */
115 pinctrl-names = "default";
116 pinctrl-0 = <&pinctrl_usb1>;
117 fsl,over-current-active-low;
126 /* dual role is implemented but not a full featured OTG */
132 role-switch-default-mode = "peripheral";
136 compatible = "gpio-usb-b-connector", "usb-b-connector";
137 pinctrl-names = "default";
138 pinctrl-0 = <&pinctrl_usbcon1>;
141 id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
145 /* USB2 - MiniPCIe socket */
147 fsl,permanently-attached;
148 fsl,disable-port-power-control;
162 pinctrl-names = "default";
163 pinctrl-0 = <&pinctrl_hog>;
165 pinctrl_hog: hoggrp {
167 MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
168 MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
169 MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
170 MX8MP_IOMUXC_SAI2_TXD0__GPIO4_IO26 0x40000146 /* DIO2 */
171 MX8MP_IOMUXC_SAI2_TXFS__GPIO4_IO24 0x40000146 /* DIO3 */
172 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
176 pinctrl_accel: accelgrp {
178 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
182 pinctrl_gpio_leds: gpioledgrp {
184 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
185 MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
189 pinctrl_pcie0: pcie0grp {
191 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
195 pinctrl_pps: ppsgrp {
197 MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
201 pinctrl_usb1: usb1grp {
203 MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
207 pinctrl_usbcon1: usbcon1grp {
209 MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
213 pinctrl_spi2: spi2grp {
215 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
216 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
217 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
218 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
222 pinctrl_uart1: uart1grp {
224 MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
225 MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
229 pinctrl_uart3: uart3grp {
231 MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
232 MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140