arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Copyright (C) 2022 Avnet Embedded GmbH
   4  */
   5
   6 /dts-v1/;
   7
   8 #include "imx8mp-msc-sm2s-14N0600E.dtsi"
   9 #include <dt-bindings/clock/imx8mp-clock.h>
  10 #include <dt-bindings/gpio/gpio.h>
  11
  12 / {
  13         model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM";
  14         compatible = "avnet,sm2s-imx8mp-14N0600E-ep1",
  15                      "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp",
  16                      "fsl,imx8mp";
  17
  18         reg_vcc_3v3_audio: 3v3-audio-regulator {
  19                 compatible = "regulator-fixed";
  20                 regulator-name = "VCC_3V3_AUD";
  21                 regulator-min-microvolt = <3300000>;
  22                 regulator-max-microvolt = <3300000>;
  23         };
  24
  25         reg_vcc_1v8_audio: 1v8-audio-regulator {
  26                 compatible = "regulator-fixed";
  27                 regulator-name = "VCC_1V8_AUD";
  28                 regulator-min-microvolt = <1800000>;
  29                 regulator-max-microvolt = <1800000>;
  30         };
  31
  32         sound {
  33                 compatible = "simple-audio-card";
  34                 simple-audio-card,name = "sgtl5000-audio";
  35                 simple-audio-card,format = "i2s";
  36                 simple-audio-card,frame-master = <&codec_dai>;
  37                 simple-audio-card,bitclock-master = <&codec_dai>;
  38
  39                 simple-audio-card,cpu {
  40                         sound-dai = <&sai2>;
  41                 };
  42
  43                 codec_dai: simple-audio-card,codec {
  44                         sound-dai = <&sgtl5000>;
  45                 };
  46         };
  47 };
  48
  49 &i2c1 {
  50         sgtl5000: audio-codec@a {
  51                 compatible = "fsl,sgtl5000";
  52                 reg = <0x0a>;
  53
  54                 assigned-clocks = <&clk IMX8MP_CLK_CLKOUT1_SEL>;
  55                 assigned-clock-parents = <&clk IMX8MP_CLK_24M>;
  56                 assigned-clock-rates = <24000000>;
  57                 clocks = <&clk IMX8MP_CLK_CLKOUT1>;
  58                 #sound-dai-cells = <0>;
  59
  60                 VDDA-supply  = <&reg_vcc_3v3_audio>;
  61                 VDDD-supply  = <&reg_vcc_1v8_audio>;
  62                 VDDIO-supply = <&reg_vcc_1v8_audio>;
  63         };
  64 };
  65
  66 /* I2S-0 = sai2 */
  67 &sai2 {
  68         pinctrl-names = "default";
  69         pinctrl-0 = <&pinctrl_sai2>;
  70
  71         assigned-clocks = <&clk IMX8MP_CLK_SAI2>;
  72         assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
  73         assigned-clock-rates = <12288000>;
  74
  75         fsl,sai-mclk-direction-output;
  76         status = "okay";
  77 };
  78
  79 &flexcan1 {
  80         status = "okay";
  81 };
  82
  83 &flexcan2 {
  84         status = "okay";
  85 };
  86
  87 &usdhc2 {
  88         no-1-8-v;
  89 };
  90
  91 &iomuxc {
  92         pinctrl-names = "default";
  93         pinctrl-0 = <&pinctrl_smarc_gpio>;
  94
  95         pinctrl_sai2: sai2grp {
  96                 fsl,pins = <
  97                         MX8MP_IOMUXC_SAI2_TXFS__AUDIOMIX_SAI2_TX_SYNC   0xd6
  98                         MX8MP_IOMUXC_SAI2_TXC__AUDIOMIX_SAI2_TX_BCLK    0xd6
  99                         MX8MP_IOMUXC_SAI2_RXD0__AUDIOMIX_SAI2_RX_DATA00 0xd6
 100                         MX8MP_IOMUXC_SAI2_TXD0__AUDIOMIX_SAI2_TX_DATA00 0xd6
 101                 >;
 102         };
 103
 104         pinctrl_smarc_gpio: smarcgpiosgrp {
 105                 fsl,pins =
 106                         <MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11    0x19>, /* GPIO0 */
 107                         <MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01      0x19>, /* GPIO1 */
 108                         <MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02     0x19>, /* GPIO2 */
 109                         <MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03     0x19>, /* GPIO3 */
 110                         <MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29      0x19>, /* GPIO4 */
 111                         <MX8MP_IOMUXC_SAI3_MCLK__GPIO5_IO02     0x19>, /* GPIO5 */
 112                         <MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18     0x19>, /* GPIO6 */
 113                         <MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10    0x19>, /* GPIO7 */
 114                         <MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20     0x19>, /* GPIO8 */
 115                         <MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21     0x19>, /* GPIO9 */
 116                         <MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22      0x19>, /* GPIO10 */
 117                         <MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28     0x19>, /* GPIO11 */
 118                         <MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19     0x19>, /* GPIO12 */
 119                         <MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00     0x19>; /* GPIO13 */
 120         };
 121 };