arch/arm64/boot/dts/freescale/imx8mp-debix-som-a.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Copyright 2019 NXP
   4  * Copyright (C) 2023 Pengutronix, Marco Felsch <kernel@pengutronix.de>
   5  */
   6
   7 #include "imx8mp.dtsi"
   8
   9 / {
  10         model = "Polyhex i.MX8MPlus Debix SOM A";
  11         compatible = "polyhex,imx8mp-debix-som-a", "fsl,imx8mp";
  12
  13         reg_usdhc2_vmmc: regulator-usdhc2 {
  14                 compatible = "regulator-fixed";
  15                 pinctrl-names = "default";
  16                 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
  17                 regulator-name = "VSD_3V3";
  18                 regulator-min-microvolt = <3300000>;
  19                 regulator-max-microvolt = <3300000>;
  20                 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
  21                 enable-active-high;
  22         };
  23 };
  24
  25 &A53_0 {
  26         cpu-supply = <&buck2>;
  27 };
  28
  29 &A53_1 {
  30         cpu-supply = <&buck2>;
  31 };
  32
  33 &A53_2 {
  34         cpu-supply = <&buck2>;
  35 };
  36
  37 &A53_3 {
  38         cpu-supply = <&buck2>;
  39 };
  40
  41 &i2c1 {
  42         clock-frequency = <400000>;
  43         pinctrl-names = "default";
  44         pinctrl-0 = <&pinctrl_i2c1>;
  45         status = "okay";
  46
  47         pmic@25 {
  48                 compatible = "nxp,pca9450c";
  49                 reg = <0x25>;
  50                 pinctrl-names = "default";
  51                 pinctrl-0 = <&pinctrl_pmic>;
  52                 interrupt-parent = <&gpio1>;
  53                 interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
  54
  55                 regulators {
  56                         buck1: BUCK1 {
  57                                 regulator-name = "BUCK1";
  58                                 regulator-min-microvolt = <600000>;
  59                                 regulator-max-microvolt = <2187500>;
  60                                 regulator-boot-on;
  61                                 regulator-always-on;
  62                                 regulator-ramp-delay = <3125>;
  63                         };
  64
  65                         buck2: BUCK2 {
  66                                 regulator-name = "BUCK2";
  67                                 regulator-min-microvolt = <600000>;
  68                                 regulator-max-microvolt = <2187500>;
  69                                 regulator-boot-on;
  70                                 regulator-always-on;
  71                                 regulator-ramp-delay = <3125>;
  72                                 nxp,dvs-run-voltage = <950000>;
  73                                 nxp,dvs-standby-voltage = <850000>;
  74                         };
  75
  76                         buck4: BUCK4 {
  77                                 regulator-name = "BUCK4";
  78                                 regulator-min-microvolt = <600000>;
  79                                 regulator-max-microvolt = <3400000>;
  80                                 regulator-boot-on;
  81                                 regulator-always-on;
  82                         };
  83
  84                         buck5: BUCK5 {
  85                                 regulator-name = "BUCK5";
  86                                 regulator-min-microvolt = <600000>;
  87                                 regulator-max-microvolt = <3400000>;
  88                                 regulator-boot-on;
  89                                 regulator-always-on;
  90                         };
  91
  92                         buck6: BUCK6 {
  93                                 regulator-name = "BUCK6";
  94                                 regulator-min-microvolt = <600000>;
  95                                 regulator-max-microvolt = <3400000>;
  96                                 regulator-boot-on;
  97                                 regulator-always-on;
  98                         };
  99
 100                         ldo1: LDO1 {
 101                                 regulator-name = "LDO1";
 102                                 regulator-min-microvolt = <1600000>;
 103                                 regulator-max-microvolt = <3300000>;
 104                                 regulator-boot-on;
 105                                 regulator-always-on;
 106                         };
 107
 108                         ldo2: LDO2 {
 109                                 regulator-name = "LDO2";
 110                                 regulator-min-microvolt = <800000>;
 111                                 regulator-max-microvolt = <1150000>;
 112                                 regulator-boot-on;
 113                                 regulator-always-on;
 114                         };
 115
 116                         ldo3: LDO3 {
 117                                 regulator-name = "LDO3";
 118                                 regulator-min-microvolt = <800000>;
 119                                 regulator-max-microvolt = <3300000>;
 120                                 regulator-boot-on;
 121                                 regulator-always-on;
 122                         };
 123
 124                         ldo4: LDO4 {
 125                                 regulator-name = "LDO4";
 126                                 regulator-min-microvolt = <800000>;
 127                                 regulator-max-microvolt = <3300000>;
 128                                 regulator-boot-on;
 129                                 regulator-always-on;
 130                         };
 131
 132                         ldo5: LDO5 {
 133                                 regulator-name = "LDO5";
 134                                 regulator-min-microvolt = <1800000>;
 135                                 regulator-max-microvolt = <3300000>;
 136                                 regulator-boot-on;
 137                                 regulator-always-on;
 138                         };
 139                 };
 140         };
 141 };
 142
 143 &i2c4 {
 144         clock-frequency = <400000>;
 145         pinctrl-names = "default";
 146         pinctrl-0 = <&pinctrl_i2c4>;
 147         status = "okay";
 148
 149         adc@48 {
 150                  compatible = "ti,ads1115";
 151                  reg = <0x48>;
 152                  #address-cells = <1>;
 153                  #size-cells = <0>;
 154
 155                  channel@4 {
 156                          reg = <4>;
 157                          ti,gain = <1>;
 158                          ti,datarate = <7>;
 159                  };
 160
 161                  channel@5 {
 162                          reg = <5>;
 163                          ti,gain = <1>;
 164                          ti,datarate = <7>;
 165                  };
 166
 167                  channel@6 {
 168                          reg = <6>;
 169                          ti,gain = <1>;
 170                          ti,datarate = <7>;
 171                  };
 172
 173                  channel@7 {
 174                          reg = <7>;
 175                          ti,gain = <1>;
 176                          ti,datarate = <7>;
 177                  };
 178          };
 179 };
 180
 181 &snvs_pwrkey {
 182         status = "okay";
 183 };
 184
 185 /* eMMC */
 186 &usdhc3 {
 187         pinctrl-names = "default", "state_100mhz", "state_200mhz";
 188         pinctrl-0 = <&pinctrl_usdhc3>;
 189         pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
 190         pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
 191         assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
 192         assigned-clock-rates = <400000000>;
 193         bus-width = <8>;
 194         non-removable;
 195         status = "okay";
 196 };
 197
 198 &wdog1 {
 199         pinctrl-names = "default";
 200         pinctrl-0 = <&pinctrl_wdog>;
 201         fsl,ext-reset-output;
 202         status = "okay";
 203 };
 204
 205 &iomuxc {
 206         pinctrl_i2c1: i2c1grp {
 207                 fsl,pins = <
 208                         MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL                 0x400001c2
 209                         MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA                 0x400001c2
 210                 >;
 211         };
 212
 213         pinctrl_i2c4: i2c4grp {
 214                 fsl,pins = <
 215                         MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL                 0x400001c3
 216                         MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA                 0x400001c3
 217                 >;
 218         };
 219
 220         pinctrl_pmic: pmicgrp {
 221                 fsl,pins = <
 222                         MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03             0x41
 223                 >;
 224         };
 225
 226         pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
 227                 fsl,pins = <
 228                         MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19            0x41
 229                 >;
 230         };
 231
 232         pinctrl_usdhc3: usdhc3grp {
 233                 fsl,pins = <
 234                         MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK              0x190
 235                         MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD              0x1d0
 236                         MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0          0x1d0
 237                         MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1          0x1d0
 238                         MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2          0x1d0
 239                         MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3          0x1d0
 240                         MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4            0x1d0
 241                         MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5           0x1d0
 242                         MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6           0x1d0
 243                         MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7             0x1d0
 244                         MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE          0x190
 245                 >;
 246         };
 247
 248         pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
 249                 fsl,pins = <
 250                         MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK              0x194
 251                         MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD              0x1d4
 252                         MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0          0x1d4
 253                         MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1          0x1d4
 254                         MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2          0x1d4
 255                         MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3          0x1d4
 256                         MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4            0x1d4
 257                         MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5           0x1d4
 258                         MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6           0x1d4
 259                         MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7             0x1d4
 260                         MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE          0x194
 261                 >;
 262         };
 263
 264         pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {
 265                 fsl,pins = <
 266                         MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK              0x196
 267                         MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD              0x1d6
 268                         MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0          0x1d6
 269                         MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1          0x1d6
 270                         MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2          0x1d6
 271                         MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3          0x1d6
 272                         MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4            0x1d6
 273                         MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5           0x1d6
 274                         MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6           0x1d6
 275                         MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7             0x1d6
 276                         MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE          0x196
 277                 >;
 278         };
 279
 280         pinctrl_wdog: wdoggrp {
 281                 fsl,pins = <
 282                         MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B           0xc6
 283                 >;
 284         };
 285 };