1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks
8 #include <dt-bindings/usb/pd.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include "imx8mp.dtsi"
11 #include "imx8mp-beacon-som.dtsi"
14 model = "Beacon EmbeddedWorks i.MX8MPlus Development kit";
15 compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp";
26 clk_xtal25: clock-xtal25 {
27 compatible = "fixed-clock";
29 clock-frequency = <25000000>;
33 compatible = "usb-c-connector";
45 remote-endpoint = <&usb3_hs_ep>;
52 remote-endpoint = <&hd3ss3220_in_ep>;
58 dmic_codec: dmic-codec {
59 compatible = "dmic-codec";
61 #sound-dai-cells = <0>;
65 compatible = "gpio-keys";
71 gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
78 gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
85 gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
92 gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
98 compatible = "gpio-leds";
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_led3>;
104 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>;
105 default-state = "off";
110 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>;
111 default-state = "off";
116 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>;
117 default-state = "off";
122 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
123 linux,default-trigger = "heartbeat";
127 reg_audio: regulator-wm8962 {
128 compatible = "regulator-fixed";
129 regulator-name = "3v3_aud";
130 regulator-min-microvolt = <3300000>;
131 regulator-max-microvolt = <3300000>;
132 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>;
136 reg_usdhc2_vmmc: regulator-usdhc2 {
137 compatible = "regulator-fixed";
138 regulator-name = "VSD_3V3";
139 regulator-min-microvolt = <3300000>;
140 regulator-max-microvolt = <3300000>;
141 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>;
143 startup-delay-us = <100>;
144 off-on-delay-us = <20000>;
147 reg_usb1_host_vbus: regulator-usb1-vbus {
148 compatible = "regulator-fixed";
149 regulator-name = "usb1_host_vbus";
150 regulator-max-microvolt = <5000000>;
151 regulator-min-microvolt = <5000000>;
152 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>;
157 compatible = "simple-audio-card";
158 simple-audio-card,name = "sound-pdm";
159 simple-audio-card,format = "i2s";
160 simple-audio-card,bitclock-master = <&dailink_master>;
161 simple-audio-card,frame-master = <&dailink_master>;
163 dailink_master: simple-audio-card,cpu {
164 sound-dai = <&micfil>;
167 simple-audio-card,codec {
168 sound-dai = <&dmic_codec>;
173 compatible = "simple-audio-card";
174 simple-audio-card,name = "wm8962";
175 simple-audio-card,format = "i2s";
176 simple-audio-card,widgets = "Headphone", "Headphones",
177 "Microphone", "Headset Mic",
178 "Speaker", "Speaker";
179 simple-audio-card,routing = "Headphones", "HPOUTL",
180 "Headphones", "HPOUTR",
181 "Speaker", "SPKOUTL",
182 "Speaker", "SPKOUTR",
183 "Headset Mic", "MICBIAS",
184 "IN3R", "Headset Mic";
186 simple-audio-card,cpu {
190 simple-audio-card,codec {
191 sound-dai = <&wm8962>;
192 clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
200 assigned-clocks = <&clk IMX8MP_AUDIO_PLL1>, <&clk IMX8MP_AUDIO_PLL2>;
201 assigned-clock-rates = <393216000>, <135475200>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_ecspi2>;
207 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
211 compatible = "infineon,slb9670";
213 pinctrl-names = "default";
214 pinctrl-0 = <&pinctrl_tpm>;
215 reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>;
216 spi-max-frequency = <18500000>;
221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_fec>;
223 phy-mode = "rgmii-id";
224 phy-handle = <ðphy1>;
229 #address-cells = <1>;
232 ethphy1: ethernet-phy@3 {
233 compatible = "ethernet-phy-id0022.1640",
234 "ethernet-phy-ieee802.3-c22";
236 reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
237 reset-assert-us = <10000>;
238 reset-deassert-us = <150000>;
239 interrupt-parent = <&gpio4>;
240 interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
246 pinctrl-names = "default";
247 pinctrl-0 = <&pinctrl_flexcan1>;
256 line-name = "USB-C Mux En";
261 clock-frequency = <384000>;
262 pinctrl-names = "default";
263 pinctrl-0 = <&pinctrl_i2c2>;
267 compatible = "nxp,pcal6416";
271 interrupt-parent = <&gpio4>;
272 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
273 interrupt-controller;
274 #interrupt-cells = <2>;
277 pcieclk: clock-generator@68 {
278 compatible = "renesas,9fgv0241";
280 clocks = <&clk_xtal25>;
286 /* Connected to USB Hub */
288 compatible = "nxp,ptn5110";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_typec>;
292 interrupt-parent = <&gpio4>;
293 interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
296 compatible = "usb-c-connector";
298 power-role = "source";
300 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
306 pinctrl-names = "default";
307 pinctrl-0 = <&pinctrl_i2c4>;
308 clock-frequency = <384000>;
311 wm8962: audio-codec@1a {
312 compatible = "wlf,wm8962";
314 pinctrl-names = "default";
315 pinctrl-0 = <&pinctrl_wm8962>;
316 clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
317 assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>;
318 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
319 assigned-clock-rates = <22576000>;
320 DCVDD-supply = <®_audio>;
321 DBVDD-supply = <®_audio>;
322 AVDD-supply = <®_audio>;
323 CPVDD-supply = <®_audio>;
324 MICVDD-supply = <®_audio>;
325 PLLVDD-supply = <®_audio>;
326 SPKVDD1-supply = <®_audio>;
327 SPKVDD2-supply = <®_audio>;
329 0x0000 /* 0:Default */
330 0x0000 /* 1:Default */
331 0x0000 /* 2:FN_DMICCLK */
332 0x0000 /* 3:Default */
333 0x0000 /* 4:FN_DMICCDAT */
334 0x0000 /* 5:Default */
336 #sound-dai-cells = <0>;
340 compatible = "nxp,pcal6416";
342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_pcal6414>;
346 interrupt-parent = <&gpio4>;
347 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
348 interrupt-controller;
349 #interrupt-cells = <2>;
353 compatible = "nxp,pcal6416";
357 interrupt-parent = <&gpio4>;
358 interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
359 interrupt-controller;
360 #interrupt-cells = <2>;
366 line-name = "USB Hub Enable";
371 compatible = "ti,hd3ss3220";
373 pinctrl-names = "default";
374 pinctrl-0 = <&pinctrl_hd3ss3220>;
375 interrupt-parent = <&gpio4>;
376 interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
379 #address-cells = <1>;
385 hd3ss3220_in_ep: endpoint {
386 remote-endpoint = <&ss_ep>;
393 hd3ss3220_out_ep: endpoint {
394 remote-endpoint = <&usb3_role_switch>;
402 pinctrl-names = "default";
403 pinctrl-0 = <&pinctrl_pdm>;
404 assigned-clocks = <&clk IMX8MP_CLK_PDM>;
405 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL1_OUT>;
406 assigned-clock-rates = <49152000>;
411 pinctrl-names = "default";
412 pinctrl-0 = <&pinctrl_pcie>;
413 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
418 fsl,clkreq-unsupported;
419 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
420 clocks = <&pcieclk 1>;
426 pinctrl-names = "default";
427 pinctrl-0 = <&pinctrl_sai3>;
428 assigned-clocks = <&clk IMX8MP_CLK_SAI3>,
429 <&clk IMX8MP_AUDIO_PLL2> ;
430 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>;
431 assigned-clock-rates = <12288000>, <361267200>;
432 fsl,sai-mclk-direction-output;
441 pinctrl-names = "default";
442 pinctrl-0 = <&pinctrl_uart2>;
447 pinctrl-names = "default";
448 pinctrl-0 = <&pinctrl_uart3>;
449 assigned-clocks = <&clk IMX8MP_CLK_UART3>;
450 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
468 #address-cells = <1>;
473 usb3_hs_ep: endpoint {
474 remote-endpoint = <&hs_ep>;
479 usb3_role_switch: endpoint {
480 remote-endpoint = <&hd3ss3220_out_ep>;
487 vbus-supply = <®_usb1_host_vbus>;
505 pinctrl-names = "default", "state_100mhz", "state_200mhz";
506 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
507 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
508 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
509 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
510 vmmc-supply = <®_usdhc2_vmmc>;
516 pinctrl_ecspi2: ecspi2grp {
518 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82
519 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82
520 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82
521 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000
525 pinctrl_fec: fecgrp {
527 MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2
528 MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2
529 MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90
530 MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90
531 MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90
532 MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90
533 MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90
534 MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90
535 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16
536 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16
537 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16
538 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16
539 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16
540 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16
541 MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140
542 MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10
546 pinctrl_flexcan1: flexcan1grp {
548 MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154
549 MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154
553 pinctrl_hd3ss3220: hd3ss3220grp {
555 MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140
559 pinctrl_i2c2: i2c2grp {
561 MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2
562 MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2
566 pinctrl_i2c4: i2c4grp {
568 MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2
569 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2
573 pinctrl_led3: led3grp {
575 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41
579 pinctrl_pcal6414: pcal6414-gpiogrp {
581 MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10
585 pinctrl_pcie: pciegrp {
587 MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */
588 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */
592 pinctrl_pdm: pdmgrp {
594 MX8MP_IOMUXC_SAI5_RXC__AUDIOMIX_PDM_CLK 0xd6
595 MX8MP_IOMUXC_SAI5_RXD0__AUDIOMIX_PDM_BIT_STREAM00 0xd6
599 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
601 MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40
605 pinctrl_sai3: sai3grp {
607 MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6
608 MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6
609 MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6
610 MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6
611 MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6
615 pinctrl_tpm: tpmgrp {
617 MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */
618 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */
622 pinctrl_typec: typec1grp {
624 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4
628 pinctrl_uart2: uart2grp {
630 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140
631 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140
635 pinctrl_uart3: uart3grp {
637 MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140
638 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140
639 MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140
640 MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140
644 pinctrl_usdhc2: usdhc2grp {
646 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
647 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
648 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
649 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
650 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
651 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
652 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
656 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
658 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
659 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
660 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
661 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
662 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
663 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
664 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
668 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
670 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
671 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
672 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
673 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
674 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
675 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
676 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0
680 pinctrl_usdhc2_gpio: usdhc2gpiogrp {
682 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
686 pinctrl_wm8962: wm8962grp {
688 MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59