1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Copyright (C) 2019 Kontron Electronics GmbH
8 #include "imx8mm-kontron-sl.dtsi"
11 model = "Kontron BL i.MX8MM (N801X S)";
12 compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
18 /* fixed crystal dedicated to mcp2515 */
19 osc_can: clock-osc-can {
20 compatible = "fixed-clock";
22 clock-frequency = <16000000>;
23 clock-output-names = "osc-can";
27 compatible = "gpio-leds";
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_gpio_led>;
33 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>;
34 linux,default-trigger = "heartbeat";
39 gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
44 gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
49 gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
54 gpios = <&gpio4 9 GPIO_ACTIVE_LOW>;
59 gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
64 compatible = "pwm-beeper";
65 pwms = <&pwm2 0 5000 0>;
68 reg_rst_eth2: regulator-rst-eth2 {
69 compatible = "regulator-fixed";
70 regulator-name = "rst-usb-eth2";
71 pinctrl-names = "default";
72 pinctrl-0 = <&pinctrl_usb_eth2>;
73 gpio = <&gpio3 2 GPIO_ACTIVE_HIGH>;
78 reg_vdd_5v: regulator-5v {
79 compatible = "regulator-fixed";
80 regulator-name = "vdd-5v";
81 regulator-min-microvolt = <5000000>;
82 regulator-max-microvolt = <5000000>;
87 pinctrl-names = "default";
88 pinctrl-0 = <&pinctrl_ecspi2>;
89 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
93 compatible = "microchip,mcp2515";
95 pinctrl-names = "default";
96 pinctrl-0 = <&pinctrl_can>;
98 interrupt-parent = <&gpio4>;
99 interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
100 spi-max-frequency = <10000000>;
101 vdd-supply = <®_vdd_3v3>;
102 xceiver-supply = <®_vdd_5v>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_ecspi3>;
109 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_enet>;
116 phy-connection-type = "rgmii-rxid";
117 phy-handle = <ðphy>;
121 #address-cells = <1>;
124 ethphy: ethernet-phy@0 {
126 reset-assert-us = <1>;
127 reset-deassert-us = <15000>;
128 reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
134 clock-frequency = <100000>;
135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_i2c4>;
140 compatible = "epson,rx8900";
146 pinctrl-names = "default";
147 pinctrl-0 = <&pinctrl_pwm2>;
152 pinctrl-names = "default";
153 pinctrl-0 = <&pinctrl_uart1>;
159 pinctrl-names = "default";
160 pinctrl-0 = <&pinctrl_uart2>;
161 linux,rs485-enabled-at-boot-time;
168 over-current-active-low;
174 disable-over-current;
175 #address-cells = <1>;
180 compatible = "usb424,9514";
182 #address-cells = <1>;
186 compatible = "usb424,ec00";
188 local-mac-address = [ 00 00 00 00 00 00 ];
194 pinctrl-names = "default", "state_100mhz", "state_200mhz";
195 pinctrl-0 = <&pinctrl_usdhc2>;
196 pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
197 pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
198 vmmc-supply = <®_vdd_3v3>;
199 vqmmc-supply = <®_nvcc_sd>;
200 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_gpio>;
208 pinctrl_can: cangrp {
210 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19
214 pinctrl_ecspi2: ecspi2grp {
216 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82
217 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82
218 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82
219 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19
223 pinctrl_ecspi3: ecspi3grp {
225 MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82
226 MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82
227 MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82
228 MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19
232 pinctrl_enet: enetgrp {
234 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3
235 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3
236 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f
237 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f
238 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f
239 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f
240 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91
241 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91
242 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91
243 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91
244 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f
245 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91
246 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91
247 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f
248 MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 /* PHY RST */
249 MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* ETH IRQ */
253 pinctrl_gpio_led: gpioledgrp {
255 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19
256 MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19
257 MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19
258 MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19
259 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19
260 MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19
261 MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19
265 pinctrl_gpio: gpiogrp {
267 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19
268 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19
269 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19
270 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19
271 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19
272 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19
273 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19
274 MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19
278 pinctrl_i2c4: i2c4grp {
280 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000083
281 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000083
285 pinctrl_pwm2: pwm2grp {
287 MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19
291 pinctrl_uart1: uart1grp {
293 MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x0
294 MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x0
295 MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x0
296 MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x0
300 pinctrl_uart2: uart2grp {
302 MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x0
303 MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x0
304 MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x0
305 MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x0
309 pinctrl_usb_eth2: usbeth2grp {
311 MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19
315 pinctrl_usdhc2: usdhc2grp {
317 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x90
318 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0
319 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0
320 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0
321 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0
322 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0
323 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19
324 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0
328 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
330 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x94
331 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4
332 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4
333 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4
334 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4
335 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4
336 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19
337 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0
341 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
343 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x96
344 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6
345 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6
346 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6
347 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6
348 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6
349 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x19
350 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0xd0