arch/arm64/boot/dts/freescale/imx8dxl-ss-adma.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2019~2020, 2022 NXP
   4  */
   5
   6 &audio_ipg_clk {
   7         clock-frequency = <160000000>;
   8 };
   9
  10 &dma_ipg_clk {
  11         clock-frequency = <160000000>;
  12 };
  13
  14 &adc0 {
  15         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
  16 };
  17
  18 &edma2 {
  19         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
  20                      <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
  21                      <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>,
  22                      <GIC_SPI 291 IRQ_TYPE_LEVEL_HIGH>,
  23                      <GIC_SPI 292 IRQ_TYPE_LEVEL_HIGH>,
  24                      <GIC_SPI 293 IRQ_TYPE_LEVEL_HIGH>,
  25                      <GIC_SPI 294 IRQ_TYPE_LEVEL_HIGH>,
  26                      <GIC_SPI 295 IRQ_TYPE_LEVEL_HIGH>,
  27                      <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
  28                      <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>,
  29                      <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>,
  30                      <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>,
  31                      <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>,
  32                      <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>,
  33                      <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>,
  34                      <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>;
  35 };
  36
  37 &edma3 {
  38         interrupts = <GIC_SPI 296 IRQ_TYPE_LEVEL_HIGH>,
  39                      <GIC_SPI 297 IRQ_TYPE_LEVEL_HIGH>,
  40                      <GIC_SPI 298 IRQ_TYPE_LEVEL_HIGH>,
  41                      <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>,
  42                      <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>,
  43                      <GIC_SPI 301 IRQ_TYPE_LEVEL_HIGH>,
  44                      <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
  45                      <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>;
  46 };
  47
  48 &i2c0 {
  49         compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
  50         interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
  51 };
  52
  53 &i2c1 {
  54         compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
  55         interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
  56 };
  57
  58 &i2c2 {
  59         compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
  60         interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
  61 };
  62
  63 &i2c3 {
  64         compatible = "fsl,imx8dxl-lpi2c", "fsl,imx7ulp-lpi2c";
  65         interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
  66 };
  67
  68 &lpuart0 {
  69         compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
  70         interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
  71 };
  72
  73 &lpuart1 {
  74         compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
  75         interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
  76 };
  77
  78 &lpuart2 {
  79         compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
  80         interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH>;
  81 };
  82
  83 &lpuart3 {
  84         compatible = "fsl,imx8dxl-lpuart", "fsl,imx8qxp-lpuart";
  85         interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
  86 };
  87
  88 &lpspi0 {
  89         interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>;
  90 };
  91
  92 &lpspi1 {
  93         interrupts = <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>;
  94 };
  95
  96 &lpspi2 {
  97         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
  98 };
  99
 100 &lpspi3 {
 101         interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
 102 };