arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi

   1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
   2 /*
   3  * Device Tree Include file for Freescale Layerscape-1043A family SoC.
   4  *
   5  * Copyright 2014-2015 Freescale Semiconductor, Inc.
   6  * Copyright 2018 NXP
   7  *
   8  * Mingkai Hu <Mingkai.hu@freescale.com>
   9  */
  10
  11 #include <dt-bindings/thermal/thermal.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13
  14 / {
  15         compatible = "fsl,ls1043a";
  16         interrupt-parent = <&gic>;
  17         #address-cells = <2>;
  18         #size-cells = <2>;
  19
  20         aliases {
  21                 crypto = &crypto;
  22                 fman0 = &fman0;
  23                 ethernet0 = &enet0;
  24                 ethernet1 = &enet1;
  25                 ethernet2 = &enet2;
  26                 ethernet3 = &enet3;
  27                 ethernet4 = &enet4;
  28                 ethernet5 = &enet5;
  29                 ethernet6 = &enet6;
  30         };
  31
  32         cpus {
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 /*
  37                  * We expect the enable-method for cpu's to be "psci", but this
  38                  * is dependent on the SoC FW, which will fill this in.
  39                  *
  40                  * Currently supported enable-method is psci v0.2
  41                  */
  42                 cpu0: cpu@0 {
  43                         device_type = "cpu";
  44                         compatible = "arm,cortex-a53";
  45                         reg = <0x0>;
  46                         clocks = <&clockgen 1 0>;
  47                         next-level-cache = <&l2>;
  48                         cpu-idle-states = <&CPU_PH20>;
  49                         #cooling-cells = <2>;
  50                 };
  51
  52                 cpu1: cpu@1 {
  53                         device_type = "cpu";
  54                         compatible = "arm,cortex-a53";
  55                         reg = <0x1>;
  56                         clocks = <&clockgen 1 0>;
  57                         next-level-cache = <&l2>;
  58                         cpu-idle-states = <&CPU_PH20>;
  59                         #cooling-cells = <2>;
  60                 };
  61
  62                 cpu2: cpu@2 {
  63                         device_type = "cpu";
  64                         compatible = "arm,cortex-a53";
  65                         reg = <0x2>;
  66                         clocks = <&clockgen 1 0>;
  67                         next-level-cache = <&l2>;
  68                         cpu-idle-states = <&CPU_PH20>;
  69                         #cooling-cells = <2>;
  70                 };
  71
  72                 cpu3: cpu@3 {
  73                         device_type = "cpu";
  74                         compatible = "arm,cortex-a53";
  75                         reg = <0x3>;
  76                         clocks = <&clockgen 1 0>;
  77                         next-level-cache = <&l2>;
  78                         cpu-idle-states = <&CPU_PH20>;
  79                         #cooling-cells = <2>;
  80                 };
  81
  82                 l2: l2-cache {
  83                         compatible = "cache";
  84                 };
  85         };
  86
  87         idle-states {
  88                 /*
  89                  * PSCI node is not added default, U-boot will add missing
  90                  * parts if it determines to use PSCI.
  91                  */
  92                 entry-method = "psci";
  93
  94                 CPU_PH20: cpu-ph20 {
  95                         compatible = "arm,idle-state";
  96                         idle-state-name = "PH20";
  97                         arm,psci-suspend-param = <0x0>;
  98                         entry-latency-us = <1000>;
  99                         exit-latency-us = <1000>;
 100                         min-residency-us = <3000>;
 101                 };
 102         };
 103
 104         memory@80000000 {
 105                 device_type = "memory";
 106                 reg = <0x0 0x80000000 0 0x80000000>;
 107                       /* DRAM space 1, size: 2GiB DRAM */
 108         };
 109
 110         reserved-memory {
 111                 #address-cells = <2>;
 112                 #size-cells = <2>;
 113                 ranges;
 114
 115                 bman_fbpr: bman-fbpr {
 116                         compatible = "shared-dma-pool";
 117                         size = <0 0x1000000>;
 118                         alignment = <0 0x1000000>;
 119                         no-map;
 120                 };
 121
 122                 qman_fqd: qman-fqd {
 123                         compatible = "shared-dma-pool";
 124                         size = <0 0x400000>;
 125                         alignment = <0 0x400000>;
 126                         no-map;
 127                 };
 128
 129                 qman_pfdr: qman-pfdr {
 130                         compatible = "shared-dma-pool";
 131                         size = <0 0x2000000>;
 132                         alignment = <0 0x2000000>;
 133                         no-map;
 134                 };
 135         };
 136
 137         sysclk: sysclk {
 138                 compatible = "fixed-clock";
 139                 #clock-cells = <0>;
 140                 clock-frequency = <100000000>;
 141                 clock-output-names = "sysclk";
 142         };
 143
 144         reboot {
 145                 compatible ="syscon-reboot";
 146                 regmap = <&dcfg>;
 147                 offset = <0xb0>;
 148                 mask = <0x02>;
 149         };
 150
 151         thermal-zones {
 152                 cpu_thermal: cpu-thermal {
 153                         polling-delay-passive = <1000>;
 154                         polling-delay = <5000>;
 155
 156                         thermal-sensors = <&tmu 3>;
 157
 158                         trips {
 159                                 cpu_alert: cpu-alert {
 160                                         temperature = <85000>;
 161                                         hysteresis = <2000>;
 162                                         type = "passive";
 163                                 };
 164                                 cpu_crit: cpu-crit {
 165                                         temperature = <95000>;
 166                                         hysteresis = <2000>;
 167                                         type = "critical";
 168                                 };
 169                         };
 170
 171                         cooling-maps {
 172                                 map0 {
 173                                         trip = <&cpu_alert>;
 174                                         cooling-device =
 175                                                 <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 176                                                 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 177                                                 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
 178                                                 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
 179                                 };
 180                         };
 181                 };
 182         };
 183
 184         timer {
 185                 compatible = "arm,armv8-timer";
 186                 interrupts = <1 13 0xf08>, /* Physical Secure PPI */
 187                              <1 14 0xf08>, /* Physical Non-Secure PPI */
 188                              <1 11 0xf08>, /* Virtual PPI */
 189                              <1 10 0xf08>; /* Hypervisor PPI */
 190                 fsl,erratum-a008585;
 191         };
 192
 193         pmu {
 194                 compatible = "arm,armv8-pmuv3";
 195                 interrupts = <0 106 0x4>,
 196                              <0 107 0x4>,
 197                              <0 95 0x4>,
 198                              <0 97 0x4>;
 199                 interrupt-affinity = <&cpu0>,
 200                                      <&cpu1>,
 201                                      <&cpu2>,
 202                                      <&cpu3>;
 203         };
 204
 205         gic: interrupt-controller@1400000 {
 206                 compatible = "arm,gic-400";
 207                 #interrupt-cells = <3>;
 208                 interrupt-controller;
 209                 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
 210                       <0x0 0x1402000 0 0x2000>, /* GICC */
 211                       <0x0 0x1404000 0 0x2000>, /* GICH */
 212                       <0x0 0x1406000 0 0x2000>; /* GICV */
 213                 interrupts = <1 9 0xf08>;
 214         };
 215
 216         soc: soc {
 217                 compatible = "simple-bus";
 218                 #address-cells = <2>;
 219                 #size-cells = <2>;
 220                 ranges;
 221
 222                 clockgen: clocking@1ee1000 {
 223                         compatible = "fsl,ls1043a-clockgen";
 224                         reg = <0x0 0x1ee1000 0x0 0x1000>;
 225                         #clock-cells = <2>;
 226                         clocks = <&sysclk>;
 227                 };
 228
 229                 scfg: scfg@1570000 {
 230                         compatible = "fsl,ls1043a-scfg", "syscon";
 231                         reg = <0x0 0x1570000 0x0 0x10000>;
 232                         big-endian;
 233                 };
 234
 235                 crypto: crypto@1700000 {
 236                         compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
 237                                      "fsl,sec-v4.0";
 238                         fsl,sec-era = <3>;
 239                         #address-cells = <1>;
 240                         #size-cells = <1>;
 241                         ranges = <0x0 0x00 0x1700000 0x100000>;
 242                         reg = <0x00 0x1700000 0x0 0x100000>;
 243                         interrupts = <0 75 0x4>;
 244                         dma-coherent;
 245
 246                         sec_jr0: jr@10000 {
 247                                 compatible = "fsl,sec-v5.4-job-ring",
 248                                              "fsl,sec-v5.0-job-ring",
 249                                              "fsl,sec-v4.0-job-ring";
 250                                 reg        = <0x10000 0x10000>;
 251                                 interrupts = <0 71 0x4>;
 252                         };
 253
 254                         sec_jr1: jr@20000 {
 255                                 compatible = "fsl,sec-v5.4-job-ring",
 256                                              "fsl,sec-v5.0-job-ring",
 257                                              "fsl,sec-v4.0-job-ring";
 258                                 reg        = <0x20000 0x10000>;
 259                                 interrupts = <0 72 0x4>;
 260                         };
 261
 262                         sec_jr2: jr@30000 {
 263                                 compatible = "fsl,sec-v5.4-job-ring",
 264                                              "fsl,sec-v5.0-job-ring",
 265                                              "fsl,sec-v4.0-job-ring";
 266                                 reg        = <0x30000 0x10000>;
 267                                 interrupts = <0 73 0x4>;
 268                         };
 269
 270                         sec_jr3: jr@40000 {
 271                                 compatible = "fsl,sec-v5.4-job-ring",
 272                                              "fsl,sec-v5.0-job-ring",
 273                                              "fsl,sec-v4.0-job-ring";
 274                                 reg        = <0x40000 0x10000>;
 275                                 interrupts = <0 74 0x4>;
 276                         };
 277                 };
 278
 279                 dcfg: dcfg@1ee0000 {
 280                         compatible = "fsl,ls1043a-dcfg", "syscon";
 281                         reg = <0x0 0x1ee0000 0x0 0x10000>;
 282                         big-endian;
 283                 };
 284
 285                 ifc: ifc@1530000 {
 286                         compatible = "fsl,ifc", "simple-bus";
 287                         reg = <0x0 0x1530000 0x0 0x10000>;
 288                         interrupts = <0 43 0x4>;
 289                 };
 290
 291                 qspi: spi@1550000 {
 292                         compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
 293                         #address-cells = <1>;
 294                         #size-cells = <0>;
 295                         reg = <0x0 0x1550000 0x0 0x10000>,
 296                                 <0x0 0x40000000 0x0 0x4000000>;
 297                         reg-names = "QuadSPI", "QuadSPI-memory";
 298                         interrupts = <0 99 0x4>;
 299                         clock-names = "qspi_en", "qspi";
 300                         clocks = <&clockgen 4 0>, <&clockgen 4 0>;
 301                         status = "disabled";
 302                 };
 303
 304                 esdhc: esdhc@1560000 {
 305                         compatible = "fsl,ls1043a-esdhc", "fsl,esdhc";
 306                         reg = <0x0 0x1560000 0x0 0x10000>;
 307                         interrupts = <0 62 0x4>;
 308                         clock-frequency = <0>;
 309                         voltage-ranges = <1800 1800 3300 3300>;
 310                         sdhci,auto-cmd12;
 311                         big-endian;
 312                         bus-width = <4>;
 313                 };
 314
 315                 ddr: memory-controller@1080000 {
 316                         compatible = "fsl,qoriq-memory-controller";
 317                         reg = <0x0 0x1080000 0x0 0x1000>;
 318                         interrupts = <0 144 0x4>;
 319                         big-endian;
 320                 };
 321
 322                 tmu: tmu@1f00000 {
 323                         compatible = "fsl,qoriq-tmu";
 324                         reg = <0x0 0x1f00000 0x0 0x10000>;
 325                         interrupts = <0 33 0x4>;
 326                         fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
 327                         fsl,tmu-calibration = <0x00000000 0x00000026
 328                                                0x00000001 0x0000002d
 329                                                0x00000002 0x00000032
 330                                                0x00000003 0x00000039
 331                                                0x00000004 0x0000003f
 332                                                0x00000005 0x00000046
 333                                                0x00000006 0x0000004d
 334                                                0x00000007 0x00000054
 335                                                0x00000008 0x0000005a
 336                                                0x00000009 0x00000061
 337                                                0x0000000a 0x0000006a
 338                                                0x0000000b 0x00000071
 339
 340                                                0x00010000 0x00000025
 341                                                0x00010001 0x0000002c
 342                                                0x00010002 0x00000035
 343                                                0x00010003 0x0000003d
 344                                                0x00010004 0x00000045
 345                                                0x00010005 0x0000004e
 346                                                0x00010006 0x00000057
 347                                                0x00010007 0x00000061
 348                                                0x00010008 0x0000006b
 349                                                0x00010009 0x00000076
 350
 351                                                0x00020000 0x00000029
 352                                                0x00020001 0x00000033
 353                                                0x00020002 0x0000003d
 354                                                0x00020003 0x00000049
 355                                                0x00020004 0x00000056
 356                                                0x00020005 0x00000061
 357                                                0x00020006 0x0000006d
 358
 359                                                0x00030000 0x00000021
 360                                                0x00030001 0x0000002a
 361                                                0x00030002 0x0000003c
 362                                                0x00030003 0x0000004e>;
 363                         #thermal-sensor-cells = <1>;
 364                 };
 365
 366                 qman: qman@1880000 {
 367                         compatible = "fsl,qman";
 368                         reg = <0x0 0x1880000 0x0 0x10000>;
 369                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 370                         memory-region = <&qman_fqd &qman_pfdr>;
 371                 };
 372
 373                 bman: bman@1890000 {
 374                         compatible = "fsl,bman";
 375                         reg = <0x0 0x1890000 0x0 0x10000>;
 376                         interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
 377                         memory-region = <&bman_fbpr>;
 378                 };
 379
 380                 bportals: bman-portals@508000000 {
 381                         ranges = <0x0 0x5 0x08000000 0x8000000>;
 382                 };
 383
 384                 qportals: qman-portals@500000000 {
 385                         ranges = <0x0 0x5 0x00000000 0x8000000>;
 386                 };
 387
 388                 dspi0: spi@2100000 {
 389                         compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
 390                         #address-cells = <1>;
 391                         #size-cells = <0>;
 392                         reg = <0x0 0x2100000 0x0 0x10000>;
 393                         interrupts = <0 64 0x4>;
 394                         clock-names = "dspi";
 395                         clocks = <&clockgen 4 0>;
 396                         spi-num-chipselects = <5>;
 397                         big-endian;
 398                         status = "disabled";
 399                 };
 400
 401                 dspi1: spi@2110000 {
 402                         compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
 403                         #address-cells = <1>;
 404                         #size-cells = <0>;
 405                         reg = <0x0 0x2110000 0x0 0x10000>;
 406                         interrupts = <0 65 0x4>;
 407                         clock-names = "dspi";
 408                         clocks = <&clockgen 4 0>;
 409                         spi-num-chipselects = <5>;
 410                         big-endian;
 411                         status = "disabled";
 412                 };
 413
 414                 i2c0: i2c@2180000 {
 415                         compatible = "fsl,vf610-i2c";
 416                         #address-cells = <1>;
 417                         #size-cells = <0>;
 418                         reg = <0x0 0x2180000 0x0 0x10000>;
 419                         interrupts = <0 56 0x4>;
 420                         clock-names = "i2c";
 421                         clocks = <&clockgen 4 0>;
 422                         dmas = <&edma0 1 39>,
 423                                <&edma0 1 38>;
 424                         dma-names = "tx", "rx";
 425                         status = "disabled";
 426                 };
 427
 428                 i2c1: i2c@2190000 {
 429                         compatible = "fsl,vf610-i2c";
 430                         #address-cells = <1>;
 431                         #size-cells = <0>;
 432                         reg = <0x0 0x2190000 0x0 0x10000>;
 433                         interrupts = <0 57 0x4>;
 434                         clock-names = "i2c";
 435                         clocks = <&clockgen 4 0>;
 436                         status = "disabled";
 437                 };
 438
 439                 i2c2: i2c@21a0000 {
 440                         compatible = "fsl,vf610-i2c";
 441                         #address-cells = <1>;
 442                         #size-cells = <0>;
 443                         reg = <0x0 0x21a0000 0x0 0x10000>;
 444                         interrupts = <0 58 0x4>;
 445                         clock-names = "i2c";
 446                         clocks = <&clockgen 4 0>;
 447                         status = "disabled";
 448                 };
 449
 450                 i2c3: i2c@21b0000 {
 451                         compatible = "fsl,vf610-i2c";
 452                         #address-cells = <1>;
 453                         #size-cells = <0>;
 454                         reg = <0x0 0x21b0000 0x0 0x10000>;
 455                         interrupts = <0 59 0x4>;
 456                         clock-names = "i2c";
 457                         clocks = <&clockgen 4 0>;
 458                         status = "disabled";
 459                 };
 460
 461                 duart0: serial@21c0500 {
 462                         compatible = "fsl,ns16550", "ns16550a";
 463                         reg = <0x00 0x21c0500 0x0 0x100>;
 464                         interrupts = <0 54 0x4>;
 465                         clocks = <&clockgen 4 0>;
 466                 };
 467
 468                 duart1: serial@21c0600 {
 469                         compatible = "fsl,ns16550", "ns16550a";
 470                         reg = <0x00 0x21c0600 0x0 0x100>;
 471                         interrupts = <0 54 0x4>;
 472                         clocks = <&clockgen 4 0>;
 473                 };
 474
 475                 duart2: serial@21d0500 {
 476                         compatible = "fsl,ns16550", "ns16550a";
 477                         reg = <0x0 0x21d0500 0x0 0x100>;
 478                         interrupts = <0 55 0x4>;
 479                         clocks = <&clockgen 4 0>;
 480                 };
 481
 482                 duart3: serial@21d0600 {
 483                         compatible = "fsl,ns16550", "ns16550a";
 484                         reg = <0x0 0x21d0600 0x0 0x100>;
 485                         interrupts = <0 55 0x4>;
 486                         clocks = <&clockgen 4 0>;
 487                 };
 488
 489                 gpio1: gpio@2300000 {
 490                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 491                         reg = <0x0 0x2300000 0x0 0x10000>;
 492                         interrupts = <0 66 0x4>;
 493                         gpio-controller;
 494                         #gpio-cells = <2>;
 495                         interrupt-controller;
 496                         #interrupt-cells = <2>;
 497                 };
 498
 499                 gpio2: gpio@2310000 {
 500                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 501                         reg = <0x0 0x2310000 0x0 0x10000>;
 502                         interrupts = <0 67 0x4>;
 503                         gpio-controller;
 504                         #gpio-cells = <2>;
 505                         interrupt-controller;
 506                         #interrupt-cells = <2>;
 507                 };
 508
 509                 gpio3: gpio@2320000 {
 510                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 511                         reg = <0x0 0x2320000 0x0 0x10000>;
 512                         interrupts = <0 68 0x4>;
 513                         gpio-controller;
 514                         #gpio-cells = <2>;
 515                         interrupt-controller;
 516                         #interrupt-cells = <2>;
 517                 };
 518
 519                 gpio4: gpio@2330000 {
 520                         compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio";
 521                         reg = <0x0 0x2330000 0x0 0x10000>;
 522                         interrupts = <0 134 0x4>;
 523                         gpio-controller;
 524                         #gpio-cells = <2>;
 525                         interrupt-controller;
 526                         #interrupt-cells = <2>;
 527                 };
 528
 529                 lpuart0: serial@2950000 {
 530                         compatible = "fsl,ls1021a-lpuart";
 531                         reg = <0x0 0x2950000 0x0 0x1000>;
 532                         interrupts = <0 48 0x4>;
 533                         clocks = <&clockgen 0 0>;
 534                         clock-names = "ipg";
 535                         status = "disabled";
 536                 };
 537
 538                 lpuart1: serial@2960000 {
 539                         compatible = "fsl,ls1021a-lpuart";
 540                         reg = <0x0 0x2960000 0x0 0x1000>;
 541                         interrupts = <0 49 0x4>;
 542                         clocks = <&clockgen 4 0>;
 543                         clock-names = "ipg";
 544                         status = "disabled";
 545                 };
 546
 547                 lpuart2: serial@2970000 {
 548                         compatible = "fsl,ls1021a-lpuart";
 549                         reg = <0x0 0x2970000 0x0 0x1000>;
 550                         interrupts = <0 50 0x4>;
 551                         clocks = <&clockgen 4 0>;
 552                         clock-names = "ipg";
 553                         status = "disabled";
 554                 };
 555
 556                 lpuart3: serial@2980000 {
 557                         compatible = "fsl,ls1021a-lpuart";
 558                         reg = <0x0 0x2980000 0x0 0x1000>;
 559                         interrupts = <0 51 0x4>;
 560                         clocks = <&clockgen 4 0>;
 561                         clock-names = "ipg";
 562                         status = "disabled";
 563                 };
 564
 565                 lpuart4: serial@2990000 {
 566                         compatible = "fsl,ls1021a-lpuart";
 567                         reg = <0x0 0x2990000 0x0 0x1000>;
 568                         interrupts = <0 52 0x4>;
 569                         clocks = <&clockgen 4 0>;
 570                         clock-names = "ipg";
 571                         status = "disabled";
 572                 };
 573
 574                 lpuart5: serial@29a0000 {
 575                         compatible = "fsl,ls1021a-lpuart";
 576                         reg = <0x0 0x29a0000 0x0 0x1000>;
 577                         interrupts = <0 53 0x4>;
 578                         clocks = <&clockgen 4 0>;
 579                         clock-names = "ipg";
 580                         status = "disabled";
 581                 };
 582
 583                 wdog0: wdog@2ad0000 {
 584                         compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt";
 585                         reg = <0x0 0x2ad0000 0x0 0x10000>;
 586                         interrupts = <0 83 0x4>;
 587                         clocks = <&clockgen 4 0>;
 588                         clock-names = "wdog";
 589                         big-endian;
 590                 };
 591
 592                 edma0: edma@2c00000 {
 593                         #dma-cells = <2>;
 594                         compatible = "fsl,vf610-edma";
 595                         reg = <0x0 0x2c00000 0x0 0x10000>,
 596                               <0x0 0x2c10000 0x0 0x10000>,
 597                               <0x0 0x2c20000 0x0 0x10000>;
 598                         interrupts = <0 103 0x4>,
 599                                      <0 103 0x4>;
 600                         interrupt-names = "edma-tx", "edma-err";
 601                         dma-channels = <32>;
 602                         big-endian;
 603                         clock-names = "dmamux0", "dmamux1";
 604                         clocks = <&clockgen 4 0>,
 605                                  <&clockgen 4 0>;
 606                 };
 607
 608                 usb0: usb3@2f00000 {
 609                         compatible = "snps,dwc3";
 610                         reg = <0x0 0x2f00000 0x0 0x10000>;
 611                         interrupts = <0 60 0x4>;
 612                         dr_mode = "host";
 613                         snps,quirk-frame-length-adjustment = <0x20>;
 614                         snps,dis_rxdet_inp3_quirk;
 615                         snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
 616                 };
 617
 618                 usb1: usb3@3000000 {
 619                         compatible = "snps,dwc3";
 620                         reg = <0x0 0x3000000 0x0 0x10000>;
 621                         interrupts = <0 61 0x4>;
 622                         dr_mode = "host";
 623                         snps,quirk-frame-length-adjustment = <0x20>;
 624                         snps,dis_rxdet_inp3_quirk;
 625                         snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
 626                 };
 627
 628                 usb2: usb3@3100000 {
 629                         compatible = "snps,dwc3";
 630                         reg = <0x0 0x3100000 0x0 0x10000>;
 631                         interrupts = <0 63 0x4>;
 632                         dr_mode = "host";
 633                         snps,quirk-frame-length-adjustment = <0x20>;
 634                         snps,dis_rxdet_inp3_quirk;
 635                         snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
 636                 };
 637
 638                 sata: sata@3200000 {
 639                         compatible = "fsl,ls1043a-ahci";
 640                         reg = <0x0 0x3200000 0x0 0x10000>,
 641                                 <0x0 0x20140520 0x0 0x4>;
 642                         reg-names = "ahci", "sata-ecc";
 643                         interrupts = <0 69 0x4>;
 644                         clocks = <&clockgen 4 0>;
 645                         dma-coherent;
 646                 };
 647
 648                 msi1: msi-controller1@1571000 {
 649                         compatible = "fsl,ls1043a-msi";
 650                         reg = <0x0 0x1571000 0x0 0x8>;
 651                         msi-controller;
 652                         interrupts = <0 116 0x4>;
 653                 };
 654
 655                 msi2: msi-controller2@1572000 {
 656                         compatible = "fsl,ls1043a-msi";
 657                         reg = <0x0 0x1572000 0x0 0x8>;
 658                         msi-controller;
 659                         interrupts = <0 126 0x4>;
 660                 };
 661
 662                 msi3: msi-controller3@1573000 {
 663                         compatible = "fsl,ls1043a-msi";
 664                         reg = <0x0 0x1573000 0x0 0x8>;
 665                         msi-controller;
 666                         interrupts = <0 160 0x4>;
 667                 };
 668
 669                 pcie@3400000 {
 670                         compatible = "fsl,ls1043a-pcie";
 671                         reg = <0x00 0x03400000 0x0 0x00100000   /* controller registers */
 672                                0x40 0x00000000 0x0 0x00002000>; /* configuration space */
 673                         reg-names = "regs", "config";
 674                         interrupts = <0 118 0x4>, /* controller interrupt */
 675                                      <0 117 0x4>; /* PME interrupt */
 676                         interrupt-names = "intr", "pme";
 677                         #address-cells = <3>;
 678                         #size-cells = <2>;
 679                         device_type = "pci";
 680                         dma-coherent;
 681                         num-viewport = <6>;
 682                         bus-range = <0x0 0xff>;
 683                         ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000   /* downstream I/O */
 684                                   0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 685                         msi-parent = <&msi1>, <&msi2>, <&msi3>;
 686                         #interrupt-cells = <1>;
 687                         interrupt-map-mask = <0 0 0 7>;
 688                         interrupt-map = <0000 0 0 1 &gic 0 110 0x4>,
 689                                         <0000 0 0 2 &gic 0 111 0x4>,
 690                                         <0000 0 0 3 &gic 0 112 0x4>,
 691                                         <0000 0 0 4 &gic 0 113 0x4>;
 692                         status = "disabled";
 693                 };
 694
 695                 pcie@3500000 {
 696                         compatible = "fsl,ls1043a-pcie";
 697                         reg = <0x00 0x03500000 0x0 0x00100000   /* controller registers */
 698                                0x48 0x00000000 0x0 0x00002000>; /* configuration space */
 699                         reg-names = "regs", "config";
 700                         interrupts = <0 128 0x4>,
 701                                      <0 127 0x4>;
 702                         interrupt-names = "intr", "pme";
 703                         #address-cells = <3>;
 704                         #size-cells = <2>;
 705                         device_type = "pci";
 706                         dma-coherent;
 707                         num-viewport = <6>;
 708                         bus-range = <0x0 0xff>;
 709                         ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000   /* downstream I/O */
 710                                   0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 711                         msi-parent = <&msi1>, <&msi2>, <&msi3>;
 712                         #interrupt-cells = <1>;
 713                         interrupt-map-mask = <0 0 0 7>;
 714                         interrupt-map = <0000 0 0 1 &gic 0 120  0x4>,
 715                                         <0000 0 0 2 &gic 0 121 0x4>,
 716                                         <0000 0 0 3 &gic 0 122 0x4>,
 717                                         <0000 0 0 4 &gic 0 123 0x4>;
 718                         status = "disabled";
 719                 };
 720
 721                 pcie@3600000 {
 722                         compatible = "fsl,ls1043a-pcie";
 723                         reg = <0x00 0x03600000 0x0 0x00100000   /* controller registers */
 724                                0x50 0x00000000 0x0 0x00002000>; /* configuration space */
 725                         reg-names = "regs", "config";
 726                         interrupts = <0 162 0x4>,
 727                                      <0 161 0x4>;
 728                         interrupt-names = "intr", "pme";
 729                         #address-cells = <3>;
 730                         #size-cells = <2>;
 731                         device_type = "pci";
 732                         dma-coherent;
 733                         num-viewport = <6>;
 734                         bus-range = <0x0 0xff>;
 735                         ranges = <0x81000000 0x0 0x00000000 0x50 0x00010000 0x0 0x00010000   /* downstream I/O */
 736                                   0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
 737                         msi-parent = <&msi1>, <&msi2>, <&msi3>;
 738                         #interrupt-cells = <1>;
 739                         interrupt-map-mask = <0 0 0 7>;
 740                         interrupt-map = <0000 0 0 1 &gic 0 154 0x4>,
 741                                         <0000 0 0 2 &gic 0 155 0x4>,
 742                                         <0000 0 0 3 &gic 0 156 0x4>,
 743                                         <0000 0 0 4 &gic 0 157 0x4>;
 744                         status = "disabled";
 745                 };
 746
 747                 qdma: dma-controller@8380000 {
 748                         compatible = "fsl,ls1021a-qdma", "fsl,ls1043a-qdma";
 749                         reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
 750                               <0x0 0x8390000 0x0 0x10000>, /* Status regs */
 751                               <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
 752                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
 753                                      <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 754                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 755                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 756                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
 757                         interrupt-names = "qdma-error", "qdma-queue0",
 758                                 "qdma-queue1", "qdma-queue2", "qdma-queue3";
 759                         dma-channels = <8>;
 760                         block-number = <1>;
 761                         block-offset = <0x10000>;
 762                         fsl,dma-queues = <2>;
 763                         status-sizes = <64>;
 764                         queue-sizes = <64 64>;
 765                         big-endian;
 766                 };
 767
 768         };
 769
 770         firmware {
 771                 optee {
 772                         compatible = "linaro,optee-tz";
 773                         method = "smc";
 774                 };
 775         };
 776
 777 };
 778
 779 #include "qoriq-qman-portals.dtsi"
 780 #include "qoriq-bman-portals.dtsi"