1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree file for NXP LS1028A QDS Board.
7 * Harninder Rai <harninder.rai@nxp.com>
13 #include "fsl-ls1028a.dtsi"
16 model = "LS1028A QDS Board";
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
32 stdout-path = "serial0:115200n8";
36 device_type = "memory";
37 reg = <0x0 0x80000000 0x1 0x00000000>;
40 sys_mclk: clock-mclk {
41 compatible = "fixed-clock";
43 clock-frequency = <25000000>;
46 reg_1p8v: regulator-1p8v {
47 compatible = "regulator-fixed";
48 regulator-name = "1P8V";
49 regulator-min-microvolt = <1800000>;
50 regulator-max-microvolt = <1800000>;
54 sb_3v3: regulator-sb3v3 {
55 compatible = "regulator-fixed";
56 regulator-name = "3v3_vbus";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
64 compatible = "simple-audio-card";
65 simple-audio-card,format = "i2s";
66 simple-audio-card,widgets =
67 "Microphone", "Microphone Jack",
68 "Headphone", "Headphone Jack",
69 "Speaker", "Speaker Ext",
70 "Line", "Line In Jack";
71 simple-audio-card,routing =
72 "MIC_IN", "Microphone Jack",
73 "Microphone Jack", "Mic Bias",
74 "LINE_IN", "Line In Jack",
75 "Headphone Jack", "HP_OUT",
76 "Speaker Ext", "LINE_OUT";
78 simple-audio-card,cpu {
84 simple-audio-card,codec {
85 sound-dai = <&sgtl5000>;
88 system-clock-frequency = <25000000>;
93 compatible = "mdio-mux-multiplexer";
94 mux-controls = <&mux 0>;
95 mdio-parent-bus = <&enetc_mdio_pf3>;
99 /* on-board RGMII PHY */
101 #address-cells = <1>;
105 qds_phy1: ethernet-phy@5 {
112 #address-cells = <1>;
118 #address-cells = <1>;
124 #address-cells = <1>;
130 #address-cells = <1>;
150 #address-cells = <1>;
152 compatible = "jedec,spi-nor";
156 spi-max-frequency = <10000000>;
160 #address-cells = <1>;
162 compatible = "jedec,spi-nor";
166 spi-max-frequency = <10000000>;
170 #address-cells = <1>;
172 compatible = "jedec,spi-nor";
176 spi-max-frequency = <10000000>;
185 #address-cells = <1>;
187 compatible = "jedec,spi-nor";
191 spi-max-frequency = <10000000>;
195 #address-cells = <1>;
197 compatible = "jedec,spi-nor";
201 spi-max-frequency = <10000000>;
205 #address-cells = <1>;
207 compatible = "jedec,spi-nor";
211 spi-max-frequency = <10000000>;
220 #address-cells = <1>;
222 compatible = "jedec,spi-nor";
226 spi-max-frequency = <10000000>;
239 phy-handle = <&qds_phy1>;
240 phy-mode = "rgmii-id";
259 mt35xu02g0: flash@0 {
260 compatible = "jedec,spi-nor";
261 #address-cells = <1>;
263 spi-max-frequency = <50000000>;
264 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
265 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
266 spi-tx-bus-width = <1>; /* 1 SPI Tx line */
279 compatible = "nxp,pca9547";
281 #address-cells = <1>;
285 #address-cells = <1>;
290 compatible = "ti,ina220";
292 shunt-resistor = <1000>;
296 compatible = "ti,ina220";
298 shunt-resistor = <1000>;
303 #address-cells = <1>;
307 temperature-sensor@4c {
308 compatible = "nxp,sa56004";
310 vcc-supply = <&sb_3v3>;
314 compatible = "atmel,24c512";
319 compatible = "atmel,24c512";
325 #address-cells = <1>;
329 sgtl5000: audio-codec@a {
330 #sound-dai-cells = <0>;
331 compatible = "fsl,sgtl5000";
333 VDDA-supply = <®_1p8v>;
334 VDDIO-supply = <®_1p8v>;
335 clocks = <&sys_mclk>;
341 compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
345 mux: mux-controller {
346 compatible = "reg-mux";
347 #mux-control-cells = <1>;
348 mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
358 compatible = "nxp,pcf2129";
372 ethernet = <&enetc_port2>;