1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree fragment for LS1028A QDS board, serdes 13bb
5 * Copyright 2019-2021 NXP
7 * Requires a LS1028A QDS board with lane B rework.
8 * Requires a SCH-30841 card with lane A of connector rewired to PHY lane C.
9 * Set-up is a SCH-30842 card in slot 1 and SCH-30841 in slot 2.
19 slot1_sgmii: ethernet-phy@2 {
22 compatible = "ethernet-phy-ieee802.3-c45";
27 phy-handle = <&slot1_sgmii>;
29 managed = "in-band-status";
37 /* 4 ports on AQR412 */
38 slot2_qxgmii0: ethernet-phy@0 {
40 compatible = "ethernet-phy-ieee802.3-c45";
43 slot2_qxgmii1: ethernet-phy@1 {
45 compatible = "ethernet-phy-ieee802.3-c45";
48 slot2_qxgmii2: ethernet-phy@2 {
50 compatible = "ethernet-phy-ieee802.3-c45";
53 slot2_qxgmii3: ethernet-phy@3 {
55 compatible = "ethernet-phy-ieee802.3-c45";
62 phy-handle = <&slot2_qxgmii0>;
64 managed = "in-band-status";
69 phy-handle = <&slot2_qxgmii1>;
71 managed = "in-band-status";
76 phy-handle = <&slot2_qxgmii2>;
78 managed = "in-band-status";
83 phy-handle = <&slot2_qxgmii3>;
85 managed = "in-band-status";