2 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
4 * Copyright 2016 Freescale Semiconductor, Inc.
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPLv2 or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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45 #include <dt-bindings/interrupt-controller/arm-gic.h>
46 #include <dt-bindings/thermal/thermal.h>
49 compatible = "fsl,ls1012a";
50 interrupt-parent = <&gic>;
69 compatible = "arm,cortex-a53";
71 clocks = <&clockgen 1 0>;
77 compatible = "fixed-clock";
79 clock-frequency = <125000000>;
80 clock-output-names = "sysclk";
84 compatible = "fixed-clock";
86 clock-frequency = <100000000>;
87 clock-output-names = "coreclk";
91 compatible = "arm,armv8-timer";
92 interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
93 <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
94 <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
95 <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
99 compatible = "arm,armv8-pmuv3";
100 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
103 gic: interrupt-controller@1400000 {
104 compatible = "arm,gic-400";
105 #interrupt-cells = <3>;
106 interrupt-controller;
107 reg = <0x0 0x1401000 0 0x1000>, /* GICD */
108 <0x0 0x1402000 0 0x2000>, /* GICC */
109 <0x0 0x1404000 0 0x2000>, /* GICH */
110 <0x0 0x1406000 0 0x2000>; /* GICV */
111 interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
115 compatible = "syscon-reboot";
122 compatible = "simple-bus";
123 #address-cells = <2>;
127 esdhc0: esdhc@1560000 {
128 compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
129 reg = <0x0 0x1560000 0x0 0x10000>;
130 interrupts = <0 62 0x4>;
131 clocks = <&clockgen 4 0>;
132 voltage-ranges = <1800 1800 3300 3300>;
140 compatible = "fsl,ls1012a-scfg", "syscon";
141 reg = <0x0 0x1570000 0x0 0x10000>;
145 esdhc1: esdhc@1580000 {
146 compatible = "fsl,ls1012a-esdhc", "fsl,esdhc";
147 reg = <0x0 0x1580000 0x0 0x10000>;
148 interrupts = <0 65 0x4>;
149 clocks = <&clockgen 4 0>;
150 voltage-ranges = <1800 1800 3300 3300>;
158 crypto: crypto@1700000 {
159 compatible = "fsl,sec-v5.4", "fsl,sec-v5.0",
162 #address-cells = <1>;
164 ranges = <0x0 0x00 0x1700000 0x100000>;
165 reg = <0x00 0x1700000 0x0 0x100000>;
166 interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
170 compatible = "fsl,sec-v5.4-job-ring",
171 "fsl,sec-v5.0-job-ring",
172 "fsl,sec-v4.0-job-ring";
173 reg = <0x10000 0x10000>;
174 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
178 compatible = "fsl,sec-v5.4-job-ring",
179 "fsl,sec-v5.0-job-ring",
180 "fsl,sec-v4.0-job-ring";
181 reg = <0x20000 0x10000>;
182 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
186 compatible = "fsl,sec-v5.4-job-ring",
187 "fsl,sec-v5.0-job-ring",
188 "fsl,sec-v4.0-job-ring";
189 reg = <0x30000 0x10000>;
190 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
194 compatible = "fsl,sec-v5.4-job-ring",
195 "fsl,sec-v5.0-job-ring",
196 "fsl,sec-v4.0-job-ring";
197 reg = <0x40000 0x10000>;
198 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
202 compatible = "fsl,sec-v5.4-rtic",
205 #address-cells = <1>;
207 reg = <0x60000 0x100 0x60e00 0x18>;
208 ranges = <0x0 0x60100 0x500>;
211 compatible = "fsl,sec-v5.4-rtic-memory",
212 "fsl,sec-v5.0-rtic-memory",
213 "fsl,sec-v4.0-rtic-memory";
214 reg = <0x00 0x20 0x100 0x100>;
218 compatible = "fsl,sec-v5.4-rtic-memory",
219 "fsl,sec-v5.0-rtic-memory",
220 "fsl,sec-v4.0-rtic-memory";
221 reg = <0x20 0x20 0x200 0x100>;
225 compatible = "fsl,sec-v5.4-rtic-memory",
226 "fsl,sec-v5.0-rtic-memory",
227 "fsl,sec-v4.0-rtic-memory";
228 reg = <0x40 0x20 0x300 0x100>;
232 compatible = "fsl,sec-v5.4-rtic-memory",
233 "fsl,sec-v5.0-rtic-memory",
234 "fsl,sec-v4.0-rtic-memory";
235 reg = <0x60 0x20 0x400 0x100>;
240 sec_mon: sec_mon@1e90000 {
241 compatible = "fsl,sec-v5.4-mon", "fsl,sec-v5.0-mon",
243 reg = <0x0 0x1e90000 0x0 0x10000>;
244 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
245 <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
249 compatible = "fsl,ls1012a-dcfg",
251 reg = <0x0 0x1ee0000 0x0 0x10000>;
255 clockgen: clocking@1ee1000 {
256 compatible = "fsl,ls1012a-clockgen";
257 reg = <0x0 0x1ee1000 0x0 0x1000>;
259 clocks = <&sysclk &coreclk>;
260 clock-names = "sysclk", "coreclk";
264 compatible = "fsl,qoriq-tmu";
265 reg = <0x0 0x1f00000 0x0 0x10000>;
266 interrupts = <0 33 0x4>;
267 fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
268 fsl,tmu-calibration = <0x00000000 0x00000026
269 0x00000001 0x0000002d
270 0x00000002 0x00000032
271 0x00000003 0x00000039
272 0x00000004 0x0000003f
273 0x00000005 0x00000046
274 0x00000006 0x0000004d
275 0x00000007 0x00000054
276 0x00000008 0x0000005a
277 0x00000009 0x00000061
278 0x0000000a 0x0000006a
279 0x0000000b 0x00000071
281 0x00010000 0x00000025
282 0x00010001 0x0000002c
283 0x00010002 0x00000035
284 0x00010003 0x0000003d
285 0x00010004 0x00000045
286 0x00010005 0x0000004e
287 0x00010006 0x00000057
288 0x00010007 0x00000061
289 0x00010008 0x0000006b
290 0x00010009 0x00000076
292 0x00020000 0x00000029
293 0x00020001 0x00000033
294 0x00020002 0x0000003d
295 0x00020003 0x00000049
296 0x00020004 0x00000056
297 0x00020005 0x00000061
298 0x00020006 0x0000006d
300 0x00030000 0x00000021
301 0x00030001 0x0000002a
302 0x00030002 0x0000003c
303 0x00030003 0x0000004e>;
305 #thermal-sensor-cells = <1>;
309 cpu_thermal: cpu-thermal {
310 polling-delay-passive = <1000>;
311 polling-delay = <5000>;
312 thermal-sensors = <&tmu 0>;
315 cpu_alert: cpu-alert {
316 temperature = <85000>;
322 temperature = <95000>;
332 <&cpu0 THERMAL_NO_LIMIT
340 compatible = "fsl,vf610-i2c";
341 #address-cells = <1>;
343 reg = <0x0 0x2180000 0x0 0x10000>;
344 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
345 clocks = <&clockgen 4 0>;
350 compatible = "fsl,vf610-i2c";
351 #address-cells = <1>;
353 reg = <0x0 0x2190000 0x0 0x10000>;
354 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
355 clocks = <&clockgen 4 0>;
359 duart0: serial@21c0500 {
360 compatible = "fsl,ns16550", "ns16550a";
361 reg = <0x00 0x21c0500 0x0 0x100>;
362 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
363 clocks = <&clockgen 4 0>;
367 duart1: serial@21c0600 {
368 compatible = "fsl,ns16550", "ns16550a";
369 reg = <0x00 0x21c0600 0x0 0x100>;
370 interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
371 clocks = <&clockgen 4 0>;
375 gpio0: gpio@2300000 {
376 compatible = "fsl,qoriq-gpio";
377 reg = <0x0 0x2300000 0x0 0x10000>;
378 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
381 interrupt-controller;
382 #interrupt-cells = <2>;
385 gpio1: gpio@2310000 {
386 compatible = "fsl,qoriq-gpio";
387 reg = <0x0 0x2310000 0x0 0x10000>;
388 interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
391 interrupt-controller;
392 #interrupt-cells = <2>;
395 wdog0: wdog@2ad0000 {
396 compatible = "fsl,ls1012a-wdt",
398 reg = <0x0 0x2ad0000 0x0 0x10000>;
399 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
400 clocks = <&clockgen 4 0>;
405 #sound-dai-cells = <0>;
406 compatible = "fsl,vf610-sai";
407 reg = <0x0 0x2b50000 0x0 0x10000>;
408 interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
409 clocks = <&clockgen 4 3>, <&clockgen 4 3>,
410 <&clockgen 4 3>, <&clockgen 4 3>;
411 clock-names = "bus", "mclk1", "mclk2", "mclk3";
412 dma-names = "tx", "rx";
413 dmas = <&edma0 1 47>,
419 #sound-dai-cells = <0>;
420 compatible = "fsl,vf610-sai";
421 reg = <0x0 0x2b60000 0x0 0x10000>;
422 interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
423 clocks = <&clockgen 4 3>, <&clockgen 4 3>,
424 <&clockgen 4 3>, <&clockgen 4 3>;
425 clock-names = "bus", "mclk1", "mclk2", "mclk3";
426 dma-names = "tx", "rx";
427 dmas = <&edma0 1 45>,
432 edma0: edma@2c00000 {
434 compatible = "fsl,vf610-edma";
435 reg = <0x0 0x2c00000 0x0 0x10000>,
436 <0x0 0x2c10000 0x0 0x10000>,
437 <0x0 0x2c20000 0x0 0x10000>;
438 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
439 <0 103 IRQ_TYPE_LEVEL_HIGH>;
440 interrupt-names = "edma-tx", "edma-err";
443 clock-names = "dmamux0", "dmamux1";
444 clocks = <&clockgen 4 3>,
449 compatible = "snps,dwc3";
450 reg = <0x0 0x2f00000 0x0 0x10000>;
451 interrupts = <0 60 0x4>;
453 snps,quirk-frame-length-adjustment = <0x20>;
454 snps,dis_rxdet_inp3_quirk;
458 compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
459 reg = <0x0 0x3200000 0x0 0x10000>,
460 <0x0 0x20140520 0x0 0x4>;
461 reg-names = "ahci", "sata-ecc";
462 interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
463 clocks = <&clockgen 4 0>;
469 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
470 reg = <0x0 0x8600000 0x0 0x1000>;
471 interrupts = <0 139 0x4>;