1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2022 Broadcom Ltd.
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 compatible = "brcm,bcm4912", "brcm,bcmbca";
14 interrupt-parent = <&gic>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
29 compatible = "brcm,brahma-b53";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
37 compatible = "brcm,brahma-b53";
40 next-level-cache = <&L2_0>;
41 enable-method = "psci";
45 compatible = "brcm,brahma-b53";
48 next-level-cache = <&L2_0>;
49 enable-method = "psci";
60 compatible = "arm,armv8-timer";
61 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
62 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
63 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
64 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
68 compatible = "arm,cortex-a53-pmu";
69 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
70 <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
71 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
72 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
73 interrupt-affinity = <&B53_0>, <&B53_1>,
78 periph_clk: periph-clk {
79 compatible = "fixed-clock";
81 clock-frequency = <200000000>;
85 compatible = "fixed-factor-clock";
87 clocks = <&periph_clk>;
92 hsspi_pll: hsspi-pll {
93 compatible = "fixed-clock";
95 clock-frequency = <200000000>;
100 compatible = "arm,psci-0.2";
105 compatible = "simple-bus";
106 #address-cells = <1>;
108 ranges = <0x0 0x0 0x81000000 0x8000>;
110 gic: interrupt-controller@1000 {
111 compatible = "arm,gic-400";
112 #interrupt-cells = <3>;
113 interrupt-controller;
114 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
115 reg = <0x1000 0x1000>,
123 compatible = "simple-bus";
124 #address-cells = <1>;
126 ranges = <0x0 0x0 0xff800000 0x800000>;
129 #address-cells = <1>;
131 compatible = "brcm,bcm4912-hsspi", "brcm,bcmbca-hsspi-v1.1";
132 reg = <0x1000 0x600>, <0x2610 0x4>;
133 reg-names = "hsspi", "spim-ctrl";
134 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
135 clocks = <&hsspi_pll &hsspi_pll>;
136 clock-names = "hsspi", "pll";
141 uart0: serial@12000 {
142 compatible = "arm,pl011", "arm,primecell";
143 reg = <0x12000 0x1000>;
144 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
145 clocks = <&uart_clk>, <&uart_clk>;
146 clock-names = "uartclk", "apb_pclk";