1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/phy/phy.h>
6 #include <dt-bindings/soc/bcm-pmb.h>
11 interrupt-parent = <&gic>;
21 stdout-path = "serial0:115200n8";
30 compatible = "brcm,brahma-b53";
32 enable-method = "spin-table";
33 cpu-release-addr = <0x0 0xfff8>;
34 next-level-cache = <&l2>;
39 compatible = "brcm,brahma-b53";
41 enable-method = "spin-table";
42 cpu-release-addr = <0x0 0xfff8>;
43 next-level-cache = <&l2>;
48 compatible = "brcm,brahma-b53";
50 enable-method = "spin-table";
51 cpu-release-addr = <0x0 0xfff8>;
52 next-level-cache = <&l2>;
57 compatible = "brcm,brahma-b53";
59 enable-method = "spin-table";
60 cpu-release-addr = <0x0 0xfff8>;
61 next-level-cache = <&l2>;
72 compatible = "simple-bus";
75 ranges = <0x00 0x00 0x81000000 0x4000>;
77 gic: interrupt-controller@1000 {
78 compatible = "arm,gic-400";
79 #interrupt-cells = <3>;
82 reg = <0x1000 0x1000>,
88 compatible = "arm,armv8-timer";
89 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
90 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
91 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
92 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
96 compatible = "arm,cortex-a53-pmu";
97 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
98 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
99 <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
100 <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
101 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
105 periph_clk: periph_clk {
106 compatible = "fixed-clock";
108 clock-frequency = <50000000>;
109 clock-output-names = "periph";
112 hsspi_pll: hsspi-pll {
113 compatible = "fixed-clock";
115 clock-frequency = <400000000>;
120 compatible = "simple-bus";
121 #address-cells = <1>;
123 ranges = <0x00 0x00 0x80000000 0x281000>;
125 enet: ethernet@2000 {
126 compatible = "brcm,bcm4908-enet";
127 reg = <0x2000 0x1000>;
129 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
130 <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
131 interrupt-names = "rx", "tx";
134 usb_phy: usb-phy@c200 {
135 compatible = "brcm,bcm4908-usb-phy";
136 reg = <0xc200 0x100>;
138 power-domains = <&pmb BCM_PMB_HOST_USB>;
147 compatible = "generic-ehci";
148 reg = <0xc300 0x100>;
149 interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
150 phys = <&usb_phy PHY_TYPE_USB2>;
153 #address-cells = <1>;
158 #trigger-source-cells = <0>;
163 #trigger-source-cells = <0>;
168 compatible = "generic-ohci";
169 reg = <0xc400 0x100>;
170 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
171 phys = <&usb_phy PHY_TYPE_USB2>;
174 #address-cells = <1>;
179 #trigger-source-cells = <0>;
184 #trigger-source-cells = <0>;
189 compatible = "generic-xhci";
190 reg = <0xd000 0x8c8>;
191 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
192 phys = <&usb_phy PHY_TYPE_USB3>;
195 #address-cells = <1>;
200 #trigger-source-cells = <0>;
205 #trigger-source-cells = <0>;
210 compatible = "simple-bus";
212 #address-cells = <1>;
213 ranges = <0 0x80000 0x50000>;
216 compatible = "brcm,bcm4908-switch";
223 reg-names = "core", "reg", "intrl2_0",
224 "intrl2_1", "fcb", "acb";
225 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
226 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
228 brcm,num-rgmii-ports = <2>;
230 #address-cells = <1>;
234 #address-cells = <1>;
239 phy-mode = "internal";
240 phy-handle = <&phy8>;
245 phy-mode = "internal";
246 phy-handle = <&phy9>;
251 phy-mode = "internal";
252 phy-handle = <&phy10>;
257 phy-mode = "internal";
258 phy-handle = <&phy11>;
263 phy-mode = "internal";
275 compatible = "brcm,unimac-mdio";
279 #address-cells = <1>;
281 phy8: ethernet-phy@8 {
285 phy9: ethernet-phy@9 {
289 phy10: ethernet-phy@a {
293 phy11: ethernet-phy@b {
297 phy12: ethernet-phy@c {
303 procmon: bus@280000 {
304 compatible = "simple-bus";
305 reg = <0x280000 0x1000>;
308 #address-cells = <1>;
311 pmb: power-controller@2800c0 {
312 compatible = "brcm,bcm4908-pmb";
313 reg = <0x2800c0 0x40>;
314 #power-domain-cells = <1>;
320 compatible = "simple-bus";
321 #address-cells = <1>;
323 ranges = <0x00 0x00 0xff800000 0x3000>;
326 compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
328 ranges = <0x0 0x400 0x4c>;
330 #address-cells = <1>;
334 compatible = "brcm,bcm63138-timer";
339 compatible = "brcm,bcm6345-wdt";
344 gpio0: gpio-controller@500 {
345 compatible = "brcm,bcm6345-gpio";
346 reg-names = "dirout", "dat";
347 reg = <0x500 0x28>, <0x528 0x28>;
354 compatible = "brcm,bcm4908-pinctrl";
357 pins_led_0_a: led_0-a-pins {
359 groups = "led_0_grp_a";
362 pins_led_1_a: led_1-a-pins {
364 groups = "led_1_grp_a";
367 pins_led_2_a: led_2-a-pins {
369 groups = "led_2_grp_a";
372 pins_led_3_a: led_3-a-pins {
374 groups = "led_3_grp_a";
377 pins_led_4_a: led_4-a-pins {
379 groups = "led_4_grp_a";
382 pins_led_5_a: led_5-a-pins {
384 groups = "led_5_grp_a";
387 pins_led_6_a: led_6-a-pins {
389 groups = "led_6_grp_a";
392 pins_led_7_a: led_7-a-pins {
394 groups = "led_7_grp_a";
397 pins_led_8_a: led_8-a-pins {
399 groups = "led_8_grp_a";
402 pins_led_9_a: led_9-a-pins {
404 groups = "led_9_grp_a";
407 pins_led_10_a: led_10-a-pins {
409 groups = "led_10_grp_a";
412 pins_led_11_a: led_11-a-pins {
414 groups = "led_11_grp_a";
417 pins_led_12_a: led_12-a-pins {
419 groups = "led_12_grp_a";
422 pins_led_13_a: led_13-a-pins {
424 groups = "led_13_grp_a";
427 pins_led_14_a: led_14-a-pins {
429 groups = "led_14_grp_a";
432 pins_led_15_a: led_15-a-pins {
434 groups = "led_15_grp_a";
437 pins_led_16_a: led_16-a-pins {
439 groups = "led_16_grp_a";
442 pins_led_17_a: led_17-a-pins {
444 groups = "led_17_grp_a";
447 pins_led_18_a: led_18-a-pins {
449 groups = "led_18_grp_a";
452 pins_led_19_a: led_19-a-pins {
454 groups = "led_19_grp_a";
457 pins_led_20_a: led_20-a-pins {
459 groups = "led_20_grp_a";
462 pins_led_21_a: led_21-a-pins {
464 groups = "led_21_grp_a";
467 pins_led_22_a: led_22-a-pins {
469 groups = "led_22_grp_a";
472 pins_led_23_a: led_23-a-pins {
474 groups = "led_23_grp_a";
477 pins_led_24_a: led_24-a-pins {
479 groups = "led_24_grp_a";
482 pins_led_25_a: led_25-a-pins {
484 groups = "led_25_grp_a";
487 pins_led_26_a: led_26-a-pins {
489 groups = "led_26_grp_a";
492 pins_led_27_a: led_27-a-pins {
494 groups = "led_27_grp_a";
497 pins_led_28_a: led_28-a-pins {
499 groups = "led_28_grp_a";
502 pins_led_29_a: led_29-a-pins {
504 groups = "led_29_grp_a";
507 pins_led_30_a: led_30-a-pins {
509 groups = "led_30_grp_a";
512 pins_led_31_a: led_31-a-pins {
514 groups = "led_31_grp_a";
517 pins_hs_uart: hs_uart-pins {
518 function = "hs_uart";
519 groups = "hs_uart_grp";
522 pins_i2c_a: i2c-a-pins {
524 groups = "i2c_grp_a";
527 pins_i2c_b: i2c-b-pins {
529 groups = "i2c_grp_b";
537 pins_nand_ctrl: nand_ctrl-pins {
538 function = "nand_ctrl";
539 groups = "nand_ctrl_grp";
542 pins_nand_data: nand_data-pins {
543 function = "nand_data";
544 groups = "nand_data_grp";
547 pins_emmc_ctrl: emmc_ctrl-pins {
548 function = "emmc_ctrl";
549 groups = "emmc_ctrl_grp";
552 pins_usb0_pwr: usb0_pwr-pins {
553 function = "usb0_pwr";
554 groups = "usb0_pwr_grp";
557 pins_usb1_pwr: usb1_pwr-pins {
558 function = "usb1_pwr";
559 groups = "usb1_pwr_grp";
564 compatible = "brcm,bcm6345-uart";
566 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
567 clocks = <&periph_clk>;
568 clock-names = "refclk";
573 compatible = "brcm,bcm4908-leds", "brcm,bcm63138-leds";
576 #address-cells = <1>;
581 #address-cells = <1>;
583 compatible = "brcm,bcm4908-hsspi", "brcm,bcmbca-hsspi-v1.0";
584 reg = <0x1000 0x600>;
585 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
586 clocks = <&hsspi_pll &hsspi_pll>;
587 clock-names = "hsspi", "pll";
592 nand-controller@1800 {
593 #address-cells = <1>;
595 compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.1", "brcm,brcmnand";
596 reg = <0x1800 0x600>, <0x2000 0x10>;
597 reg-names = "nand", "nand-int-base";
598 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
599 interrupt-names = "nand_ctlrdy";
603 compatible = "brcm,nandcs";
609 compatible = "brcm,brcmper-i2c";
611 clock-frequency = <97500>;
612 pinctrl-names = "default";
613 pinctrl-0 = <&pins_i2c_a>;
618 compatible = "brcm,misc", "simple-mfd";
621 #address-cells = <1>;
623 ranges = <0x00 0x2600 0xe4>;
625 reset-controller@2644 {
626 compatible = "brcm,bcm4908-misc-pcie-reset";
634 compatible = "syscon-reboot";