arch/arm64/boot/dts/apple/t8103.dtsi

   1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
   2 /*
   3  * Apple T8103 "M1" SoC
   4  *
   5  * Other names: H13G, "Tonga"
   6  *
   7  * Copyright The Asahi Linux Contributors
   8  */
   9
  10 #include <dt-bindings/gpio/gpio.h>
  11 #include <dt-bindings/interrupt-controller/apple-aic.h>
  12 #include <dt-bindings/interrupt-controller/irq.h>
  13 #include <dt-bindings/pinctrl/apple.h>
  14
  15 / {
  16         compatible = "apple,t8103", "apple,arm-platform";
  17
  18         #address-cells = <2>;
  19         #size-cells = <2>;
  20
  21         cpus {
  22                 #address-cells = <2>;
  23                 #size-cells = <0>;
  24
  25                 cpu0: cpu@0 {
  26                         compatible = "apple,icestorm";
  27                         device_type = "cpu";
  28                         reg = <0x0 0x0>;
  29                         enable-method = "spin-table";
  30                         cpu-release-addr = <0 0>; /* To be filled by loader */
  31                 };
  32
  33                 cpu1: cpu@1 {
  34                         compatible = "apple,icestorm";
  35                         device_type = "cpu";
  36                         reg = <0x0 0x1>;
  37                         enable-method = "spin-table";
  38                         cpu-release-addr = <0 0>; /* To be filled by loader */
  39                 };
  40
  41                 cpu2: cpu@2 {
  42                         compatible = "apple,icestorm";
  43                         device_type = "cpu";
  44                         reg = <0x0 0x2>;
  45                         enable-method = "spin-table";
  46                         cpu-release-addr = <0 0>; /* To be filled by loader */
  47                 };
  48
  49                 cpu3: cpu@3 {
  50                         compatible = "apple,icestorm";
  51                         device_type = "cpu";
  52                         reg = <0x0 0x3>;
  53                         enable-method = "spin-table";
  54                         cpu-release-addr = <0 0>; /* To be filled by loader */
  55                 };
  56
  57                 cpu4: cpu@10100 {
  58                         compatible = "apple,firestorm";
  59                         device_type = "cpu";
  60                         reg = <0x0 0x10100>;
  61                         enable-method = "spin-table";
  62                         cpu-release-addr = <0 0>; /* To be filled by loader */
  63                 };
  64
  65                 cpu5: cpu@10101 {
  66                         compatible = "apple,firestorm";
  67                         device_type = "cpu";
  68                         reg = <0x0 0x10101>;
  69                         enable-method = "spin-table";
  70                         cpu-release-addr = <0 0>; /* To be filled by loader */
  71                 };
  72
  73                 cpu6: cpu@10102 {
  74                         compatible = "apple,firestorm";
  75                         device_type = "cpu";
  76                         reg = <0x0 0x10102>;
  77                         enable-method = "spin-table";
  78                         cpu-release-addr = <0 0>; /* To be filled by loader */
  79                 };
  80
  81                 cpu7: cpu@10103 {
  82                         compatible = "apple,firestorm";
  83                         device_type = "cpu";
  84                         reg = <0x0 0x10103>;
  85                         enable-method = "spin-table";
  86                         cpu-release-addr = <0 0>; /* To be filled by loader */
  87                 };
  88         };
  89
  90         timer {
  91                 compatible = "arm,armv8-timer";
  92                 interrupt-parent = <&aic>;
  93                 interrupt-names = "phys", "virt", "hyp-phys", "hyp-virt";
  94                 interrupts = <AIC_FIQ AIC_TMR_GUEST_PHYS IRQ_TYPE_LEVEL_HIGH>,
  95                              <AIC_FIQ AIC_TMR_GUEST_VIRT IRQ_TYPE_LEVEL_HIGH>,
  96                              <AIC_FIQ AIC_TMR_HV_PHYS IRQ_TYPE_LEVEL_HIGH>,
  97                              <AIC_FIQ AIC_TMR_HV_VIRT IRQ_TYPE_LEVEL_HIGH>;
  98         };
  99
 100         pmu-e {
 101                 compatible = "apple,icestorm-pmu";
 102                 interrupt-parent = <&aic>;
 103                 interrupts = <AIC_FIQ AIC_CPU_PMU_E IRQ_TYPE_LEVEL_HIGH>;
 104         };
 105
 106         pmu-p {
 107                 compatible = "apple,firestorm-pmu";
 108                 interrupt-parent = <&aic>;
 109                 interrupts = <AIC_FIQ AIC_CPU_PMU_P IRQ_TYPE_LEVEL_HIGH>;
 110         };
 111
 112         clkref: clock-ref {
 113                 compatible = "fixed-clock";
 114                 #clock-cells = <0>;
 115                 clock-frequency = <24000000>;
 116                 clock-output-names = "clkref";
 117         };
 118
 119         soc {
 120                 compatible = "simple-bus";
 121                 #address-cells = <2>;
 122                 #size-cells = <2>;
 123
 124                 ranges;
 125                 nonposted-mmio;
 126
 127                 i2c0: i2c@235010000 {
 128                         compatible = "apple,t8103-i2c", "apple,i2c";
 129                         reg = <0x2 0x35010000 0x0 0x4000>;
 130                         clocks = <&clkref>;
 131                         interrupt-parent = <&aic>;
 132                         interrupts = <AIC_IRQ 627 IRQ_TYPE_LEVEL_HIGH>;
 133                         pinctrl-0 = <&i2c0_pins>;
 134                         pinctrl-names = "default";
 135                         #address-cells = <0x1>;
 136                         #size-cells = <0x0>;
 137                         power-domains = <&ps_i2c0>;
 138                 };
 139
 140                 i2c1: i2c@235014000 {
 141                         compatible = "apple,t8103-i2c", "apple,i2c";
 142                         reg = <0x2 0x35014000 0x0 0x4000>;
 143                         clocks = <&clkref>;
 144                         interrupt-parent = <&aic>;
 145                         interrupts = <AIC_IRQ 628 IRQ_TYPE_LEVEL_HIGH>;
 146                         pinctrl-0 = <&i2c1_pins>;
 147                         pinctrl-names = "default";
 148                         #address-cells = <0x1>;
 149                         #size-cells = <0x0>;
 150                         power-domains = <&ps_i2c1>;
 151                 };
 152
 153                 i2c2: i2c@235018000 {
 154                         compatible = "apple,t8103-i2c", "apple,i2c";
 155                         reg = <0x2 0x35018000 0x0 0x4000>;
 156                         clocks = <&clkref>;
 157                         interrupt-parent = <&aic>;
 158                         interrupts = <AIC_IRQ 629 IRQ_TYPE_LEVEL_HIGH>;
 159                         pinctrl-0 = <&i2c2_pins>;
 160                         pinctrl-names = "default";
 161                         #address-cells = <0x1>;
 162                         #size-cells = <0x0>;
 163                         status = "disabled"; /* not used in all devices */
 164                         power-domains = <&ps_i2c2>;
 165                 };
 166
 167                 i2c3: i2c@23501c000 {
 168                         compatible = "apple,t8103-i2c", "apple,i2c";
 169                         reg = <0x2 0x3501c000 0x0 0x4000>;
 170                         clocks = <&clkref>;
 171                         interrupt-parent = <&aic>;
 172                         interrupts = <AIC_IRQ 630 IRQ_TYPE_LEVEL_HIGH>;
 173                         pinctrl-0 = <&i2c3_pins>;
 174                         pinctrl-names = "default";
 175                         #address-cells = <0x1>;
 176                         #size-cells = <0x0>;
 177                         power-domains = <&ps_i2c3>;
 178                 };
 179
 180                 i2c4: i2c@235020000 {
 181                         compatible = "apple,t8103-i2c", "apple,i2c";
 182                         reg = <0x2 0x35020000 0x0 0x4000>;
 183                         clocks = <&clkref>;
 184                         interrupt-parent = <&aic>;
 185                         interrupts = <AIC_IRQ 631 IRQ_TYPE_LEVEL_HIGH>;
 186                         pinctrl-0 = <&i2c4_pins>;
 187                         pinctrl-names = "default";
 188                         #address-cells = <0x1>;
 189                         #size-cells = <0x0>;
 190                         power-domains = <&ps_i2c4>;
 191                         status = "disabled"; /* only used in J293 */
 192                 };
 193
 194                 serial0: serial@235200000 {
 195                         compatible = "apple,s5l-uart";
 196                         reg = <0x2 0x35200000 0x0 0x1000>;
 197                         reg-io-width = <4>;
 198                         interrupt-parent = <&aic>;
 199                         interrupts = <AIC_IRQ 605 IRQ_TYPE_LEVEL_HIGH>;
 200                         /*
 201                          * TODO: figure out the clocking properly, there may
 202                          * be a third selectable clock.
 203                          */
 204                         clocks = <&clkref>, <&clkref>;
 205                         clock-names = "uart", "clk_uart_baud0";
 206                         power-domains = <&ps_uart0>;
 207                         status = "disabled";
 208                 };
 209
 210                 serial2: serial@235208000 {
 211                         compatible = "apple,s5l-uart";
 212                         reg = <0x2 0x35208000 0x0 0x1000>;
 213                         reg-io-width = <4>;
 214                         interrupt-parent = <&aic>;
 215                         interrupts = <AIC_IRQ 607 IRQ_TYPE_LEVEL_HIGH>;
 216                         clocks = <&clkref>, <&clkref>;
 217                         clock-names = "uart", "clk_uart_baud0";
 218                         power-domains = <&ps_uart2>;
 219                         status = "disabled";
 220                 };
 221
 222                 aic: interrupt-controller@23b100000 {
 223                         compatible = "apple,t8103-aic", "apple,aic";
 224                         #interrupt-cells = <3>;
 225                         interrupt-controller;
 226                         reg = <0x2 0x3b100000 0x0 0x8000>;
 227                         power-domains = <&ps_aic>;
 228
 229                         affinities {
 230                                 e-core-pmu-affinity {
 231                                         apple,fiq-index = <AIC_CPU_PMU_E>;
 232                                         cpus = <&cpu0 &cpu1 &cpu2 &cpu3>;
 233                                 };
 234
 235                                 p-core-pmu-affinity {
 236                                         apple,fiq-index = <AIC_CPU_PMU_P>;
 237                                         cpus = <&cpu4 &cpu5 &cpu6 &cpu7>;
 238                                 };
 239                         };
 240                 };
 241
 242                 pmgr: power-management@23b700000 {
 243                         compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
 244                         #address-cells = <1>;
 245                         #size-cells = <1>;
 246                         reg = <0x2 0x3b700000 0 0x14000>;
 247                 };
 248
 249                 pinctrl_ap: pinctrl@23c100000 {
 250                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 251                         reg = <0x2 0x3c100000 0x0 0x100000>;
 252                         power-domains = <&ps_gpio>;
 253
 254                         gpio-controller;
 255                         #gpio-cells = <2>;
 256                         gpio-ranges = <&pinctrl_ap 0 0 212>;
 257                         apple,npins = <212>;
 258
 259                         interrupt-controller;
 260                         #interrupt-cells = <2>;
 261                         interrupt-parent = <&aic>;
 262                         interrupts = <AIC_IRQ 190 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <AIC_IRQ 191 IRQ_TYPE_LEVEL_HIGH>,
 264                                      <AIC_IRQ 192 IRQ_TYPE_LEVEL_HIGH>,
 265                                      <AIC_IRQ 193 IRQ_TYPE_LEVEL_HIGH>,
 266                                      <AIC_IRQ 194 IRQ_TYPE_LEVEL_HIGH>,
 267                                      <AIC_IRQ 195 IRQ_TYPE_LEVEL_HIGH>,
 268                                      <AIC_IRQ 196 IRQ_TYPE_LEVEL_HIGH>;
 269
 270                         i2c0_pins: i2c0-pins {
 271                                 pinmux = <APPLE_PINMUX(192, 1)>,
 272                                          <APPLE_PINMUX(188, 1)>;
 273                         };
 274
 275                         i2c1_pins: i2c1-pins {
 276                                 pinmux = <APPLE_PINMUX(201, 1)>,
 277                                          <APPLE_PINMUX(199, 1)>;
 278                         };
 279
 280                         i2c2_pins: i2c2-pins {
 281                                 pinmux = <APPLE_PINMUX(163, 1)>,
 282                                          <APPLE_PINMUX(162, 1)>;
 283                         };
 284
 285                         i2c3_pins: i2c3-pins {
 286                                 pinmux = <APPLE_PINMUX(73, 1)>,
 287                                          <APPLE_PINMUX(72, 1)>;
 288                         };
 289
 290                         i2c4_pins: i2c4-pins {
 291                                 pinmux = <APPLE_PINMUX(135, 1)>,
 292                                          <APPLE_PINMUX(134, 1)>;
 293                         };
 294
 295                         pcie_pins: pcie-pins {
 296                                 pinmux = <APPLE_PINMUX(150, 1)>,
 297                                          <APPLE_PINMUX(151, 1)>,
 298                                          <APPLE_PINMUX(32, 1)>;
 299                         };
 300                 };
 301
 302                 pinctrl_nub: pinctrl@23d1f0000 {
 303                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 304                         reg = <0x2 0x3d1f0000 0x0 0x4000>;
 305                         power-domains = <&ps_nub_gpio>;
 306
 307                         gpio-controller;
 308                         #gpio-cells = <2>;
 309                         gpio-ranges = <&pinctrl_nub 0 0 23>;
 310                         apple,npins = <23>;
 311
 312                         interrupt-controller;
 313                         #interrupt-cells = <2>;
 314                         interrupt-parent = <&aic>;
 315                         interrupts = <AIC_IRQ 330 IRQ_TYPE_LEVEL_HIGH>,
 316                                      <AIC_IRQ 331 IRQ_TYPE_LEVEL_HIGH>,
 317                                      <AIC_IRQ 332 IRQ_TYPE_LEVEL_HIGH>,
 318                                      <AIC_IRQ 333 IRQ_TYPE_LEVEL_HIGH>,
 319                                      <AIC_IRQ 334 IRQ_TYPE_LEVEL_HIGH>,
 320                                      <AIC_IRQ 335 IRQ_TYPE_LEVEL_HIGH>,
 321                                      <AIC_IRQ 336 IRQ_TYPE_LEVEL_HIGH>;
 322                 };
 323
 324                 pmgr_mini: power-management@23d280000 {
 325                         compatible = "apple,t8103-pmgr", "apple,pmgr", "syscon", "simple-mfd";
 326                         #address-cells = <1>;
 327                         #size-cells = <1>;
 328                         reg = <0x2 0x3d280000 0 0x4000>;
 329                 };
 330
 331                 wdt: watchdog@23d2b0000 {
 332                         compatible = "apple,t8103-wdt", "apple,wdt";
 333                         reg = <0x2 0x3d2b0000 0x0 0x4000>;
 334                         clocks = <&clkref>;
 335                         interrupt-parent = <&aic>;
 336                         interrupts = <AIC_IRQ 338 IRQ_TYPE_LEVEL_HIGH>;
 337                 };
 338
 339                 pinctrl_smc: pinctrl@23e820000 {
 340                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 341                         reg = <0x2 0x3e820000 0x0 0x4000>;
 342
 343                         gpio-controller;
 344                         #gpio-cells = <2>;
 345                         gpio-ranges = <&pinctrl_smc 0 0 16>;
 346                         apple,npins = <16>;
 347
 348                         interrupt-controller;
 349                         #interrupt-cells = <2>;
 350                         interrupt-parent = <&aic>;
 351                         interrupts = <AIC_IRQ 391 IRQ_TYPE_LEVEL_HIGH>,
 352                                      <AIC_IRQ 392 IRQ_TYPE_LEVEL_HIGH>,
 353                                      <AIC_IRQ 393 IRQ_TYPE_LEVEL_HIGH>,
 354                                      <AIC_IRQ 394 IRQ_TYPE_LEVEL_HIGH>,
 355                                      <AIC_IRQ 395 IRQ_TYPE_LEVEL_HIGH>,
 356                                      <AIC_IRQ 396 IRQ_TYPE_LEVEL_HIGH>,
 357                                      <AIC_IRQ 397 IRQ_TYPE_LEVEL_HIGH>;
 358                 };
 359
 360                 pinctrl_aop: pinctrl@24a820000 {
 361                         compatible = "apple,t8103-pinctrl", "apple,pinctrl";
 362                         reg = <0x2 0x4a820000 0x0 0x4000>;
 363
 364                         gpio-controller;
 365                         #gpio-cells = <2>;
 366                         gpio-ranges = <&pinctrl_aop 0 0 42>;
 367                         apple,npins = <42>;
 368
 369                         interrupt-controller;
 370                         #interrupt-cells = <2>;
 371                         interrupt-parent = <&aic>;
 372                         interrupts = <AIC_IRQ 268 IRQ_TYPE_LEVEL_HIGH>,
 373                                      <AIC_IRQ 269 IRQ_TYPE_LEVEL_HIGH>,
 374                                      <AIC_IRQ 270 IRQ_TYPE_LEVEL_HIGH>,
 375                                      <AIC_IRQ 271 IRQ_TYPE_LEVEL_HIGH>,
 376                                      <AIC_IRQ 272 IRQ_TYPE_LEVEL_HIGH>,
 377                                      <AIC_IRQ 273 IRQ_TYPE_LEVEL_HIGH>,
 378                                      <AIC_IRQ 274 IRQ_TYPE_LEVEL_HIGH>;
 379                 };
 380
 381                 ans_mbox: mbox@277408000 {
 382                         compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
 383                         reg = <0x2 0x77408000 0x0 0x4000>;
 384                         interrupt-parent = <&aic>;
 385                         interrupts = <AIC_IRQ 583 IRQ_TYPE_LEVEL_HIGH>,
 386                                 <AIC_IRQ 584 IRQ_TYPE_LEVEL_HIGH>,
 387                                 <AIC_IRQ 585 IRQ_TYPE_LEVEL_HIGH>,
 388                                 <AIC_IRQ 586 IRQ_TYPE_LEVEL_HIGH>;
 389                         interrupt-names = "send-empty", "send-not-empty",
 390                                 "recv-empty", "recv-not-empty";
 391                         #mbox-cells = <0>;
 392                         power-domains = <&ps_ans2>;
 393                 };
 394
 395                 sart: iommu@27bc50000 {
 396                         compatible = "apple,t8103-sart";
 397                         reg = <0x2 0x7bc50000 0x0 0x10000>;
 398                         power-domains = <&ps_ans2>;
 399                 };
 400
 401                 nvme@27bcc0000 {
 402                         compatible = "apple,t8103-nvme-ans2", "apple,nvme-ans2";
 403                         reg = <0x2 0x7bcc0000 0x0 0x40000>,
 404                                 <0x2 0x77400000 0x0 0x4000>;
 405                         reg-names = "nvme", "ans";
 406                         interrupt-parent = <&aic>;
 407                         interrupts = <AIC_IRQ 590 IRQ_TYPE_LEVEL_HIGH>;
 408                         mboxes = <&ans_mbox>;
 409                         apple,sart = <&sart>;
 410                         power-domains = <&ps_ans2>, <&ps_apcie_st>;
 411                         power-domain-names = "ans", "apcie0";
 412                         resets = <&ps_ans2>;
 413                 };
 414
 415                 pcie0_dart_0: iommu@681008000 {
 416                         compatible = "apple,t8103-dart";
 417                         reg = <0x6 0x81008000 0x0 0x4000>;
 418                         #iommu-cells = <1>;
 419                         interrupt-parent = <&aic>;
 420                         interrupts = <AIC_IRQ 696 IRQ_TYPE_LEVEL_HIGH>;
 421                         power-domains = <&ps_apcie_gp>;
 422                 };
 423
 424                 pcie0_dart_1: iommu@682008000 {
 425                         compatible = "apple,t8103-dart";
 426                         reg = <0x6 0x82008000 0x0 0x4000>;
 427                         #iommu-cells = <1>;
 428                         interrupt-parent = <&aic>;
 429                         interrupts = <AIC_IRQ 699 IRQ_TYPE_LEVEL_HIGH>;
 430                         power-domains = <&ps_apcie_gp>;
 431                         status = "disabled";
 432                 };
 433
 434                 pcie0_dart_2: iommu@683008000 {
 435                         compatible = "apple,t8103-dart";
 436                         reg = <0x6 0x83008000 0x0 0x4000>;
 437                         #iommu-cells = <1>;
 438                         interrupt-parent = <&aic>;
 439                         interrupts = <AIC_IRQ 702 IRQ_TYPE_LEVEL_HIGH>;
 440                         power-domains = <&ps_apcie_gp>;
 441                         status = "disabled";
 442                 };
 443
 444                 pcie0: pcie@690000000 {
 445                         compatible = "apple,t8103-pcie", "apple,pcie";
 446                         device_type = "pci";
 447
 448                         reg = <0x6 0x90000000 0x0 0x1000000>,
 449                               <0x6 0x80000000 0x0 0x100000>,
 450                               <0x6 0x81000000 0x0 0x4000>,
 451                               <0x6 0x82000000 0x0 0x4000>,
 452                               <0x6 0x83000000 0x0 0x4000>;
 453                         reg-names = "config", "rc", "port0", "port1", "port2";
 454
 455                         interrupt-parent = <&aic>;
 456                         interrupts = <AIC_IRQ 695 IRQ_TYPE_LEVEL_HIGH>,
 457                                      <AIC_IRQ 698 IRQ_TYPE_LEVEL_HIGH>,
 458                                      <AIC_IRQ 701 IRQ_TYPE_LEVEL_HIGH>;
 459
 460                         msi-controller;
 461                         msi-parent = <&pcie0>;
 462                         msi-ranges = <&aic AIC_IRQ 704 IRQ_TYPE_EDGE_RISING 32>;
 463
 464
 465                         iommu-map = <0x100 &pcie0_dart_0 1 1>,
 466                                     <0x200 &pcie0_dart_1 1 1>,
 467                                     <0x300 &pcie0_dart_2 1 1>;
 468                         iommu-map-mask = <0xff00>;
 469
 470                         bus-range = <0 3>;
 471                         #address-cells = <3>;
 472                         #size-cells = <2>;
 473                         ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
 474                                  <0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
 475
 476                         power-domains = <&ps_apcie_gp>;
 477                         pinctrl-0 = <&pcie_pins>;
 478                         pinctrl-names = "default";
 479
 480                         port00: pci@0,0 {
 481                                 device_type = "pci";
 482                                 reg = <0x0 0x0 0x0 0x0 0x0>;
 483                                 reset-gpios = <&pinctrl_ap 152 GPIO_ACTIVE_LOW>;
 484
 485                                 #address-cells = <3>;
 486                                 #size-cells = <2>;
 487                                 ranges;
 488
 489                                 interrupt-controller;
 490                                 #interrupt-cells = <1>;
 491
 492                                 interrupt-map-mask = <0 0 0 7>;
 493                                 interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
 494                                                 <0 0 0 2 &port00 0 0 0 1>,
 495                                                 <0 0 0 3 &port00 0 0 0 2>,
 496                                                 <0 0 0 4 &port00 0 0 0 3>;
 497                         };
 498
 499                         port01: pci@1,0 {
 500                                 device_type = "pci";
 501                                 reg = <0x800 0x0 0x0 0x0 0x0>;
 502                                 reset-gpios = <&pinctrl_ap 153 GPIO_ACTIVE_LOW>;
 503
 504                                 #address-cells = <3>;
 505                                 #size-cells = <2>;
 506                                 ranges;
 507
 508                                 interrupt-controller;
 509                                 #interrupt-cells = <1>;
 510
 511                                 interrupt-map-mask = <0 0 0 7>;
 512                                 interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
 513                                                 <0 0 0 2 &port01 0 0 0 1>,
 514                                                 <0 0 0 3 &port01 0 0 0 2>,
 515                                                 <0 0 0 4 &port01 0 0 0 3>;
 516                                 status = "disabled";
 517                         };
 518
 519                         port02: pci@2,0 {
 520                                 device_type = "pci";
 521                                 reg = <0x1000 0x0 0x0 0x0 0x0>;
 522                                 reset-gpios = <&pinctrl_ap 33 GPIO_ACTIVE_LOW>;
 523
 524                                 #address-cells = <3>;
 525                                 #size-cells = <2>;
 526                                 ranges;
 527
 528                                 interrupt-controller;
 529                                 #interrupt-cells = <1>;
 530
 531                                 interrupt-map-mask = <0 0 0 7>;
 532                                 interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
 533                                                 <0 0 0 2 &port02 0 0 0 1>,
 534                                                 <0 0 0 3 &port02 0 0 0 2>,
 535                                                 <0 0 0 4 &port02 0 0 0 3>;
 536                                 status = "disabled";
 537                         };
 538                 };
 539         };
 540 };
 541
 542 #include "t8103-pmgr.dtsi"