arm64: dts: qcom: sm8550: add TRNG node
[linux-modified.git] / arch / arm64 / boot / dts / apple / t600x-die0.dtsi
1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
2 /*
3  * Devices used on die 0 on the Apple T6002 "M1 Ultra" SoC and present on
4  * Apple T6000 / T6001 "M1 Pro" / "M1 Max".
5  *
6  * Copyright The Asahi Linux Contributors
7  */
8
9
10         nco: clock-controller@28e03c000 {
11                 compatible = "apple,t6000-nco", "apple,nco";
12                 reg = <0x2 0x8e03c000 0x0 0x14000>;
13                 clocks = <&nco_clkref>;
14                 #clock-cells = <1>;
15         };
16
17         aic: interrupt-controller@28e100000 {
18                 compatible = "apple,t6000-aic", "apple,aic2";
19                 #interrupt-cells = <4>;
20                 interrupt-controller;
21                 reg = <0x2 0x8e100000 0x0 0xc000>,
22                         <0x2 0x8e10c000 0x0 0x4>;
23                 reg-names = "core", "event";
24                 power-domains = <&ps_aic>;
25         };
26
27         pinctrl_smc: pinctrl@290820000 {
28                 compatible = "apple,t6000-pinctrl", "apple,pinctrl";
29                 reg = <0x2 0x90820000 0x0 0x4000>;
30
31                 gpio-controller;
32                 #gpio-cells = <2>;
33                 gpio-ranges = <&pinctrl_smc 0 0 30>;
34                 apple,npins = <30>;
35
36                 interrupt-controller;
37                 #interrupt-cells = <2>;
38                 interrupt-parent = <&aic>;
39                 interrupts = <AIC_IRQ 0 743 IRQ_TYPE_LEVEL_HIGH>,
40                                 <AIC_IRQ 0 744 IRQ_TYPE_LEVEL_HIGH>,
41                                 <AIC_IRQ 0 745 IRQ_TYPE_LEVEL_HIGH>,
42                                 <AIC_IRQ 0 746 IRQ_TYPE_LEVEL_HIGH>,
43                                 <AIC_IRQ 0 747 IRQ_TYPE_LEVEL_HIGH>,
44                                 <AIC_IRQ 0 748 IRQ_TYPE_LEVEL_HIGH>,
45                                 <AIC_IRQ 0 749 IRQ_TYPE_LEVEL_HIGH>;
46         };
47
48         wdt: watchdog@2922b0000 {
49                 compatible = "apple,t6000-wdt", "apple,wdt";
50                 reg = <0x2 0x922b0000 0x0 0x4000>;
51                 clocks = <&clkref>;
52                 interrupt-parent = <&aic>;
53                 interrupts = <AIC_IRQ 0 631 IRQ_TYPE_LEVEL_HIGH>;
54         };
55
56         sio_dart_0: iommu@39b004000 {
57                 compatible = "apple,t6000-dart";
58                 reg = <0x3 0x9b004000 0x0 0x4000>;
59                 interrupt-parent = <&aic>;
60                 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
61                 #iommu-cells = <1>;
62                 power-domains = <&ps_sio_cpu>;
63         };
64
65         sio_dart_1: iommu@39b008000 {
66                 compatible = "apple,t6000-dart";
67                 reg = <0x3 0x9b008000 0x0 0x8000>;
68                 interrupt-parent = <&aic>;
69                 interrupts = <AIC_IRQ 0 1130 IRQ_TYPE_LEVEL_HIGH>;
70                 #iommu-cells = <1>;
71                 power-domains = <&ps_sio_cpu>;
72         };
73
74         fpwm0: pwm@39b030000 {
75                 compatible = "apple,t6000-fpwm", "apple,s5l-fpwm";
76                 reg = <0x3 0x9b030000 0x0 0x4000>;
77                 power-domains = <&ps_fpwm0>;
78                 clocks = <&clkref>;
79                 #pwm-cells = <2>;
80                 status = "disabled";
81         };
82
83         i2c0: i2c@39b040000 {
84                 compatible = "apple,t6000-i2c", "apple,i2c";
85                 reg = <0x3 0x9b040000 0x0 0x4000>;
86                 clocks = <&clkref>;
87                 interrupt-parent = <&aic>;
88                 interrupts = <AIC_IRQ 0 1119 IRQ_TYPE_LEVEL_HIGH>;
89                 pinctrl-0 = <&i2c0_pins>;
90                 pinctrl-names = "default";
91                 power-domains = <&ps_i2c0>;
92                 #address-cells = <0x1>;
93                 #size-cells = <0x0>;
94         };
95
96         i2c1: i2c@39b044000 {
97                 compatible = "apple,t6000-i2c", "apple,i2c";
98                 reg = <0x3 0x9b044000 0x0 0x4000>;
99                 clocks = <&clkref>;
100                 interrupt-parent = <&aic>;
101                 interrupts = <AIC_IRQ 0 1120 IRQ_TYPE_LEVEL_HIGH>;
102                 pinctrl-0 = <&i2c1_pins>;
103                 pinctrl-names = "default";
104                 power-domains = <&ps_i2c1>;
105                 #address-cells = <0x1>;
106                 #size-cells = <0x0>;
107                 status = "disabled";
108         };
109
110         i2c2: i2c@39b048000 {
111                 compatible = "apple,t6000-i2c", "apple,i2c";
112                 reg = <0x3 0x9b048000 0x0 0x4000>;
113                 clocks = <&clkref>;
114                 interrupt-parent = <&aic>;
115                 interrupts = <AIC_IRQ 0 1121 IRQ_TYPE_LEVEL_HIGH>;
116                 pinctrl-0 = <&i2c2_pins>;
117                 pinctrl-names = "default";
118                 power-domains = <&ps_i2c2>;
119                 #address-cells = <0x1>;
120                 #size-cells = <0x0>;
121                 status = "disabled";
122         };
123
124         i2c3: i2c@39b04c000 {
125                 compatible = "apple,t6000-i2c", "apple,i2c";
126                 reg = <0x3 0x9b04c000 0x0 0x4000>;
127                 clocks = <&clkref>;
128                 interrupt-parent = <&aic>;
129                 interrupts = <AIC_IRQ 0 1122 IRQ_TYPE_LEVEL_HIGH>;
130                 pinctrl-0 = <&i2c3_pins>;
131                 pinctrl-names = "default";
132                 power-domains = <&ps_i2c3>;
133                 #address-cells = <0x1>;
134                 #size-cells = <0x0>;
135                 status = "disabled";
136         };
137
138         i2c4: i2c@39b050000 {
139                 compatible = "apple,t6000-i2c", "apple,i2c";
140                 reg = <0x3 0x9b050000 0x0 0x4000>;
141                 clocks = <&clkref>;
142                 interrupt-parent = <&aic>;
143                 interrupts = <AIC_IRQ 0 1123 IRQ_TYPE_LEVEL_HIGH>;
144                 pinctrl-0 = <&i2c4_pins>;
145                 pinctrl-names = "default";
146                 power-domains = <&ps_i2c4>;
147                 #address-cells = <0x1>;
148                 #size-cells = <0x0>;
149                 status = "disabled";
150         };
151
152         i2c5: i2c@39b054000 {
153                 compatible = "apple,t6000-i2c", "apple,i2c";
154                 reg = <0x3 0x9b054000 0x0 0x4000>;
155                 clocks = <&clkref>;
156                 interrupt-parent = <&aic>;
157                 interrupts = <AIC_IRQ 0 1124 IRQ_TYPE_LEVEL_HIGH>;
158                 pinctrl-0 = <&i2c5_pins>;
159                 pinctrl-names = "default";
160                 power-domains = <&ps_i2c5>;
161                 #address-cells = <0x1>;
162                 #size-cells = <0x0>;
163                 status = "disabled";
164         };
165
166         serial0: serial@39b200000 {
167                 compatible = "apple,s5l-uart";
168                 reg = <0x3 0x9b200000 0x0 0x1000>;
169                 reg-io-width = <4>;
170                 interrupt-parent = <&aic>;
171                 interrupts = <AIC_IRQ 0 1097 IRQ_TYPE_LEVEL_HIGH>;
172                 /*
173                  * TODO: figure out the clocking properly, there may
174                  * be a third selectable clock.
175                  */
176                 clocks = <&clkref>, <&clkref>;
177                 clock-names = "uart", "clk_uart_baud0";
178                 power-domains = <&ps_uart0>;
179                 status = "disabled";
180         };
181
182         admac: dma-controller@39b400000 {
183                 compatible = "apple,t6000-admac", "apple,admac";
184                 reg = <0x3 0x9b400000 0x0 0x34000>;
185                 #dma-cells = <1>;
186                 dma-channels = <16>;
187                 interrupts-extended = <0>,
188                                       <&aic AIC_IRQ 0 1118 IRQ_TYPE_LEVEL_HIGH>,
189                                       <0>,
190                                       <0>;
191                 iommus = <&sio_dart_0 2>, <&sio_dart_1 2>;
192                 power-domains = <&ps_sio_adma>;
193                 resets = <&ps_audio_p>;
194         };
195
196         mca: mca@39b600000 {
197                 compatible = "apple,t6000-mca", "apple,mca";
198                 reg = <0x3 0x9b600000 0x0 0x10000>,
199                       <0x3 0x9b500000 0x0 0x20000>;
200                 clocks = <&nco 0>, <&nco 1>, <&nco 2>, <&nco 3>;
201                 dmas = <&admac 0>, <&admac 1>, <&admac 2>, <&admac 3>,
202                        <&admac 4>, <&admac 5>, <&admac 6>, <&admac 7>,
203                        <&admac 8>, <&admac 9>, <&admac 10>, <&admac 11>,
204                        <&admac 12>, <&admac 13>, <&admac 14>, <&admac 15>;
205                 dma-names = "tx0a", "rx0a", "tx0b", "rx0b",
206                             "tx1a", "rx1a", "tx1b", "rx1b",
207                             "tx2a", "rx2a", "tx2b", "rx2b",
208                             "tx3a", "rx3a", "tx3b", "rx3b";
209                 interrupt-parent = <&aic>;
210                 interrupts = <AIC_IRQ 0 1112 IRQ_TYPE_LEVEL_HIGH>,
211                              <AIC_IRQ 0 1113 IRQ_TYPE_LEVEL_HIGH>,
212                              <AIC_IRQ 0 1114 IRQ_TYPE_LEVEL_HIGH>,
213                              <AIC_IRQ 0 1115 IRQ_TYPE_LEVEL_HIGH>;
214                 power-domains = <&ps_audio_p>, <&ps_mca0>, <&ps_mca1>,
215                                 <&ps_mca2>, <&ps_mca3>;
216                 resets = <&ps_audio_p>;
217                 #sound-dai-cells = <1>;
218         };
219
220         pcie0_dart_0: iommu@581008000 {
221                 compatible = "apple,t6000-dart";
222                 reg = <0x5 0x81008000 0x0 0x4000>;
223                 #iommu-cells = <1>;
224                 interrupt-parent = <&aic>;
225                 interrupts = <AIC_IRQ 0 1271 IRQ_TYPE_LEVEL_HIGH>;
226                 power-domains = <&ps_apcie_gp_sys>;
227         };
228
229         pcie0_dart_1: iommu@582008000 {
230                 compatible = "apple,t6000-dart";
231                 reg = <0x5 0x82008000 0x0 0x4000>;
232                 #iommu-cells = <1>;
233                 interrupt-parent = <&aic>;
234                 interrupts = <AIC_IRQ 0 1274 IRQ_TYPE_LEVEL_HIGH>;
235                 power-domains = <&ps_apcie_gp_sys>;
236         };
237
238         pcie0_dart_2: iommu@583008000 {
239                 compatible = "apple,t6000-dart";
240                 reg = <0x5 0x83008000 0x0 0x4000>;
241                 #iommu-cells = <1>;
242                 interrupt-parent = <&aic>;
243                 interrupts = <AIC_IRQ 0 1277 IRQ_TYPE_LEVEL_HIGH>;
244                 power-domains = <&ps_apcie_gp_sys>;
245                 status = "disabled";
246         };
247
248         pcie0_dart_3: iommu@584008000 {
249                 compatible = "apple,t6000-dart";
250                 reg = <0x5 0x84008000 0x0 0x4000>;
251                 #iommu-cells = <1>;
252                 interrupt-parent = <&aic>;
253                 interrupts = <AIC_IRQ 0 1280 IRQ_TYPE_LEVEL_HIGH>;
254                 power-domains = <&ps_apcie_gp_sys>;
255                 status = "disabled";
256         };
257
258         pcie0: pcie@590000000 {
259                 compatible = "apple,t6000-pcie", "apple,pcie";
260                 device_type = "pci";
261
262                 reg = <0x5 0x90000000 0x0 0x1000000>,
263                         <0x5 0x80000000 0x0 0x100000>,
264                         <0x5 0x81000000 0x0 0x4000>,
265                         <0x5 0x82000000 0x0 0x4000>,
266                         <0x5 0x83000000 0x0 0x4000>,
267                         <0x5 0x84000000 0x0 0x4000>;
268                 reg-names = "config", "rc", "port0", "port1", "port2", "port3";
269
270                 interrupt-parent = <&aic>;
271                 interrupts = <AIC_IRQ 0 1270 IRQ_TYPE_LEVEL_HIGH>,
272                                 <AIC_IRQ 0 1273 IRQ_TYPE_LEVEL_HIGH>,
273                                 <AIC_IRQ 0 1276 IRQ_TYPE_LEVEL_HIGH>,
274                                 <AIC_IRQ 0 1279 IRQ_TYPE_LEVEL_HIGH>;
275
276                 msi-controller;
277                 msi-parent = <&pcie0>;
278                 msi-ranges = <&aic AIC_IRQ 0 1581 IRQ_TYPE_EDGE_RISING 32>;
279
280
281                 iommu-map = <0x100 &pcie0_dart_0 1 1>,
282                                 <0x200 &pcie0_dart_1 1 1>,
283                                 <0x300 &pcie0_dart_2 1 1>,
284                                 <0x400 &pcie0_dart_3 1 1>;
285                 iommu-map-mask = <0xff00>;
286
287                 bus-range = <0 4>;
288                 #address-cells = <3>;
289                 #size-cells = <2>;
290                 ranges = <0x43000000 0x5 0xa0000000 0x5 0xa0000000 0x0 0x20000000>,
291                                 <0x02000000 0x0 0xc0000000 0x5 0xc0000000 0x0 0x40000000>;
292
293                 power-domains = <&ps_apcie_gp_sys>;
294                 pinctrl-0 = <&pcie_pins>;
295                 pinctrl-names = "default";
296
297                 port00: pci@0,0 {
298                         device_type = "pci";
299                         reg = <0x0 0x0 0x0 0x0 0x0>;
300                         reset-gpios = <&pinctrl_ap 4 GPIO_ACTIVE_LOW>;
301
302                         #address-cells = <3>;
303                         #size-cells = <2>;
304                         ranges;
305
306                         interrupt-controller;
307                         #interrupt-cells = <1>;
308
309                         interrupt-map-mask = <0 0 0 7>;
310                         interrupt-map = <0 0 0 1 &port00 0 0 0 0>,
311                                         <0 0 0 2 &port00 0 0 0 1>,
312                                         <0 0 0 3 &port00 0 0 0 2>,
313                                         <0 0 0 4 &port00 0 0 0 3>;
314                 };
315
316                 port01: pci@1,0 {
317                         device_type = "pci";
318                         reg = <0x800 0x0 0x0 0x0 0x0>;
319                         reset-gpios = <&pinctrl_ap 5 GPIO_ACTIVE_LOW>;
320
321                         #address-cells = <3>;
322                         #size-cells = <2>;
323                         ranges;
324
325                         interrupt-controller;
326                         #interrupt-cells = <1>;
327
328                         interrupt-map-mask = <0 0 0 7>;
329                         interrupt-map = <0 0 0 1 &port01 0 0 0 0>,
330                                         <0 0 0 2 &port01 0 0 0 1>,
331                                         <0 0 0 3 &port01 0 0 0 2>,
332                                         <0 0 0 4 &port01 0 0 0 3>;
333                 };
334
335                 port02: pci@2,0 {
336                         device_type = "pci";
337                         reg = <0x1000 0x0 0x0 0x0 0x0>;
338                         reset-gpios = <&pinctrl_ap 6 GPIO_ACTIVE_LOW>;
339
340                         #address-cells = <3>;
341                         #size-cells = <2>;
342                         ranges;
343
344                         interrupt-controller;
345                         #interrupt-cells = <1>;
346
347                         interrupt-map-mask = <0 0 0 7>;
348                         interrupt-map = <0 0 0 1 &port02 0 0 0 0>,
349                                         <0 0 0 2 &port02 0 0 0 1>,
350                                         <0 0 0 3 &port02 0 0 0 2>,
351                                         <0 0 0 4 &port02 0 0 0 3>;
352                         status = "disabled";
353                 };
354
355                 port03: pci@3,0 {
356                         device_type = "pci";
357                         reg = <0x1800 0x0 0x0 0x0 0x0>;
358                         reset-gpios = <&pinctrl_ap 7 GPIO_ACTIVE_LOW>;
359
360                         #address-cells = <3>;
361                         #size-cells = <2>;
362                         ranges;
363
364                         interrupt-controller;
365                         #interrupt-cells = <1>;
366
367                         interrupt-map-mask = <0 0 0 7>;
368                         interrupt-map = <0 0 0 1 &port03 0 0 0 0>,
369                                         <0 0 0 2 &port03 0 0 0 1>,
370                                         <0 0 0 3 &port03 0 0 0 2>,
371                                         <0 0 0 4 &port03 0 0 0 3>;
372                         status = "disabled";
373                 };
374         };