GNU Linux-libre 5.4.274-gnu1
[releases.git] / arch / arm64 / boot / dts / amlogic / meson-sm1.dtsi
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (c) 2019 BayLibre, SAS
4  * Author: Neil Armstrong <narmstrong@baylibre.com>
5  */
6
7 #include "meson-g12-common.dtsi"
8 #include <dt-bindings/power/meson-sm1-power.h>
9
10 / {
11         compatible = "amlogic,sm1";
12
13         cpus {
14                 #address-cells = <0x2>;
15                 #size-cells = <0x0>;
16
17                 cpu0: cpu@0 {
18                         device_type = "cpu";
19                         compatible = "arm,cortex-a55";
20                         reg = <0x0 0x0>;
21                         enable-method = "psci";
22                         next-level-cache = <&l2>;
23                 };
24
25                 cpu1: cpu@1 {
26                         device_type = "cpu";
27                         compatible = "arm,cortex-a55";
28                         reg = <0x0 0x1>;
29                         enable-method = "psci";
30                         next-level-cache = <&l2>;
31                 };
32
33                 cpu2: cpu@2 {
34                         device_type = "cpu";
35                         compatible = "arm,cortex-a55";
36                         reg = <0x0 0x2>;
37                         enable-method = "psci";
38                         next-level-cache = <&l2>;
39                 };
40
41                 cpu3: cpu@3 {
42                         device_type = "cpu";
43                         compatible = "arm,cortex-a55";
44                         reg = <0x0 0x3>;
45                         enable-method = "psci";
46                         next-level-cache = <&l2>;
47                 };
48
49                 l2: l2-cache0 {
50                         compatible = "cache";
51                 };
52         };
53
54         cpu_opp_table: opp-table {
55                 compatible = "operating-points-v2";
56                 opp-shared;
57
58                 opp-1000000000 {
59                         opp-hz = /bits/ 64 <1000000000>;
60                         opp-microvolt = <770000>;
61                 };
62
63                 opp-1200000000 {
64                         opp-hz = /bits/ 64 <1200000000>;
65                         opp-microvolt = <780000>;
66                 };
67
68                 opp-1404000000 {
69                         opp-hz = /bits/ 64 <1404000000>;
70                         opp-microvolt = <790000>;
71                 };
72
73                 opp-1500000000 {
74                         opp-hz = /bits/ 64 <1500000000>;
75                         opp-microvolt = <800000>;
76                 };
77
78                 opp-1608000000 {
79                         opp-hz = /bits/ 64 <1608000000>;
80                         opp-microvolt = <810000>;
81                 };
82
83                 opp-1704000000 {
84                         opp-hz = /bits/ 64 <1704000000>;
85                         opp-microvolt = <850000>;
86                 };
87
88                 opp-1800000000 {
89                         opp-hz = /bits/ 64 <1800000000>;
90                         opp-microvolt = <900000>;
91                 };
92
93                 opp-1908000000 {
94                         opp-hz = /bits/ 64 <1908000000>;
95                         opp-microvolt = <950000>;
96                 };
97         };
98 };
99
100 &cecb_AO {
101         compatible = "amlogic,meson-sm1-ao-cec";
102 };
103
104 &clk_msr {
105         compatible = "amlogic,meson-sm1-clk-measure";
106 };
107
108
109 &clkc {
110         compatible = "amlogic,sm1-clkc";
111 };
112
113 &ethmac {
114         power-domains = <&pwrc PWRC_SM1_ETH_ID>;
115 };
116
117 &pwrc {
118         compatible = "amlogic,meson-sm1-pwrc";
119 };
120
121 &vpu {
122         power-domains = <&pwrc PWRC_SM1_VPU_ID>;
123 };
124
125 &usb {
126         power-domains = <&pwrc PWRC_SM1_USB_ID>;
127 };