1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 #include "meson-g12-common.dtsi"
8 #include <dt-bindings/power/meson-sm1-power.h>
11 compatible = "amlogic,sm1";
14 #address-cells = <0x2>;
19 compatible = "arm,cortex-a55";
21 enable-method = "psci";
22 next-level-cache = <&l2>;
27 compatible = "arm,cortex-a55";
29 enable-method = "psci";
30 next-level-cache = <&l2>;
35 compatible = "arm,cortex-a55";
37 enable-method = "psci";
38 next-level-cache = <&l2>;
43 compatible = "arm,cortex-a55";
45 enable-method = "psci";
46 next-level-cache = <&l2>;
54 cpu_opp_table: opp-table {
55 compatible = "operating-points-v2";
59 opp-hz = /bits/ 64 <1000000000>;
60 opp-microvolt = <770000>;
64 opp-hz = /bits/ 64 <1200000000>;
65 opp-microvolt = <780000>;
69 opp-hz = /bits/ 64 <1404000000>;
70 opp-microvolt = <790000>;
74 opp-hz = /bits/ 64 <1500000000>;
75 opp-microvolt = <800000>;
79 opp-hz = /bits/ 64 <1608000000>;
80 opp-microvolt = <810000>;
84 opp-hz = /bits/ 64 <1704000000>;
85 opp-microvolt = <850000>;
89 opp-hz = /bits/ 64 <1800000000>;
90 opp-microvolt = <900000>;
94 opp-hz = /bits/ 64 <1908000000>;
95 opp-microvolt = <950000>;
101 compatible = "amlogic,meson-sm1-ao-cec";
105 compatible = "amlogic,meson-sm1-clk-measure";
110 compatible = "amlogic,sm1-clkc";
114 power-domains = <&pwrc PWRC_SM1_ETH_ID>;
118 compatible = "amlogic,meson-sm1-pwrc";
122 power-domains = <&pwrc PWRC_SM1_VPU_ID>;
126 power-domains = <&pwrc PWRC_SM1_USB_ID>;