1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 BayLibre SAS. All rights reserved.
4 * Copyright (c) 2020 Christian Hewitt <christianshewitt@gmail.com>
11 #include "meson-sm1.dtsi"
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/gpio/meson-g12a-gpio.h>
14 #include <dt-bindings/input/input.h>
23 stdout-path = "serial0:115200n8";
26 emmc_pwrseq: emmc-pwrseq {
27 compatible = "mmc-pwrseq-emmc";
28 reset-gpios = <&gpio BOOT_12 GPIO_ACTIVE_LOW>;
32 compatible = "composite-video-connector";
35 cvbs_connector_in: endpoint {
36 remote-endpoint = <&cvbs_vdac_out>;
42 compatible = "hdmi-connector";
46 hdmi_connector_in: endpoint {
47 remote-endpoint = <&hdmi_tx_tmds_out>;
53 device_type = "memory";
54 reg = <0x0 0x0 0x0 0x40000000>;
57 ao_5v: regulator-ao_5v {
58 compatible = "regulator-fixed";
59 regulator-name = "AO_5V";
60 regulator-min-microvolt = <5000000>;
61 regulator-max-microvolt = <5000000>;
62 vin-supply = <&dc_in>;
66 dc_in: regulator-dc_in {
67 compatible = "regulator-fixed";
68 regulator-name = "DC_IN";
69 regulator-min-microvolt = <5000000>;
70 regulator-max-microvolt = <5000000>;
74 emmc_1v8: regulator-emmc_1v8 {
75 compatible = "regulator-fixed";
76 regulator-name = "EMMC_1V8";
77 regulator-min-microvolt = <1800000>;
78 regulator-max-microvolt = <1800000>;
79 vin-supply = <&vddao_3v3>;
83 vddao_3v3: regulator-vddao_3v3 {
84 compatible = "regulator-fixed";
85 regulator-name = "VDDAO_3V3";
86 regulator-min-microvolt = <3300000>;
87 regulator-max-microvolt = <3300000>;
88 vin-supply = <&dc_in>;
92 vddcpu: regulator-vddcpu {
93 compatible = "pwm-regulator";
95 regulator-name = "VDDCPU";
96 regulator-min-microvolt = <690000>;
97 regulator-max-microvolt = <1050000>;
99 vin-supply = <&dc_in>;
101 pwms = <&pwm_AO_cd 1 1500 0>;
102 pwm-dutycycle-range = <100 0>;
108 vddio_ao1v8: regulator-vddio_ao1v8 {
109 compatible = "regulator-fixed";
110 regulator-name = "VDDIO_AO1V8";
111 regulator-min-microvolt = <1800000>;
112 regulator-max-microvolt = <1800000>;
113 vin-supply = <&vddao_3v3>;
117 sdio_pwrseq: sdio-pwrseq {
118 compatible = "mmc-pwrseq-simple";
119 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
121 clock-names = "ext_clock";
125 compatible = "pwm-clock";
127 clock-frequency = <32768>;
128 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
133 pinctrl-0 = <&cec_ao_a_h_pins>;
134 pinctrl-names = "default";
136 hdmi-phandle = <&hdmi_tx>;
140 pinctrl-0 = <&cec_ao_b_h_pins>;
141 pinctrl-names = "default";
143 hdmi-phandle = <&hdmi_tx>;
147 cpu-supply = <&vddcpu>;
148 operating-points-v2 = <&cpu_opp_table>;
149 clocks = <&clkc CLKID_CPU_CLK>;
150 clock-latency = <50000>;
154 cpu-supply = <&vddcpu>;
155 operating-points-v2 = <&cpu_opp_table>;
156 clocks = <&clkc CLKID_CPU1_CLK>;
157 clock-latency = <50000>;
161 cpu-supply = <&vddcpu>;
162 operating-points-v2 = <&cpu_opp_table>;
163 clocks = <&clkc CLKID_CPU2_CLK>;
164 clock-latency = <50000>;
168 cpu-supply = <&vddcpu>;
169 operating-points-v2 = <&cpu_opp_table>;
170 clocks = <&clkc CLKID_CPU3_CLK>;
171 clock-latency = <50000>;
175 cvbs_vdac_out: endpoint {
176 remote-endpoint = <&cvbs_connector_in>;
182 pinctrl-0 = <&hdmitx_hpd_pins>, <&hdmitx_ddc_pins>;
183 pinctrl-names = "default";
187 hdmi_tx_tmds_out: endpoint {
188 remote-endpoint = <&hdmi_connector_in>;
194 pinctrl-0 = <&remote_input_ao_pins>;
195 pinctrl-names = "default";
200 pinctrl-0 = <&pwm_ao_a_pins>;
201 pinctrl-names = "default";
203 clock-names = "clkin0";
207 pinctrl-0 = <&pwm_ao_d_e_pins>;
208 pinctrl-names = "default";
210 clock-names = "clkin1";
216 pinctrl-0 = <&pwm_e_pins>;
217 pinctrl-names = "default";
219 clock-names = "clkin0";
224 vref-supply = <&vddio_ao1v8>;
230 pinctrl-0 = <&sdio_pins>;
231 pinctrl-1 = <&sdio_clk_gate_pins>;
232 pinctrl-names = "default", "clk-gate";
233 #address-cells = <1>;
239 max-frequency = <200000000>;
244 /* WiFi firmware requires power to be kept while in suspend */
245 keep-power-in-suspend;
247 mmc-pwrseq = <&sdio_pwrseq>;
249 vmmc-supply = <&vddao_3v3>;
250 vqmmc-supply = <&vddio_ao1v8>;
256 pinctrl-0 = <&sdcard_c_pins>;
257 pinctrl-1 = <&sdcard_clk_gate_c_pins>;
258 pinctrl-names = "default", "clk-gate";
262 /* CRC errors are observed at 50MHz */
263 max-frequency = <35000000>;
266 cd-gpios = <&gpio GPIOC_6 GPIO_ACTIVE_LOW>;
267 vmmc-supply = <&vddao_3v3>;
268 vqmmc-supply = <&vddao_3v3>;
274 pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
275 pinctrl-1 = <&emmc_clk_gate_pins>;
276 pinctrl-names = "default", "clk-gate";
282 max-frequency = <200000000>;
286 mmc-pwrseq = <&emmc_pwrseq>;
287 vmmc-supply = <&vddao_3v3>;
288 vqmmc-supply = <&emmc_1v8>;
293 pinctrl-0 = <&uart_ao_a_pins>;
294 pinctrl-names = "default";