1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016 Andreas Färber
4 * Copyright (c) 2016 BayLibre, Inc.
5 * Author: Kevin Hilman <khilman@kernel.org>
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
18 stdout-path = "serial0:115200n8";
22 device_type = "memory";
23 reg = <0x0 0x0 0x0 0x40000000>;
27 compatible = "gpio-leds";
30 label = "wetek-play:system-status";
31 gpios = <&gpio_ao GPIOAO_13 GPIO_ACTIVE_HIGH>;
37 usb_pwr: regulator-usb-pwrs {
38 compatible = "regulator-fixed";
40 regulator-name = "USB_PWR";
42 regulator-min-microvolt = <5000000>;
43 regulator-max-microvolt = <5000000>;
45 gpio = <&gpio GPIODV_24 GPIO_ACTIVE_HIGH>;
49 vddio_boot: regulator-vddio_boot {
50 compatible = "regulator-fixed";
51 regulator-name = "VDDIO_BOOT";
52 regulator-min-microvolt = <1800000>;
53 regulator-max-microvolt = <1800000>;
56 vddao_3v3: regulator-vddao_3v3 {
57 compatible = "regulator-fixed";
58 regulator-name = "VDDAO_3V3";
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
63 vcc_3v3: regulator-vcc_3v3 {
64 compatible = "regulator-fixed";
65 regulator-name = "VCC_3V3";
66 regulator-min-microvolt = <3300000>;
67 regulator-max-microvolt = <3300000>;
70 emmc_pwrseq: emmc-pwrseq {
71 compatible = "mmc-pwrseq-emmc";
72 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
76 compatible = "pwm-clock";
78 clock-frequency = <32768>;
79 pwms = <&pwm_ef 0 30518 0>; /* PWM_E at 32.768KHz */
82 sdio_pwrseq: sdio-pwrseq {
83 compatible = "mmc-pwrseq-simple";
84 reset-gpios = <&gpio GPIOX_6 GPIO_ACTIVE_LOW>;
86 clock-names = "ext_clock";
90 compatible = "composite-video-connector";
93 cvbs_connector_in: endpoint {
94 remote-endpoint = <&cvbs_vdac_out>;
100 compatible = "hdmi-connector";
104 hdmi_connector_in: endpoint {
105 remote-endpoint = <&hdmi_tx_tmds_out>;
113 pinctrl-0 = <&ao_cec_pins>;
114 pinctrl-names = "default";
115 hdmi-phandle = <&hdmi_tx>;
119 cvbs_vdac_out: endpoint {
120 remote-endpoint = <&cvbs_connector_in>;
126 pinctrl-0 = <ð_rgmii_pins>;
127 pinctrl-names = "default";
129 phy-handle = <ð_phy0>;
132 amlogic,tx-delay-ns = <2>;
134 snps,reset-gpio = <&gpio GPIOZ_14 0>;
135 snps,reset-delays-us = <0 10000 1000000>;
136 snps,reset-active-low;
139 compatible = "snps,dwmac-mdio";
140 #address-cells = <1>;
143 eth_phy0: ethernet-phy@0 {
144 /* Realtek RTL8211F (0x001cc916) */
153 pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
154 pinctrl-names = "default";
158 hdmi_tx_tmds_out: endpoint {
159 remote-endpoint = <&hdmi_connector_in>;
165 pinctrl-0 = <&remote_input_ao_pins>;
166 pinctrl-names = "default";
171 pinctrl-0 = <&pwm_e_pins>;
172 pinctrl-names = "default";
173 clocks = <&clkc CLKID_FCLK_DIV4>;
174 clock-names = "clkin0";
177 /* Wireless SDIO Module */
180 pinctrl-0 = <&sdio_pins>;
181 pinctrl-1 = <&sdio_clk_gate_pins>;
182 pinctrl-names = "default", "clk-gate";
183 #address-cells = <1>;
188 max-frequency = <100000000>;
193 mmc-pwrseq = <&sdio_pwrseq>;
195 vmmc-supply = <&vddao_3v3>;
196 vqmmc-supply = <&vddio_boot>;
200 compatible = "brcm,bcm4329-fmac";
207 pinctrl-0 = <&sdcard_pins>;
208 pinctrl-1 = <&sdcard_clk_gate_pins>;
209 pinctrl-names = "default", "clk-gate";
213 max-frequency = <100000000>;
216 cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
219 vmmc-supply = <&vddao_3v3>;
220 vqmmc-supply = <&vcc_3v3>;
226 pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
227 pinctrl-1 = <&emmc_clk_gate_pins>;
228 pinctrl-names = "default", "clk-gate";
232 max-frequency = <200000000>;
238 mmc-pwrseq = <&emmc_pwrseq>;
239 vmmc-supply = <&vcc_3v3>;
240 vqmmc-supply = <&vddio_boot>;
243 /* This UART is brought out to the DB9 connector */
246 pinctrl-0 = <&uart_ao_a_pins>;
247 pinctrl-names = "default";
252 phy-supply = <&usb_pwr>;