1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2016 Andreas Färber
5 * Copyright (c) 2016 BayLibre, SAS.
6 * Author: Neil Armstrong <narmstrong@baylibre.com>
8 * Copyright (c) 2016 Endless Computers, Inc.
9 * Author: Carlo Caione <carlo@endlessm.com>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
26 /* 16 MiB reserved for Hardware ROM Firmware */
27 hwrom_reserved: hwrom@0 {
28 reg = <0x0 0x0 0x0 0x1000000>;
32 /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
33 secmon_reserved: secmon@10000000 {
34 reg = <0x0 0x10000000 0x0 0x200000>;
38 /* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
39 secmon_reserved_alt: secmon@5000000 {
40 reg = <0x0 0x05000000 0x0 0x300000>;
44 /* 32 MiB reserved for ARM Trusted Firmware (BL32) */
45 secmon_reserved_bl32: secmon@5300000 {
46 reg = <0x0 0x05300000 0x0 0x2000000>;
51 compatible = "shared-dma-pool";
53 size = <0x0 0xbc00000>;
54 alignment = <0x0 0x400000>;
60 #address-cells = <0x2>;
65 compatible = "arm,cortex-a53", "arm,armv8";
67 enable-method = "psci";
68 next-level-cache = <&l2>;
69 clocks = <&scpi_dvfs 0>;
74 compatible = "arm,cortex-a53", "arm,armv8";
76 enable-method = "psci";
77 next-level-cache = <&l2>;
78 clocks = <&scpi_dvfs 0>;
83 compatible = "arm,cortex-a53", "arm,armv8";
85 enable-method = "psci";
86 next-level-cache = <&l2>;
87 clocks = <&scpi_dvfs 0>;
92 compatible = "arm,cortex-a53", "arm,armv8";
94 enable-method = "psci";
95 next-level-cache = <&l2>;
96 clocks = <&scpi_dvfs 0>;
100 compatible = "cache";
105 compatible = "arm,cortex-a53-pmu";
106 interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
107 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
108 <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
109 <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
110 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
114 compatible = "arm,psci-0.2";
119 compatible = "arm,armv8-timer";
120 interrupts = <GIC_PPI 13
121 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
123 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
125 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
127 (GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
131 compatible = "fixed-clock";
132 clock-frequency = <24000000>;
133 clock-output-names = "xtal";
139 compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
144 compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
145 #address-cells = <1>;
153 eth_mac: eth_mac@34 {
163 compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
164 mboxes = <&mailbox 1 &mailbox 2>;
165 shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
167 scpi_clocks: clocks {
168 compatible = "arm,scpi-clocks";
170 scpi_dvfs: scpi_clocks@0 {
171 compatible = "arm,scpi-dvfs-clocks";
174 clock-output-names = "vcpu";
178 scpi_sensors: sensors {
179 compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
180 #thermal-sensor-cells = <1>;
185 compatible = "simple-bus";
186 #address-cells = <2>;
191 compatible = "simple-bus";
192 reg = <0x0 0xc1100000 0x0 0x100000>;
193 #address-cells = <2>;
195 ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
197 gpio_intc: interrupt-controller@9880 {
198 compatible = "amlogic,meson-gpio-intc";
199 reg = <0x0 0x9880 0x0 0x10>;
200 interrupt-controller;
201 #interrupt-cells = <2>;
202 amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
206 reset: reset-controller@4404 {
207 compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
208 reg = <0x0 0x04404 0x0 0x9c>;
212 uart_A: serial@84c0 {
213 compatible = "amlogic,meson-gx-uart";
214 reg = <0x0 0x84c0 0x0 0x18>;
215 interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
219 uart_B: serial@84dc {
220 compatible = "amlogic,meson-gx-uart";
221 reg = <0x0 0x84dc 0x0 0x18>;
222 interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
227 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
228 reg = <0x0 0x08500 0x0 0x20>;
229 interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
230 #address-cells = <1>;
236 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
237 reg = <0x0 0x08550 0x0 0x10>;
243 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
244 reg = <0x0 0x08650 0x0 0x10>;
250 compatible = "amlogic,meson-saradc";
251 reg = <0x0 0x8680 0x0 0x34>;
252 #io-channel-cells = <1>;
253 interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
258 compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
259 reg = <0x0 0x086c0 0x0 0x10>;
264 uart_C: serial@8700 {
265 compatible = "amlogic,meson-gx-uart";
266 reg = <0x0 0x8700 0x0 0x18>;
267 interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
272 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
273 reg = <0x0 0x087c0 0x0 0x20>;
274 interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
275 #address-cells = <1>;
281 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
282 reg = <0x0 0x087e0 0x0 0x20>;
283 interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
284 #address-cells = <1>;
290 compatible = "amlogic,meson-gx-spicc";
291 reg = <0x0 0x08d80 0x0 0x80>;
292 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
293 #address-cells = <1>;
299 compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
300 reg = <0x0 0x08c80 0x0 0x80>;
301 #address-cells = <1>;
307 compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
308 reg = <0x0 0x098d0 0x0 0x10>;
313 gic: interrupt-controller@c4301000 {
314 compatible = "arm,gic-400";
315 reg = <0x0 0xc4301000 0 0x1000>,
316 <0x0 0xc4302000 0 0x2000>,
317 <0x0 0xc4304000 0 0x2000>,
318 <0x0 0xc4306000 0 0x2000>;
319 interrupt-controller;
320 interrupts = <GIC_PPI 9
321 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
322 #interrupt-cells = <3>;
323 #address-cells = <0>;
326 sram: sram@c8000000 {
327 compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
328 reg = <0x0 0xc8000000 0x0 0x14000>;
330 #address-cells = <1>;
332 ranges = <0 0x0 0xc8000000 0x14000>;
334 cpu_scp_lpri: scp-shmem@0 {
335 compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
336 reg = <0x13000 0x400>;
339 cpu_scp_hpri: scp-shmem@200 {
340 compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
341 reg = <0x13400 0x400>;
345 aobus: bus@c8100000 {
346 compatible = "simple-bus";
347 reg = <0x0 0xc8100000 0x0 0x100000>;
348 #address-cells = <2>;
350 ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
352 sysctrl_AO: sys-ctrl@0 {
353 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd";
354 reg = <0x0 0x0 0x0 0x100>;
356 pwrc_vpu: power-controller-vpu {
357 compatible = "amlogic,meson-gx-pwrc-vpu";
358 #power-domain-cells = <0>;
359 amlogic,hhi-sysctrl = <&sysctrl>;
362 clkc_AO: clock-controller {
363 compatible = "amlogic,meson-gx-aoclkc";
370 compatible = "amlogic,meson-gx-ao-cec";
371 reg = <0x0 0x00100 0x0 0x14>;
372 interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
375 sec_AO: ao-secure@140 {
376 compatible = "amlogic,meson-gx-ao-secure", "syscon";
377 reg = <0x0 0x140 0x0 0x140>;
381 uart_AO: serial@4c0 {
382 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
383 reg = <0x0 0x004c0 0x0 0x18>;
384 interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
388 uart_AO_B: serial@4e0 {
389 compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
390 reg = <0x0 0x004e0 0x0 0x18>;
391 interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
396 compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
397 reg = <0x0 0x500 0x0 0x20>;
398 interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
399 #address-cells = <1>;
405 compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
406 reg = <0x0 0x00550 0x0 0x10>;
412 compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
413 reg = <0x0 0x00580 0x0 0x40>;
414 interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
419 periphs: periphs@c8834000 {
420 compatible = "simple-bus";
421 reg = <0x0 0xc8834000 0x0 0x2000>;
422 #address-cells = <2>;
424 ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
427 compatible = "amlogic,meson-rng";
428 reg = <0x0 0x0 0x0 0x4>;
432 hiubus: bus@c883c000 {
433 compatible = "simple-bus";
434 reg = <0x0 0xc883c000 0x0 0x2000>;
435 #address-cells = <2>;
437 ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
439 sysctrl: system-controller@0 {
440 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
444 mailbox: mailbox@404 {
445 compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
446 reg = <0 0x404 0 0x4c>;
447 interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
448 <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
449 <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
454 ethmac: ethernet@c9410000 {
455 compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
456 reg = <0x0 0xc9410000 0x0 0x10000
457 0x0 0xc8834540 0x0 0x4>;
458 interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
459 interrupt-names = "macirq";
464 compatible = "simple-bus";
465 reg = <0x0 0xd0000000 0x0 0x200000>;
466 #address-cells = <2>;
468 ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
470 sd_emmc_a: mmc@70000 {
471 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
472 reg = <0x0 0x70000 0x0 0x800>;
473 interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
477 sd_emmc_b: mmc@72000 {
478 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
479 reg = <0x0 0x72000 0x0 0x800>;
480 interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
484 sd_emmc_c: mmc@74000 {
485 compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
486 reg = <0x0 0x74000 0x0 0x800>;
487 interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
493 compatible = "amlogic,meson-gx-vpu";
494 reg = <0x0 0xd0100000 0x0 0x100000>,
495 <0x0 0xc883c000 0x0 0x1000>,
496 <0x0 0xc8838000 0x0 0x1000>;
497 reg-names = "vpu", "hhi", "dmc";
498 interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
499 #address-cells = <1>;
502 /* CVBS VDAC output port */
503 cvbs_vdac_port: port@0 {
507 /* HDMI-TX output port */
508 hdmi_tx_port: port@1 {
511 hdmi_tx_out: endpoint {
512 remote-endpoint = <&hdmi_tx_in>;
517 hdmi_tx: hdmi-tx@c883a000 {
518 compatible = "amlogic,meson-gx-dw-hdmi";
519 reg = <0x0 0xc883a000 0x0 0x1c>;
520 interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
521 #address-cells = <1>;
526 hdmi_tx_venc_port: port@0 {
529 hdmi_tx_in: endpoint {
530 remote-endpoint = <&hdmi_tx_out>;
535 hdmi_tx_tmds_port: port@1 {