1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2019 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
7 #include "meson-g12.dtsi"
10 compatible = "amlogic,g12b";
13 #address-cells = <0x2>;
48 compatible = "arm,cortex-a53";
50 enable-method = "psci";
51 capacity-dmips-mhz = <592>;
52 next-level-cache = <&l2>;
58 compatible = "arm,cortex-a53";
60 enable-method = "psci";
61 capacity-dmips-mhz = <592>;
62 next-level-cache = <&l2>;
68 compatible = "arm,cortex-a73";
70 enable-method = "psci";
71 capacity-dmips-mhz = <1024>;
72 next-level-cache = <&l2>;
78 compatible = "arm,cortex-a73";
80 enable-method = "psci";
81 capacity-dmips-mhz = <1024>;
82 next-level-cache = <&l2>;
88 compatible = "arm,cortex-a73";
90 enable-method = "psci";
91 capacity-dmips-mhz = <1024>;
92 next-level-cache = <&l2>;
98 compatible = "arm,cortex-a73";
100 enable-method = "psci";
101 capacity-dmips-mhz = <1024>;
102 next-level-cache = <&l2>;
103 #cooling-cells = <2>;
107 compatible = "cache";
115 compatible = "amlogic,g12b-clkc";
121 trip = <&cpu_passive>;
122 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
123 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
124 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
125 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
126 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
127 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
131 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
132 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
133 <&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
134 <&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
135 <&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
136 <&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
146 compatible = "amlogic,g12b-ddr-pmu";
150 power-domains = <&pwrc PWRC_G12A_NNA_ID>;