Linux 6.7-rc7
[linux-modified.git] / arch / arm64 / boot / dts / amlogic / meson-g12b-odroid-n2l.dts
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (c) 2022 Dongjin Kim <tobetter@gmail.com>
4  */
5
6 /dts-v1/;
7
8 /* The Amlogic S922X Rev. C supports the same OPPs as the A311D variant */
9 #include "meson-g12b-a311d.dtsi"
10 #include "meson-g12b-odroid.dtsi"
11
12 / {
13         compatible = "hardkernel,odroid-n2l", "amlogic,s922x", "amlogic,g12b";
14         model = "Hardkernel ODROID-N2L";
15
16         sound {
17                 compatible = "amlogic,axg-sound-card";
18                 model = "ODROID-N2L";
19                 audio-aux-devs = <&tdmout_b>, <&tdmin_a>, <&tdmin_b>,
20                                  <&tdmin_c>, <&tdmin_lb>;
21                 audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
22                                 "TDMOUT_B IN 1", "FRDDR_B OUT 1",
23                                 "TDMOUT_B IN 2", "FRDDR_C OUT 1",
24                                 "TDM_B Playback", "TDMOUT_B OUT",
25                                 "TDMIN_A IN 4", "TDM_B Loopback",
26                                 "TDMIN_B IN 4", "TDM_B Loopback",
27                                 "TDMIN_C IN 4", "TDM_B Loopback",
28                                 "TDMIN_LB IN 1", "TDM_B Loopback",
29                                 "TODDR_A IN 0", "TDMIN_A OUT",
30                                 "TODDR_B IN 0", "TDMIN_A OUT",
31                                 "TODDR_C IN 0", "TDMIN_A OUT",
32                                 "TODDR_A IN 1", "TDMIN_B OUT",
33                                 "TODDR_B IN 1", "TDMIN_B OUT",
34                                 "TODDR_C IN 1", "TDMIN_B OUT",
35                                 "TODDR_A IN 2", "TDMIN_C OUT",
36                                 "TODDR_B IN 2", "TDMIN_C OUT",
37                                 "TODDR_C IN 2", "TDMIN_C OUT",
38                                 "TODDR_A IN 6", "TDMIN_LB OUT",
39                                 "TODDR_B IN 6", "TDMIN_LB OUT",
40                                 "TODDR_C IN 6", "TDMIN_LB OUT";
41
42                 assigned-clocks = <&clkc CLKID_MPLL2>,
43                                   <&clkc CLKID_MPLL0>,
44                                   <&clkc CLKID_MPLL1>;
45                 assigned-clock-parents = <0>, <0>, <0>;
46                 assigned-clock-rates = <294912000>,
47                                        <270950400>,
48                                        <393216000>;
49
50                 dai-link-0 {
51                         sound-dai = <&frddr_a>;
52                 };
53
54                 dai-link-1 {
55                         sound-dai = <&frddr_b>;
56                 };
57
58                 dai-link-2 {
59                         sound-dai = <&frddr_c>;
60                 };
61
62                 dai-link-3 {
63                         sound-dai = <&toddr_a>;
64                 };
65
66                 dai-link-4 {
67                         sound-dai = <&toddr_b>;
68                 };
69
70                 dai-link-5 {
71                         sound-dai = <&toddr_c>;
72                 };
73
74                 /* 8ch hdmi interface */
75                 dai-link-6 {
76                         sound-dai = <&tdmif_b>;
77                         dai-format = "i2s";
78                         dai-tdm-slot-tx-mask-0 = <1 1>;
79                         dai-tdm-slot-tx-mask-1 = <1 1>;
80                         dai-tdm-slot-tx-mask-2 = <1 1>;
81                         dai-tdm-slot-tx-mask-3 = <1 1>;
82                         mclk-fs = <256>;
83
84                         codec {
85                                 sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
86                         };
87                 };
88
89                 /* hdmi glue */
90                 dai-link-7 {
91                         sound-dai = <&tohdmitx TOHDMITX_I2S_OUT>;
92
93                         codec {
94                                 sound-dai = <&hdmi_tx>;
95                         };
96                 };
97         };
98 };
99
100 &eth_phy {
101         status = "disabled";
102 };
103
104 &vddcpu_a {
105         regulator-min-microvolt = <680000>;
106         regulator-max-microvolt = <1040000>;
107
108         pwms = <&pwm_ab 0 1500 0>;
109 };
110
111 &vddcpu_b {
112         regulator-min-microvolt = <680000>;
113         regulator-max-microvolt = <1040000>;
114
115         pwms = <&pwm_AO_cd 1 1500 0>;
116 };
117
118 &usb2_phy0 {
119         phy-supply = <&usb_pwr_en>;
120 };
121
122 &usb2_phy1 {
123         phy-supply = <&usb_pwr_en>;
124 };