1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include "meson-g12-common.dtsi"
7 #include <dt-bindings/power/meson-g12a-power.h>
10 compatible = "amlogic,g12a";
13 #address-cells = <0x2>;
18 compatible = "arm,cortex-a53";
20 enable-method = "psci";
21 next-level-cache = <&l2>;
26 compatible = "arm,cortex-a53";
28 enable-method = "psci";
29 next-level-cache = <&l2>;
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
37 next-level-cache = <&l2>;
42 compatible = "arm,cortex-a53";
44 enable-method = "psci";
45 next-level-cache = <&l2>;
53 cpu_opp_table: opp-table {
54 compatible = "operating-points-v2";
58 opp-hz = /bits/ 64 <1000000000>;
59 opp-microvolt = <731000>;
63 opp-hz = /bits/ 64 <1200000000>;
64 opp-microvolt = <731000>;
68 opp-hz = /bits/ 64 <1398000000>;
69 opp-microvolt = <761000>;
73 opp-hz = /bits/ 64 <1512000000>;
74 opp-microvolt = <791000>;
78 opp-hz = /bits/ 64 <1608000000>;
79 opp-microvolt = <831000>;
83 opp-hz = /bits/ 64 <1704000000>;
84 opp-microvolt = <861000>;
88 opp-hz = /bits/ 64 <1800000000>;
89 opp-microvolt = <981000>;
95 power-domains = <&pwrc PWRC_G12A_ETH_ID>;
99 power-domains = <&pwrc PWRC_G12A_VPU_ID>;
103 amlogic,dram-access-quirk;