1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include "meson-g12.dtsi"
9 compatible = "amlogic,g12a";
12 #address-cells = <0x2>;
17 compatible = "arm,cortex-a53";
19 enable-method = "psci";
20 next-level-cache = <&l2>;
26 compatible = "arm,cortex-a53";
28 enable-method = "psci";
29 next-level-cache = <&l2>;
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
38 next-level-cache = <&l2>;
44 compatible = "arm,cortex-a53";
46 enable-method = "psci";
47 next-level-cache = <&l2>;
56 cpu_opp_table: opp-table {
57 compatible = "operating-points-v2";
61 opp-hz = /bits/ 64 <1000000000>;
62 opp-microvolt = <731000>;
66 opp-hz = /bits/ 64 <1200000000>;
67 opp-microvolt = <731000>;
71 opp-hz = /bits/ 64 <1398000000>;
72 opp-microvolt = <761000>;
76 opp-hz = /bits/ 64 <1512000000>;
77 opp-microvolt = <791000>;
81 opp-hz = /bits/ 64 <1608000000>;
82 opp-microvolt = <831000>;
86 opp-hz = /bits/ 64 <1704000000>;
87 opp-microvolt = <861000>;
91 opp-hz = /bits/ 64 <1800000000>;
92 opp-microvolt = <981000>;
100 trip = <&cpu_passive>;
101 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
102 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
103 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
104 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
109 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
110 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
111 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
112 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;