1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved.
6 #include "meson-g12.dtsi"
9 compatible = "amlogic,g12a";
12 #address-cells = <0x2>;
17 compatible = "arm,cortex-a53";
19 enable-method = "psci";
20 next-level-cache = <&l2>;
26 compatible = "arm,cortex-a53";
28 enable-method = "psci";
29 next-level-cache = <&l2>;
35 compatible = "arm,cortex-a53";
37 enable-method = "psci";
38 next-level-cache = <&l2>;
44 compatible = "arm,cortex-a53";
46 enable-method = "psci";
47 next-level-cache = <&l2>;
58 cpu_opp_table: opp-table {
59 compatible = "operating-points-v2";
63 opp-hz = /bits/ 64 <1000000000>;
64 opp-microvolt = <731000>;
68 opp-hz = /bits/ 64 <1200000000>;
69 opp-microvolt = <731000>;
73 opp-hz = /bits/ 64 <1398000000>;
74 opp-microvolt = <761000>;
78 opp-hz = /bits/ 64 <1512000000>;
79 opp-microvolt = <791000>;
83 opp-hz = /bits/ 64 <1608000000>;
84 opp-microvolt = <831000>;
88 opp-hz = /bits/ 64 <1704000000>;
89 opp-microvolt = <861000>;
93 opp-hz = /bits/ 64 <1800000000>;
94 opp-microvolt = <981000>;
102 trip = <&cpu_passive>;
103 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
104 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
105 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
106 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
111 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
112 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
113 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
114 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
120 compatible = "amlogic,g12a-ddr-pmu";